5 select HAVE_ARCH_TRACEHOOK
7 select HAVE_PERF_EVENTS
13 config RWSEM_GENERIC_SPINLOCK
17 config RWSEM_XCHGADD_ALGORITHM
20 config GENERIC_FIND_NEXT_BIT
24 config GENERIC_HWEIGHT
28 config GENERIC_CALIBRATE_DELAY
32 config GENERIC_HARDIRQS
44 config ARCH_HAS_ILOG2_U32
48 config ARCH_HAS_ILOG2_U64
58 source "kernel/Kconfig.freezer"
61 menu "Fujitsu FR-V system setup"
66 This options switches on and off support for the FR-V MMU
67 (effectively switching between vmlinux and uClinux). Not all FR-V
68 CPUs support this. Currently only the FR451 has a sufficiently
71 config FRV_OUTOFLINE_ATOMIC_OPS
72 bool "Out-of-line the FRV atomic operations"
75 Setting this option causes the FR-V atomic operations to be mostly
76 implemented out-of-line.
78 See Documentation/frv/atomic-ops.txt for more information.
81 bool "High memory support"
85 If you wish to use more than 256MB of memory with your MMU based
86 system, you will need to select this option. The kernel can only see
87 the memory between 0xC0000000 and 0xD0000000 directly... everything
90 The arch is, however, capable of supporting up to 3GB of SDRAM.
93 bool "Allocate page tables in highmem"
97 The VM uses one page of memory for each page table. For systems
98 with a lot of RAM, this can be wasteful of precious low memory.
99 Setting this option will put user-space page tables in high memory.
104 prompt "uClinux kernel load address"
106 default UCPAGE_OFFSET_C0000000
108 This option sets the base address for the uClinux kernel. The kernel
109 will rearrange the SDRAM layout to start at this address, and move
110 itself to start there. It must be greater than 0, and it must be
111 sufficiently less than 0xE0000000 that the SDRAM does not intersect
114 The base address must also be aligned such that the SDRAM controller
115 can decode it. For instance, a 512MB SDRAM bank must be 512MB aligned.
117 config UCPAGE_OFFSET_20000000
120 config UCPAGE_OFFSET_40000000
123 config UCPAGE_OFFSET_60000000
126 config UCPAGE_OFFSET_80000000
129 config UCPAGE_OFFSET_A0000000
132 config UCPAGE_OFFSET_C0000000
133 bool "0xC0000000 (Recommended)"
139 default 0x20000000 if UCPAGE_OFFSET_20000000
140 default 0x40000000 if UCPAGE_OFFSET_40000000
141 default 0x60000000 if UCPAGE_OFFSET_60000000
142 default 0x80000000 if UCPAGE_OFFSET_80000000
143 default 0xA0000000 if UCPAGE_OFFSET_A0000000
146 config PROTECT_KERNEL
147 bool "Protect core kernel against userspace"
151 Selecting this option causes the uClinux kernel to change the
152 permittivity of DAMPR register covering the core kernel image to
153 prevent userspace accessing the underlying memory directly.
156 prompt "CPU Caching mode"
157 default FRV_DEFL_CACHE_WBACK
159 This option determines the default caching mode for the kernel.
161 Write-Back caching mode involves the all reads and writes causing
162 the affected cacheline to be read into the cache first before being
163 operated upon. Memory is not then updated by a write until the cache
164 is filled and a cacheline needs to be displaced from the cache to
165 make room. Only at that point is it written back.
167 Write-Behind caching is similar to Write-Back caching, except that a
168 write won't fetch a cacheline into the cache if there isn't already
169 one there; it will write directly to memory instead.
171 Write-Through caching only fetches cachelines from memory on a
172 read. Writes always get written directly to memory. If the affected
173 cacheline is also in cache, it will be updated too.
175 The final option is to turn of caching entirely.
177 Note that not all CPUs support Write-Behind caching. If the CPU on
178 which the kernel is running doesn't, it'll fall back to Write-Back
181 config FRV_DEFL_CACHE_WBACK
184 config FRV_DEFL_CACHE_WBEHIND
187 config FRV_DEFL_CACHE_WTHRU
190 config FRV_DEFL_CACHE_DISABLED
195 menu "CPU core support"
198 bool "Include FR401 core support"
202 This enables support for the FR401, FR401A and FR403 CPUs
205 bool "Include FR405 core support"
209 This enables support for the FR405 CPU
212 bool "Include FR451 core support"
215 This enables support for the FR451 CPU
217 config CPU_FR451_COMPILE
218 bool "Specifically compile for FR451 core"
219 depends on CPU_FR451 && !CPU_FR401 && !CPU_FR405 && !CPU_FR551
222 This causes appropriate flags to be passed to the compiler to
223 optimise for the FR451 CPU
226 bool "Include FR551 core support"
230 This enables support for the FR555 CPU
232 config CPU_FR551_COMPILE
233 bool "Specifically compile for FR551 core"
234 depends on CPU_FR551 && !CPU_FR401 && !CPU_FR405 && !CPU_FR451
237 This causes appropriate flags to be passed to the compiler to
238 optimise for the FR555 CPU
240 config FRV_L1_CACHE_SHIFT
242 default "5" if CPU_FR401 || CPU_FR405 || CPU_FR451
243 default "6" if CPU_FR551
248 prompt "System support"
252 bool "MB93091 CPU board with or without motherboard"
255 bool "MB93093 PDK unit"
261 prompt "Motherboard support"
265 bool "Use the MB93090-MB00 motherboard"
267 Select this option if the MB93091 CPU board is going to be used with
268 a MB93090-MB00 VDK motherboard
271 bool "Use standalone"
273 Select this option if the MB93091 CPU board is going to be used
274 without a motherboard
279 config FUJITSU_MB93493
280 bool "MB93493 Multimedia chip"
282 Select this option if the MB93493 multimedia chip is going to be
286 prompt "GP-Relative data support"
289 This option controls what data, if any, should be placed in the GP
290 relative data sections. Using this means that the compiler can
291 generate accesses to the data using GR16-relative addressing which
292 is faster than absolute instructions and saves space (2 instructions
295 However, the GPREL region is limited in size because the immediate
296 value used in the load and store instructions is limited to a 12-bit
299 So if the linker starts complaining that accesses to GPREL data are
300 out of range, try changing this option from the default.
302 Note that modules will always be compiled with this feature disabled
303 as the module data will not be in range of the GP base address.
306 bool "Put data objects of up to 8 bytes into GP-REL"
309 bool "Put data objects of up to 4 bytes into GP-REL"
311 config GPREL_DATA_NONE
312 bool "Don't use GP-REL"
316 config FRV_ONCPU_SERIAL
317 bool "Use on-CPU serial ports"
323 depends on MB93090_MB00
326 Some FR-V systems (such as the MB93090-MB00 VDK) have PCI
327 onboard. If you have one of these boards and you wish to use the PCI
328 facilities, say Y here.
330 config RESERVE_DMA_COHERENT
331 bool "Reserve DMA coherent memory"
332 depends on PCI && !MMU
335 Many PCI drivers require access to uncached memory for DMA device
336 communications (such as is done with some Ethernet buffer rings). If
337 a fully featured MMU is available, this can be done through page
338 table settings, but if not, a region has to be set aside and marked
339 with a special DAMPR register.
341 Setting this option causes uClinux to set aside a portion of the
342 available memory for use in this manner. The memory will then be
343 unavailable for normal kernel use.
345 source "drivers/pci/Kconfig"
347 source "drivers/pcmcia/Kconfig"
349 #config MATH_EMULATION
350 # bool "Math emulation support (EXPERIMENTAL)"
351 # depends on EXPERIMENTAL
353 # At some point in the future, this will cause floating-point math
354 # instructions to be emulated by the kernel on machines that lack a
355 # floating-point math coprocessor. Thrill-seekers and chronically
356 # sleep-deprived psychotic hacker types can say Y now, everyone else
357 # should probably wait a while.
359 menu "Power management options"
361 config ARCH_SUSPEND_POSSIBLE
365 source kernel/power/Kconfig
371 menu "Executable formats"
373 source "fs/Kconfig.binfmt"
379 source "drivers/Kconfig"
383 source "arch/frv/Kconfig.debug"
385 source "security/Kconfig"
387 source "crypto/Kconfig"