5 select HAVE_ARCH_TRACEHOOK
6 select HAVE_PERF_EVENTS
8 select HAVE_GENERIC_HARDIRQS
9 select GENERIC_IRQ_SHOW
10 select HAVE_DEBUG_BUGVERBOSE
11 select ARCH_HAVE_NMI_SAFE_CMPXCHG
12 select GENERIC_CPU_DEVICES
13 select ARCH_WANT_IPC_PARSE_VERSION
19 config RWSEM_GENERIC_SPINLOCK
23 config RWSEM_XCHGADD_ALGORITHM
26 config GENERIC_HWEIGHT
30 config GENERIC_CALIBRATE_DELAY
42 config ARCH_HAS_ILOG2_U32
46 config ARCH_HAS_ILOG2_U64
56 source "kernel/Kconfig.freezer"
59 menu "Fujitsu FR-V system setup"
64 This options switches on and off support for the FR-V MMU
65 (effectively switching between vmlinux and uClinux). Not all FR-V
66 CPUs support this. Currently only the FR451 has a sufficiently
69 config FRV_OUTOFLINE_ATOMIC_OPS
70 bool "Out-of-line the FRV atomic operations"
73 Setting this option causes the FR-V atomic operations to be mostly
74 implemented out-of-line.
76 See Documentation/frv/atomic-ops.txt for more information.
79 bool "High memory support"
83 If you wish to use more than 256MB of memory with your MMU based
84 system, you will need to select this option. The kernel can only see
85 the memory between 0xC0000000 and 0xD0000000 directly... everything
88 The arch is, however, capable of supporting up to 3GB of SDRAM.
91 bool "Allocate page tables in highmem"
95 The VM uses one page of memory for each page table. For systems
96 with a lot of RAM, this can be wasteful of precious low memory.
97 Setting this option will put user-space page tables in high memory.
102 prompt "uClinux kernel load address"
104 default UCPAGE_OFFSET_C0000000
106 This option sets the base address for the uClinux kernel. The kernel
107 will rearrange the SDRAM layout to start at this address, and move
108 itself to start there. It must be greater than 0, and it must be
109 sufficiently less than 0xE0000000 that the SDRAM does not intersect
112 The base address must also be aligned such that the SDRAM controller
113 can decode it. For instance, a 512MB SDRAM bank must be 512MB aligned.
115 config UCPAGE_OFFSET_20000000
118 config UCPAGE_OFFSET_40000000
121 config UCPAGE_OFFSET_60000000
124 config UCPAGE_OFFSET_80000000
127 config UCPAGE_OFFSET_A0000000
130 config UCPAGE_OFFSET_C0000000
131 bool "0xC0000000 (Recommended)"
137 default 0x20000000 if UCPAGE_OFFSET_20000000
138 default 0x40000000 if UCPAGE_OFFSET_40000000
139 default 0x60000000 if UCPAGE_OFFSET_60000000
140 default 0x80000000 if UCPAGE_OFFSET_80000000
141 default 0xA0000000 if UCPAGE_OFFSET_A0000000
144 config PROTECT_KERNEL
145 bool "Protect core kernel against userspace"
149 Selecting this option causes the uClinux kernel to change the
150 permittivity of DAMPR register covering the core kernel image to
151 prevent userspace accessing the underlying memory directly.
154 prompt "CPU Caching mode"
155 default FRV_DEFL_CACHE_WBACK
157 This option determines the default caching mode for the kernel.
159 Write-Back caching mode involves the all reads and writes causing
160 the affected cacheline to be read into the cache first before being
161 operated upon. Memory is not then updated by a write until the cache
162 is filled and a cacheline needs to be displaced from the cache to
163 make room. Only at that point is it written back.
165 Write-Behind caching is similar to Write-Back caching, except that a
166 write won't fetch a cacheline into the cache if there isn't already
167 one there; it will write directly to memory instead.
169 Write-Through caching only fetches cachelines from memory on a
170 read. Writes always get written directly to memory. If the affected
171 cacheline is also in cache, it will be updated too.
173 The final option is to turn of caching entirely.
175 Note that not all CPUs support Write-Behind caching. If the CPU on
176 which the kernel is running doesn't, it'll fall back to Write-Back
179 config FRV_DEFL_CACHE_WBACK
182 config FRV_DEFL_CACHE_WBEHIND
185 config FRV_DEFL_CACHE_WTHRU
188 config FRV_DEFL_CACHE_DISABLED
193 menu "CPU core support"
196 bool "Include FR401 core support"
200 This enables support for the FR401, FR401A and FR403 CPUs
203 bool "Include FR405 core support"
207 This enables support for the FR405 CPU
210 bool "Include FR451 core support"
213 This enables support for the FR451 CPU
215 config CPU_FR451_COMPILE
216 bool "Specifically compile for FR451 core"
217 depends on CPU_FR451 && !CPU_FR401 && !CPU_FR405 && !CPU_FR551
220 This causes appropriate flags to be passed to the compiler to
221 optimise for the FR451 CPU
224 bool "Include FR551 core support"
228 This enables support for the FR555 CPU
230 config CPU_FR551_COMPILE
231 bool "Specifically compile for FR551 core"
232 depends on CPU_FR551 && !CPU_FR401 && !CPU_FR405 && !CPU_FR451
235 This causes appropriate flags to be passed to the compiler to
236 optimise for the FR555 CPU
238 config FRV_L1_CACHE_SHIFT
240 default "5" if CPU_FR401 || CPU_FR405 || CPU_FR451
241 default "6" if CPU_FR551
246 prompt "System support"
250 bool "MB93091 CPU board with or without motherboard"
253 bool "MB93093 PDK unit"
259 prompt "Motherboard support"
263 bool "Use the MB93090-MB00 motherboard"
265 Select this option if the MB93091 CPU board is going to be used with
266 a MB93090-MB00 VDK motherboard
269 bool "Use standalone"
271 Select this option if the MB93091 CPU board is going to be used
272 without a motherboard
277 config FUJITSU_MB93493
278 bool "MB93493 Multimedia chip"
280 Select this option if the MB93493 multimedia chip is going to be
284 prompt "GP-Relative data support"
287 This option controls what data, if any, should be placed in the GP
288 relative data sections. Using this means that the compiler can
289 generate accesses to the data using GR16-relative addressing which
290 is faster than absolute instructions and saves space (2 instructions
293 However, the GPREL region is limited in size because the immediate
294 value used in the load and store instructions is limited to a 12-bit
297 So if the linker starts complaining that accesses to GPREL data are
298 out of range, try changing this option from the default.
300 Note that modules will always be compiled with this feature disabled
301 as the module data will not be in range of the GP base address.
304 bool "Put data objects of up to 8 bytes into GP-REL"
307 bool "Put data objects of up to 4 bytes into GP-REL"
309 config GPREL_DATA_NONE
310 bool "Don't use GP-REL"
314 config FRV_ONCPU_SERIAL
315 bool "Use on-CPU serial ports"
321 depends on MB93090_MB00
323 select GENERIC_PCI_IOMAP
325 Some FR-V systems (such as the MB93090-MB00 VDK) have PCI
326 onboard. If you have one of these boards and you wish to use the PCI
327 facilities, say Y here.
329 config RESERVE_DMA_COHERENT
330 bool "Reserve DMA coherent memory"
331 depends on PCI && !MMU
334 Many PCI drivers require access to uncached memory for DMA device
335 communications (such as is done with some Ethernet buffer rings). If
336 a fully featured MMU is available, this can be done through page
337 table settings, but if not, a region has to be set aside and marked
338 with a special DAMPR register.
340 Setting this option causes uClinux to set aside a portion of the
341 available memory for use in this manner. The memory will then be
342 unavailable for normal kernel use.
344 source "drivers/pci/Kconfig"
346 source "drivers/pcmcia/Kconfig"
348 menu "Power management options"
350 config ARCH_SUSPEND_POSSIBLE
353 source kernel/power/Kconfig
359 menu "Executable formats"
361 source "fs/Kconfig.binfmt"
367 source "drivers/Kconfig"
371 source "arch/frv/Kconfig.debug"
373 source "security/Kconfig"
375 source "crypto/Kconfig"