1 #ifndef _H8300_SYSTEM_H
2 #define _H8300_SYSTEM_H
4 #include <linux/linkage.h>
9 * switch_to(n) should switch tasks to task ptr, first checking that
10 * ptr isn't the current task, in which case it does nothing. This
11 * also clears the TS-flag if the task we switched to has used the
12 * math co-processor latest.
15 * switch_to() saves the extra registers, that are not saved
16 * automatically by SAVE_SWITCH_STACK in resume(), ie. d0-d5 and
17 * a0-a1. Some of these are used by schedule() and its predecessors
18 * and so we might get see unexpected behaviors when a task returns
19 * with unexpected register values.
21 * syscall stores these registers itself and none of them are used
22 * by syscall after the function in the syscall has been called.
24 * Beware that resume now expects *next to be in d1 and the offset of
25 * tss to be in a1. This saves a few instructions as we no longer have
26 * to push them onto the stack and read them back right after.
28 * 02/17/96 - Jes Sorensen (jds@kom.auc.dk)
30 * Changed 96/09/19 by Andreas Schwab
31 * pass prev in a0, next in a1, offset of tss in d1, and whether
32 * the mm structures are shared in d2 (to avoid atc flushing).
34 * H8/300 Porting 2002/09/04 Yoshinori Sato
37 asmlinkage void resume(void);
38 #define switch_to(prev,next,last) { \
40 __asm__ __volatile__( \
47 : "r" (&(prev->thread)), \
48 "r" (&(next->thread)), \
50 : "cc", "er0", "er1", "er2", "er3"); \
54 #define __sti() asm volatile ("andc #0x7f,ccr")
55 #define __cli() asm volatile ("orc #0x80,ccr")
57 #define __save_flags(x) \
58 asm volatile ("stc ccr,%w0":"=r" (x))
60 #define __restore_flags(x) \
61 asm volatile ("ldc %w0,ccr": :"r" (x))
63 #define irqs_disabled() \
65 unsigned char flags; \
66 __save_flags(flags); \
67 ((flags & 0x80) == 0x80); \
70 #define iret() __asm__ __volatile__ ("rte": : :"memory", "sp", "cc")
72 /* For spinlocks etc */
73 #define local_irq_disable() __cli()
74 #define local_irq_enable() __sti()
75 #define local_irq_save(x) ({ __save_flags(x); local_irq_disable(); })
76 #define local_irq_restore(x) __restore_flags(x)
77 #define local_save_flags(x) __save_flags(x)
80 * Force strict CPU ordering.
81 * Not really required on H8...
83 #define nop() asm volatile ("nop"::)
84 #define mb() asm volatile ("" : : :"memory")
85 #define rmb() asm volatile ("" : : :"memory")
86 #define wmb() asm volatile ("" : : :"memory")
87 #define set_mb(var, value) do { xchg(&var, value); } while (0)
91 #define smp_rmb() rmb()
92 #define smp_wmb() wmb()
93 #define smp_read_barrier_depends() read_barrier_depends()
95 #define smp_mb() barrier()
96 #define smp_rmb() barrier()
97 #define smp_wmb() barrier()
98 #define smp_read_barrier_depends() do { } while(0)
101 #define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
103 struct __xchg_dummy { unsigned long a[100]; };
104 #define __xg(x) ((volatile struct __xchg_dummy *)(x))
106 static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int size)
108 unsigned long tmp, flags;
110 local_irq_save(flags);
117 : "=&r" (tmp) : "r" (x), "m" (*__xg(ptr)) : "memory");
123 : "=&r" (tmp) : "r" (x), "m" (*__xg(ptr)) : "memory");
129 : "=&r" (tmp) : "r" (x), "m" (*__xg(ptr)) : "memory");
134 local_irq_restore(flags);
138 #define HARD_RESET_NOW() ({ \
139 local_irq_disable(); \
143 #include <asm-generic/cmpxchg-local.h>
146 * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
149 #define cmpxchg_local(ptr, o, n) \
150 ((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), (unsigned long)(o),\
151 (unsigned long)(n), sizeof(*(ptr))))
152 #define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
155 #include <asm-generic/cmpxchg.h>
158 #define arch_align_stack(x) (x)
160 extern void die(const char *str, struct pt_regs *fp, unsigned long err);
162 #endif /* _H8300_SYSTEM_H */