2 * i8253.c 8253/PIT functions
5 #include <linux/clockchips.h>
6 #include <linux/init.h>
7 #include <linux/interrupt.h>
8 #include <linux/jiffies.h>
9 #include <linux/module.h>
10 #include <linux/spinlock.h>
13 #include <asm/delay.h>
14 #include <asm/i8253.h>
19 DEFINE_SPINLOCK(i8253_lock);
20 EXPORT_SYMBOL(i8253_lock);
23 * HPET replaces the PIT, when enabled. So we need to know, which of
24 * the two timers is used
26 struct clock_event_device *global_clock_event;
29 * Initialize the PIT timer.
31 * This is also called after resume to bring the PIT into operation again.
33 static void init_pit_timer(enum clock_event_mode mode,
34 struct clock_event_device *evt)
38 spin_lock_irqsave(&i8253_lock, flags);
41 case CLOCK_EVT_MODE_PERIODIC:
42 /* binary, mode 2, LSB/MSB, ch 0 */
43 outb_p(0x34, PIT_MODE);
44 outb_p(LATCH & 0xff , PIT_CH0); /* LSB */
45 outb(LATCH >> 8 , PIT_CH0); /* MSB */
48 case CLOCK_EVT_MODE_SHUTDOWN:
49 case CLOCK_EVT_MODE_UNUSED:
50 outb_p(0x30, PIT_MODE);
51 outb_p(0, PIT_CH0); /* LSB */
52 outb_p(0, PIT_CH0); /* MSB */
55 case CLOCK_EVT_MODE_ONESHOT:
57 outb_p(0x38, PIT_MODE);
60 case CLOCK_EVT_MODE_RESUME:
61 /* Nothing to do here */
64 spin_unlock_irqrestore(&i8253_lock, flags);
68 * Program the next event in oneshot mode
70 * Delta is given in PIT ticks
72 static int pit_next_event(unsigned long delta, struct clock_event_device *evt)
76 spin_lock_irqsave(&i8253_lock, flags);
77 outb_p(delta & 0xff , PIT_CH0); /* LSB */
78 outb(delta >> 8 , PIT_CH0); /* MSB */
79 spin_unlock_irqrestore(&i8253_lock, flags);
85 * On UP the PIT can serve all of the possible timer functions. On SMP systems
86 * it can be solely used for the global tick.
88 * The profiling and update capabilites are switched off once the local apic is
89 * registered. This mechanism replaces the previous #ifdef LOCAL_APIC -
90 * !using_apic_timer decisions in do_timer_interrupt_hook()
92 struct clock_event_device pit_clockevent = {
94 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
95 .set_mode = init_pit_timer,
96 .set_next_event = pit_next_event,
102 * Initialize the conversion factor and the min/max deltas of the clock event
103 * structure and register the clock event source with the framework.
105 void __init setup_pit_timer(void)
108 * Start pit with the boot cpu mask and make it global after the
109 * IO_APIC has been initialized.
111 pit_clockevent.cpumask = cpumask_of_cpu(smp_processor_id());
112 pit_clockevent.mult = div_sc(CLOCK_TICK_RATE, NSEC_PER_SEC, 32);
113 pit_clockevent.max_delta_ns =
114 clockevent_delta2ns(0x7FFF, &pit_clockevent);
115 pit_clockevent.min_delta_ns =
116 clockevent_delta2ns(0xF, &pit_clockevent);
117 clockevents_register_device(&pit_clockevent);
118 global_clock_event = &pit_clockevent;
122 * Since the PIT overflows every tick, its not very useful
123 * to just read by itself. So use jiffies to emulate a free
126 static cycle_t pit_read(void)
131 static int old_count;
134 spin_lock_irqsave(&i8253_lock, flags);
136 * Although our caller may have the read side of xtime_lock,
137 * this is now a seqlock, and we are cheating in this routine
138 * by having side effects on state that we cannot undo if
139 * there is a collision on the seqlock and our caller has to
140 * retry. (Namely, old_jifs and old_count.) So we must treat
141 * jiffies as volatile despite the lock. We read jiffies
142 * before latching the timer count to guarantee that although
143 * the jiffies value might be older than the count (that is,
144 * the counter may underflow between the last point where
145 * jiffies was incremented and the point where we latch the
146 * count), it cannot be newer.
149 outb_p(0x00, PIT_MODE); /* latch the count ASAP */
150 count = inb_p(PIT_CH0); /* read the latched count */
151 count |= inb_p(PIT_CH0) << 8;
153 /* VIA686a test code... reset the latch if count > max + 1 */
155 outb_p(0x34, PIT_MODE);
156 outb_p(LATCH & 0xff, PIT_CH0);
157 outb(LATCH >> 8, PIT_CH0);
162 * It's possible for count to appear to go the wrong way for a
165 * 1. The timer counter underflows, but we haven't handled the
166 * resulting interrupt and incremented jiffies yet.
167 * 2. Hardware problem with the timer, not giving us continuous time,
168 * the counter does small "jumps" upwards on some Pentium systems,
169 * (see c't 95/10 page 335 for Neptun bug.)
171 * Previous attempts to handle these cases intelligently were
172 * buggy, so we just do the simple thing now.
174 if (count > old_count && jifs == old_jifs) {
180 spin_unlock_irqrestore(&i8253_lock, flags);
182 count = (LATCH - 1) - count;
184 return (cycle_t)(jifs * LATCH) + count;
187 static struct clocksource clocksource_pit = {
191 .mask = CLOCKSOURCE_MASK(32),
196 static int __init init_pit_clocksource(void)
198 if (num_possible_cpus() > 1) /* PIT does not scale! */
201 clocksource_pit.mult = clocksource_hz2mult(CLOCK_TICK_RATE, 20);
202 return clocksource_register(&clocksource_pit);
204 arch_initcall(init_pit_clocksource);