arch/ia64/kernel/irq_ia64.c

   1 /*
   2  * linux/arch/ia64/kernel/irq_ia64.c
   3  *
   4  * Copyright (C) 1998-2001 Hewlett-Packard Co
   5  *      Stephane Eranian <eranian@hpl.hp.com>
   6  *      David Mosberger-Tang <davidm@hpl.hp.com>
   7  *
   8  *  6/10/99: Updated to bring in sync with x86 version to facilitate
   9  *           support for SMP and different interrupt controllers.
  10  *
  11  * 09/15/00 Goutham Rao <goutham.rao@intel.com> Implemented pci_irq_to_vector
  12  *                      PCI to vector allocation routine.
  13  * 04/14/2004 Ashok Raj <ashok.raj@intel.com>
  14  *                                              Added CPU Hotplug handling for IPF.
  15  */
  16
  17 #include <linux/module.h>
  18
  19 #include <linux/jiffies.h>
  20 #include <linux/errno.h>
  21 #include <linux/init.h>
  22 #include <linux/interrupt.h>
  23 #include <linux/ioport.h>
  24 #include <linux/kernel_stat.h>
  25 #include <linux/slab.h>
  26 #include <linux/ptrace.h>
  27 #include <linux/random.h>       /* for rand_initialize_irq() */
  28 #include <linux/signal.h>
  29 #include <linux/smp.h>
  30 #include <linux/threads.h>
  31 #include <linux/bitops.h>
  32 #include <linux/irq.h>
  33
  34 #include <asm/delay.h>
  35 #include <asm/intrinsics.h>
  36 #include <asm/io.h>
  37 #include <asm/hw_irq.h>
  38 #include <asm/machvec.h>
  39 #include <asm/pgtable.h>
  40 #include <asm/system.h>
  41 #include <asm/tlbflush.h>
  42
  43 #ifdef CONFIG_PERFMON
  44 # include <asm/perfmon.h>
  45 #endif
  46
  47 #define IRQ_DEBUG       0
  48
  49 #define IRQ_VECTOR_UNASSIGNED   (0)
  50
  51 #define IRQ_UNUSED              (0)
  52 #define IRQ_USED                (1)
  53 #define IRQ_RSVD                (2)
  54
  55 /* These can be overridden in platform_irq_init */
  56 int ia64_first_device_vector = IA64_DEF_FIRST_DEVICE_VECTOR;
  57 int ia64_last_device_vector = IA64_DEF_LAST_DEVICE_VECTOR;
  58
  59 /* default base addr of IPI table */
  60 void __iomem *ipi_base_addr = ((void __iomem *)
  61                                (__IA64_UNCACHED_OFFSET | IA64_IPI_DEFAULT_BASE_ADDR));
  62
  63 static cpumask_t vector_allocation_domain(int cpu);
  64
  65 /*
  66  * Legacy IRQ to IA-64 vector translation table.
  67  */
  68 __u8 isa_irq_to_vector_map[16] = {
  69         /* 8259 IRQ translation, first 16 entries */
  70         0x2f, 0x20, 0x2e, 0x2d, 0x2c, 0x2b, 0x2a, 0x29,
  71         0x28, 0x27, 0x26, 0x25, 0x24, 0x23, 0x22, 0x21
  72 };
  73 EXPORT_SYMBOL(isa_irq_to_vector_map);
  74
  75 DEFINE_SPINLOCK(vector_lock);
  76
  77 struct irq_cfg irq_cfg[NR_IRQS] __read_mostly = {
  78         [0 ... NR_IRQS - 1] = {
  79                 .vector = IRQ_VECTOR_UNASSIGNED,
  80                 .domain = CPU_MASK_NONE
  81         }
  82 };
  83
  84 DEFINE_PER_CPU(int[IA64_NUM_VECTORS], vector_irq) = {
  85         [0 ... IA64_NUM_VECTORS - 1] = IA64_SPURIOUS_INT_VECTOR
  86 };
  87
  88 static cpumask_t vector_table[IA64_MAX_DEVICE_VECTORS] = {
  89         [0 ... IA64_MAX_DEVICE_VECTORS - 1] = CPU_MASK_NONE
  90 };
  91
  92 static int irq_status[NR_IRQS] = {
  93         [0 ... NR_IRQS -1] = IRQ_UNUSED
  94 };
  95
  96 int check_irq_used(int irq)
  97 {
  98         if (irq_status[irq] == IRQ_USED)
  99                 return 1;
 100
 101         return -1;
 102 }
 103
 104 static void reserve_irq(unsigned int irq)
 105 {
 106         unsigned long flags;
 107
 108         spin_lock_irqsave(&vector_lock, flags);
 109         irq_status[irq] = IRQ_RSVD;
 110         spin_unlock_irqrestore(&vector_lock, flags);
 111 }
 112
 113 static inline int find_unassigned_irq(void)
 114 {
 115         int irq;
 116
 117         for (irq = IA64_FIRST_DEVICE_VECTOR; irq < NR_IRQS; irq++)
 118                 if (irq_status[irq] == IRQ_UNUSED)
 119                         return irq;
 120         return -ENOSPC;
 121 }
 122
 123 static inline int find_unassigned_vector(cpumask_t domain)
 124 {
 125         cpumask_t mask;
 126         int pos;
 127
 128         cpus_and(mask, domain, cpu_online_map);
 129         if (cpus_empty(mask))
 130                 return -EINVAL;
 131
 132         for (pos = 0; pos < IA64_NUM_DEVICE_VECTORS; pos++) {
 133                 cpus_and(mask, domain, vector_table[pos]);
 134                 if (!cpus_empty(mask))
 135                         continue;
 136                 return IA64_FIRST_DEVICE_VECTOR + pos;
 137         }
 138         return -ENOSPC;
 139 }
 140
 141 static int __bind_irq_vector(int irq, int vector, cpumask_t domain)
 142 {
 143         cpumask_t mask;
 144         int cpu, pos;
 145         struct irq_cfg *cfg = &irq_cfg[irq];
 146
 147         cpus_and(mask, domain, cpu_online_map);
 148         if (cpus_empty(mask))
 149                 return -EINVAL;
 150         if ((cfg->vector == vector) && cpus_equal(cfg->domain, domain))
 151                 return 0;
 152         if (cfg->vector != IRQ_VECTOR_UNASSIGNED)
 153                 return -EBUSY;
 154         for_each_cpu_mask(cpu, mask)
 155                 per_cpu(vector_irq, cpu)[vector] = irq;
 156         cfg->vector = vector;
 157         cfg->domain = domain;
 158         irq_status[irq] = IRQ_USED;
 159         pos = vector - IA64_FIRST_DEVICE_VECTOR;
 160         cpus_or(vector_table[pos], vector_table[pos], domain);
 161         return 0;
 162 }
 163
 164 int bind_irq_vector(int irq, int vector, cpumask_t domain)
 165 {
 166         unsigned long flags;
 167         int ret;
 168
 169         spin_lock_irqsave(&vector_lock, flags);
 170         ret = __bind_irq_vector(irq, vector, domain);
 171         spin_unlock_irqrestore(&vector_lock, flags);
 172         return ret;
 173 }
 174
 175 static void __clear_irq_vector(int irq)
 176 {
 177         int vector, cpu, pos;
 178         cpumask_t mask;
 179         cpumask_t domain;
 180         struct irq_cfg *cfg = &irq_cfg[irq];
 181
 182         BUG_ON((unsigned)irq >= NR_IRQS);
 183         BUG_ON(cfg->vector == IRQ_VECTOR_UNASSIGNED);
 184         vector = cfg->vector;
 185         domain = cfg->domain;
 186         cpus_and(mask, cfg->domain, cpu_online_map);
 187         for_each_cpu_mask(cpu, mask)
 188                 per_cpu(vector_irq, cpu)[vector] = IA64_SPURIOUS_INT_VECTOR;
 189         cfg->vector = IRQ_VECTOR_UNASSIGNED;
 190         cfg->domain = CPU_MASK_NONE;
 191         irq_status[irq] = IRQ_UNUSED;
 192         pos = vector - IA64_FIRST_DEVICE_VECTOR;
 193         cpus_andnot(vector_table[pos], vector_table[pos], domain);
 194 }
 195
 196 static void clear_irq_vector(int irq)
 197 {
 198         unsigned long flags;
 199
 200         spin_lock_irqsave(&vector_lock, flags);
 201         __clear_irq_vector(irq);
 202         spin_unlock_irqrestore(&vector_lock, flags);
 203 }
 204
 205 int
 206 assign_irq_vector (int irq)
 207 {
 208         unsigned long flags;
 209         int vector, cpu;
 210         cpumask_t domain;
 211
 212         vector = -ENOSPC;
 213
 214         spin_lock_irqsave(&vector_lock, flags);
 215         for_each_online_cpu(cpu) {
 216                 domain = vector_allocation_domain(cpu);
 217                 vector = find_unassigned_vector(domain);
 218                 if (vector >= 0)
 219                         break;
 220         }
 221         if (vector < 0)
 222                 goto out;
 223         if (irq == AUTO_ASSIGN)
 224                 irq = vector;
 225         BUG_ON(__bind_irq_vector(irq, vector, domain));
 226  out:
 227         spin_unlock_irqrestore(&vector_lock, flags);
 228         return vector;
 229 }
 230
 231 void
 232 free_irq_vector (int vector)
 233 {
 234         if (vector < IA64_FIRST_DEVICE_VECTOR ||
 235             vector > IA64_LAST_DEVICE_VECTOR)
 236                 return;
 237         clear_irq_vector(vector);
 238 }
 239
 240 int
 241 reserve_irq_vector (int vector)
 242 {
 243         if (vector < IA64_FIRST_DEVICE_VECTOR ||
 244             vector > IA64_LAST_DEVICE_VECTOR)
 245                 return -EINVAL;
 246         return !!bind_irq_vector(vector, vector, CPU_MASK_ALL);
 247 }
 248
 249 /*
 250  * Initialize vector_irq on a new cpu. This function must be called
 251  * with vector_lock held.
 252  */
 253 void __setup_vector_irq(int cpu)
 254 {
 255         int irq, vector;
 256
 257         /* Clear vector_irq */
 258         for (vector = 0; vector < IA64_NUM_VECTORS; ++vector)
 259                 per_cpu(vector_irq, cpu)[vector] = IA64_SPURIOUS_INT_VECTOR;
 260         /* Mark the inuse vectors */
 261         for (irq = 0; irq < NR_IRQS; ++irq) {
 262                 if (!cpu_isset(cpu, irq_cfg[irq].domain))
 263                         continue;
 264                 vector = irq_to_vector(irq);
 265                 per_cpu(vector_irq, cpu)[vector] = irq;
 266         }
 267 }
 268
 269 #if defined(CONFIG_SMP) && (defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_DIG))
 270 static enum vector_domain_type {
 271         VECTOR_DOMAIN_NONE,
 272         VECTOR_DOMAIN_PERCPU
 273 } vector_domain_type = VECTOR_DOMAIN_NONE;
 274
 275 static cpumask_t vector_allocation_domain(int cpu)
 276 {
 277         if (vector_domain_type == VECTOR_DOMAIN_PERCPU)
 278                 return cpumask_of_cpu(cpu);
 279         return CPU_MASK_ALL;
 280 }
 281
 282 static int __init parse_vector_domain(char *arg)
 283 {
 284         if (!arg)
 285                 return -EINVAL;
 286         if (!strcmp(arg, "percpu")) {
 287                 vector_domain_type = VECTOR_DOMAIN_PERCPU;
 288                 no_int_routing = 1;
 289         }
 290         return 1;
 291 }
 292 early_param("vector", parse_vector_domain);
 293 #else
 294 static cpumask_t vector_allocation_domain(int cpu)
 295 {
 296         return CPU_MASK_ALL;
 297 }
 298 #endif
 299
 300
 301 void destroy_and_reserve_irq(unsigned int irq)
 302 {
 303         dynamic_irq_cleanup(irq);
 304
 305         clear_irq_vector(irq);
 306         reserve_irq(irq);
 307 }
 308
 309 static int __reassign_irq_vector(int irq, int cpu)
 310 {
 311         struct irq_cfg *cfg = &irq_cfg[irq];
 312         int vector;
 313         cpumask_t domain;
 314
 315         if (cfg->vector == IRQ_VECTOR_UNASSIGNED || !cpu_online(cpu))
 316                 return -EINVAL;
 317         if (cpu_isset(cpu, cfg->domain))
 318                 return 0;
 319         domain = vector_allocation_domain(cpu);
 320         vector = find_unassigned_vector(domain);
 321         if (vector < 0)
 322                 return -ENOSPC;
 323         __clear_irq_vector(irq);
 324         BUG_ON(__bind_irq_vector(irq, vector, domain));
 325         return 0;
 326 }
 327
 328 int reassign_irq_vector(int irq, int cpu)
 329 {
 330         unsigned long flags;
 331         int ret;
 332
 333         spin_lock_irqsave(&vector_lock, flags);
 334         ret = __reassign_irq_vector(irq, cpu);
 335         spin_unlock_irqrestore(&vector_lock, flags);
 336         return ret;
 337 }
 338
 339 /*
 340  * Dynamic irq allocate and deallocation for MSI
 341  */
 342 int create_irq(void)
 343 {
 344         unsigned long flags;
 345         int irq, vector, cpu;
 346         cpumask_t domain;
 347
 348         irq = vector = -ENOSPC;
 349         spin_lock_irqsave(&vector_lock, flags);
 350         for_each_online_cpu(cpu) {
 351                 domain = vector_allocation_domain(cpu);
 352                 vector = find_unassigned_vector(domain);
 353                 if (vector >= 0)
 354                         break;
 355         }
 356         if (vector < 0)
 357                 goto out;
 358         irq = find_unassigned_irq();
 359         if (irq < 0)
 360                 goto out;
 361         BUG_ON(__bind_irq_vector(irq, vector, domain));
 362  out:
 363         spin_unlock_irqrestore(&vector_lock, flags);
 364         if (irq >= 0)
 365                 dynamic_irq_init(irq);
 366         return irq;
 367 }
 368
 369 void destroy_irq(unsigned int irq)
 370 {
 371         dynamic_irq_cleanup(irq);
 372         clear_irq_vector(irq);
 373 }
 374
 375 #ifdef CONFIG_SMP
 376 #       define IS_RESCHEDULE(vec)       (vec == IA64_IPI_RESCHEDULE)
 377 #       define IS_LOCAL_TLB_FLUSH(vec)  (vec == IA64_IPI_LOCAL_TLB_FLUSH)
 378 #else
 379 #       define IS_RESCHEDULE(vec)       (0)
 380 #       define IS_LOCAL_TLB_FLUSH(vec)  (0)
 381 #endif
 382 /*
 383  * That's where the IVT branches when we get an external
 384  * interrupt. This branches to the correct hardware IRQ handler via
 385  * function ptr.
 386  */
 387 void
 388 ia64_handle_irq (ia64_vector vector, struct pt_regs *regs)
 389 {
 390         struct pt_regs *old_regs = set_irq_regs(regs);
 391         unsigned long saved_tpr;
 392
 393 #if IRQ_DEBUG
 394         {
 395                 unsigned long bsp, sp;
 396
 397                 /*
 398                  * Note: if the interrupt happened while executing in
 399                  * the context switch routine (ia64_switch_to), we may
 400                  * get a spurious stack overflow here.  This is
 401                  * because the register and the memory stack are not
 402                  * switched atomically.
 403                  */
 404                 bsp = ia64_getreg(_IA64_REG_AR_BSP);
 405                 sp = ia64_getreg(_IA64_REG_SP);
 406
 407                 if ((sp - bsp) < 1024) {
 408                         static unsigned char count;
 409                         static long last_time;
 410
 411                         if (jiffies - last_time > 5*HZ)
 412                                 count = 0;
 413                         if (++count < 5) {
 414                                 last_time = jiffies;
 415                                 printk("ia64_handle_irq: DANGER: less than "
 416                                        "1KB of free stack space!!\n"
 417                                        "(bsp=0x%lx, sp=%lx)\n", bsp, sp);
 418                         }
 419                 }
 420         }
 421 #endif /* IRQ_DEBUG */
 422
 423         /*
 424          * Always set TPR to limit maximum interrupt nesting depth to
 425          * 16 (without this, it would be ~240, which could easily lead
 426          * to kernel stack overflows).
 427          */
 428         irq_enter();
 429         saved_tpr = ia64_getreg(_IA64_REG_CR_TPR);
 430         ia64_srlz_d();
 431         while (vector != IA64_SPURIOUS_INT_VECTOR) {
 432                 if (unlikely(IS_LOCAL_TLB_FLUSH(vector))) {
 433                         smp_local_flush_tlb();
 434                         kstat_this_cpu.irqs[vector]++;
 435                 } else if (unlikely(IS_RESCHEDULE(vector)))
 436                         kstat_this_cpu.irqs[vector]++;
 437                 else {
 438                         ia64_setreg(_IA64_REG_CR_TPR, vector);
 439                         ia64_srlz_d();
 440
 441                         generic_handle_irq(local_vector_to_irq(vector));
 442
 443                         /*
 444                          * Disable interrupts and send EOI:
 445                          */
 446                         local_irq_disable();
 447                         ia64_setreg(_IA64_REG_CR_TPR, saved_tpr);
 448                 }
 449                 ia64_eoi();
 450                 vector = ia64_get_ivr();
 451         }
 452         /*
 453          * This must be done *after* the ia64_eoi().  For example, the keyboard softirq
 454          * handler needs to be able to wait for further keyboard interrupts, which can't
 455          * come through until ia64_eoi() has been done.
 456          */
 457         irq_exit();
 458         set_irq_regs(old_regs);
 459 }
 460
 461 #ifdef CONFIG_HOTPLUG_CPU
 462 /*
 463  * This function emulates a interrupt processing when a cpu is about to be
 464  * brought down.
 465  */
 466 void ia64_process_pending_intr(void)
 467 {
 468         ia64_vector vector;
 469         unsigned long saved_tpr;
 470         extern unsigned int vectors_in_migration[NR_IRQS];
 471
 472         vector = ia64_get_ivr();
 473
 474          irq_enter();
 475          saved_tpr = ia64_getreg(_IA64_REG_CR_TPR);
 476          ia64_srlz_d();
 477
 478          /*
 479           * Perform normal interrupt style processing
 480           */
 481         while (vector != IA64_SPURIOUS_INT_VECTOR) {
 482                 if (unlikely(IS_LOCAL_TLB_FLUSH(vector))) {
 483                         smp_local_flush_tlb();
 484                         kstat_this_cpu.irqs[vector]++;
 485                 } else if (unlikely(IS_RESCHEDULE(vector)))
 486                         kstat_this_cpu.irqs[vector]++;
 487                 else {
 488                         struct pt_regs *old_regs = set_irq_regs(NULL);
 489
 490                         ia64_setreg(_IA64_REG_CR_TPR, vector);
 491                         ia64_srlz_d();
 492
 493                         /*
 494                          * Now try calling normal ia64_handle_irq as it would have got called
 495                          * from a real intr handler. Try passing null for pt_regs, hopefully
 496                          * it will work. I hope it works!.
 497                          * Probably could shared code.
 498                          */
 499                         vectors_in_migration[local_vector_to_irq(vector)]=0;
 500                         generic_handle_irq(local_vector_to_irq(vector));
 501                         set_irq_regs(old_regs);
 502
 503                         /*
 504                          * Disable interrupts and send EOI
 505                          */
 506                         local_irq_disable();
 507                         ia64_setreg(_IA64_REG_CR_TPR, saved_tpr);
 508                 }
 509                 ia64_eoi();
 510                 vector = ia64_get_ivr();
 511         }
 512         irq_exit();
 513 }
 514 #endif
 515
 516
 517 #ifdef CONFIG_SMP
 518
 519 static irqreturn_t dummy_handler (int irq, void *dev_id)
 520 {
 521         BUG();
 522 }
 523 extern irqreturn_t handle_IPI (int irq, void *dev_id);
 524
 525 static struct irqaction ipi_irqaction = {
 526         .handler =      handle_IPI,
 527         .flags =        IRQF_DISABLED,
 528         .name =         "IPI"
 529 };
 530
 531 static struct irqaction resched_irqaction = {
 532         .handler =      dummy_handler,
 533         .flags =        IRQF_DISABLED,
 534         .name =         "resched"
 535 };
 536
 537 static struct irqaction tlb_irqaction = {
 538         .handler =      dummy_handler,
 539         .flags =        IRQF_DISABLED,
 540         .name =         "tlb_flush"
 541 };
 542
 543 #endif
 544
 545 void
 546 register_percpu_irq (ia64_vector vec, struct irqaction *action)
 547 {
 548         irq_desc_t *desc;
 549         unsigned int irq;
 550
 551         irq = vec;
 552         BUG_ON(bind_irq_vector(irq, vec, CPU_MASK_ALL));
 553         desc = irq_desc + irq;
 554         desc->status |= IRQ_PER_CPU;
 555         desc->chip = &irq_type_ia64_lsapic;
 556         if (action)
 557                 setup_irq(irq, action);
 558 }
 559
 560 void __init
 561 init_IRQ (void)
 562 {
 563         register_percpu_irq(IA64_SPURIOUS_INT_VECTOR, NULL);
 564 #ifdef CONFIG_SMP
 565         register_percpu_irq(IA64_IPI_VECTOR, &ipi_irqaction);
 566         register_percpu_irq(IA64_IPI_RESCHEDULE, &resched_irqaction);
 567         register_percpu_irq(IA64_IPI_LOCAL_TLB_FLUSH, &tlb_irqaction);
 568 #endif
 569 #ifdef CONFIG_PERFMON
 570         pfm_init_percpu();
 571 #endif
 572         platform_irq_init();
 573 }
 574
 575 void
 576 ia64_send_ipi (int cpu, int vector, int delivery_mode, int redirect)
 577 {
 578         void __iomem *ipi_addr;
 579         unsigned long ipi_data;
 580         unsigned long phys_cpu_id;
 581
 582 #ifdef CONFIG_SMP
 583         phys_cpu_id = cpu_physical_id(cpu);
 584 #else
 585         phys_cpu_id = (ia64_getreg(_IA64_REG_CR_LID) >> 16) & 0xffff;
 586 #endif
 587
 588         /*
 589          * cpu number is in 8bit ID and 8bit EID
 590          */
 591
 592         ipi_data = (delivery_mode << 8) | (vector & 0xff);
 593         ipi_addr = ipi_base_addr + ((phys_cpu_id << 4) | ((redirect & 1) << 3));
 594
 595         writeq(ipi_data, ipi_addr);
 596 }