2 * linux/arch/ia64/kernel/irq_ia64.c
4 * Copyright (C) 1998-2001 Hewlett-Packard Co
5 * Stephane Eranian <eranian@hpl.hp.com>
6 * David Mosberger-Tang <davidm@hpl.hp.com>
8 * 6/10/99: Updated to bring in sync with x86 version to facilitate
9 * support for SMP and different interrupt controllers.
11 * 09/15/00 Goutham Rao <goutham.rao@intel.com> Implemented pci_irq_to_vector
12 * PCI to vector allocation routine.
13 * 04/14/2004 Ashok Raj <ashok.raj@intel.com>
14 * Added CPU Hotplug handling for IPF.
17 #include <linux/module.h>
19 #include <linux/jiffies.h>
20 #include <linux/errno.h>
21 #include <linux/init.h>
22 #include <linux/interrupt.h>
23 #include <linux/ioport.h>
24 #include <linux/kernel_stat.h>
25 #include <linux/ptrace.h>
26 #include <linux/signal.h>
27 #include <linux/smp.h>
28 #include <linux/threads.h>
29 #include <linux/bitops.h>
30 #include <linux/irq.h>
31 #include <linux/ratelimit.h>
32 #include <linux/acpi.h>
33 #include <linux/sched.h>
35 #include <asm/delay.h>
36 #include <asm/intrinsics.h>
38 #include <asm/hw_irq.h>
39 #include <asm/machvec.h>
40 #include <asm/pgtable.h>
41 #include <asm/tlbflush.h>
44 # include <asm/perfmon.h>
49 #define IRQ_VECTOR_UNASSIGNED (0)
51 #define IRQ_UNUSED (0)
55 /* These can be overridden in platform_irq_init */
56 int ia64_first_device_vector = IA64_DEF_FIRST_DEVICE_VECTOR;
57 int ia64_last_device_vector = IA64_DEF_LAST_DEVICE_VECTOR;
59 /* default base addr of IPI table */
60 void __iomem *ipi_base_addr = ((void __iomem *)
61 (__IA64_UNCACHED_OFFSET | IA64_IPI_DEFAULT_BASE_ADDR));
63 static cpumask_t vector_allocation_domain(int cpu);
66 * Legacy IRQ to IA-64 vector translation table.
68 __u8 isa_irq_to_vector_map[16] = {
69 /* 8259 IRQ translation, first 16 entries */
70 0x2f, 0x20, 0x2e, 0x2d, 0x2c, 0x2b, 0x2a, 0x29,
71 0x28, 0x27, 0x26, 0x25, 0x24, 0x23, 0x22, 0x21
73 EXPORT_SYMBOL(isa_irq_to_vector_map);
75 DEFINE_SPINLOCK(vector_lock);
77 struct irq_cfg irq_cfg[NR_IRQS] __read_mostly = {
78 [0 ... NR_IRQS - 1] = {
79 .vector = IRQ_VECTOR_UNASSIGNED,
80 .domain = CPU_MASK_NONE
84 DEFINE_PER_CPU(int[IA64_NUM_VECTORS], vector_irq) = {
85 [0 ... IA64_NUM_VECTORS - 1] = -1
88 static cpumask_t vector_table[IA64_NUM_VECTORS] = {
89 [0 ... IA64_NUM_VECTORS - 1] = CPU_MASK_NONE
92 static int irq_status[NR_IRQS] = {
93 [0 ... NR_IRQS -1] = IRQ_UNUSED
96 static inline int find_unassigned_irq(void)
100 for (irq = IA64_FIRST_DEVICE_VECTOR; irq < NR_IRQS; irq++)
101 if (irq_status[irq] == IRQ_UNUSED)
106 static inline int find_unassigned_vector(cpumask_t domain)
111 cpumask_and(&mask, &domain, cpu_online_mask);
112 if (cpus_empty(mask))
115 for (pos = 0; pos < IA64_NUM_DEVICE_VECTORS; pos++) {
116 vector = IA64_FIRST_DEVICE_VECTOR + pos;
117 cpus_and(mask, domain, vector_table[vector]);
118 if (!cpus_empty(mask))
125 static int __bind_irq_vector(int irq, int vector, cpumask_t domain)
129 struct irq_cfg *cfg = &irq_cfg[irq];
131 BUG_ON((unsigned)irq >= NR_IRQS);
132 BUG_ON((unsigned)vector >= IA64_NUM_VECTORS);
134 cpumask_and(&mask, &domain, cpu_online_mask);
135 if (cpus_empty(mask))
137 if ((cfg->vector == vector) && cpus_equal(cfg->domain, domain))
139 if (cfg->vector != IRQ_VECTOR_UNASSIGNED)
141 for_each_cpu_mask(cpu, mask)
142 per_cpu(vector_irq, cpu)[vector] = irq;
143 cfg->vector = vector;
144 cfg->domain = domain;
145 irq_status[irq] = IRQ_USED;
146 cpus_or(vector_table[vector], vector_table[vector], domain);
150 int bind_irq_vector(int irq, int vector, cpumask_t domain)
155 spin_lock_irqsave(&vector_lock, flags);
156 ret = __bind_irq_vector(irq, vector, domain);
157 spin_unlock_irqrestore(&vector_lock, flags);
161 static void __clear_irq_vector(int irq)
166 struct irq_cfg *cfg = &irq_cfg[irq];
168 BUG_ON((unsigned)irq >= NR_IRQS);
169 BUG_ON(cfg->vector == IRQ_VECTOR_UNASSIGNED);
170 vector = cfg->vector;
171 domain = cfg->domain;
172 cpumask_and(&mask, &cfg->domain, cpu_online_mask);
173 for_each_cpu_mask(cpu, mask)
174 per_cpu(vector_irq, cpu)[vector] = -1;
175 cfg->vector = IRQ_VECTOR_UNASSIGNED;
176 cfg->domain = CPU_MASK_NONE;
177 irq_status[irq] = IRQ_UNUSED;
178 cpus_andnot(vector_table[vector], vector_table[vector], domain);
181 static void clear_irq_vector(int irq)
185 spin_lock_irqsave(&vector_lock, flags);
186 __clear_irq_vector(irq);
187 spin_unlock_irqrestore(&vector_lock, flags);
191 ia64_native_assign_irq_vector (int irq)
195 cpumask_t domain = CPU_MASK_NONE;
199 spin_lock_irqsave(&vector_lock, flags);
200 for_each_online_cpu(cpu) {
201 domain = vector_allocation_domain(cpu);
202 vector = find_unassigned_vector(domain);
208 if (irq == AUTO_ASSIGN)
210 BUG_ON(__bind_irq_vector(irq, vector, domain));
212 spin_unlock_irqrestore(&vector_lock, flags);
217 ia64_native_free_irq_vector (int vector)
219 if (vector < IA64_FIRST_DEVICE_VECTOR ||
220 vector > IA64_LAST_DEVICE_VECTOR)
222 clear_irq_vector(vector);
226 reserve_irq_vector (int vector)
228 if (vector < IA64_FIRST_DEVICE_VECTOR ||
229 vector > IA64_LAST_DEVICE_VECTOR)
231 return !!bind_irq_vector(vector, vector, CPU_MASK_ALL);
235 * Initialize vector_irq on a new cpu. This function must be called
236 * with vector_lock held.
238 void __setup_vector_irq(int cpu)
242 /* Clear vector_irq */
243 for (vector = 0; vector < IA64_NUM_VECTORS; ++vector)
244 per_cpu(vector_irq, cpu)[vector] = -1;
245 /* Mark the inuse vectors */
246 for (irq = 0; irq < NR_IRQS; ++irq) {
247 if (!cpu_isset(cpu, irq_cfg[irq].domain))
249 vector = irq_to_vector(irq);
250 per_cpu(vector_irq, cpu)[vector] = irq;
254 #if defined(CONFIG_SMP) && (defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_DIG))
256 static enum vector_domain_type {
259 } vector_domain_type = VECTOR_DOMAIN_NONE;
261 static cpumask_t vector_allocation_domain(int cpu)
263 if (vector_domain_type == VECTOR_DOMAIN_PERCPU)
264 return cpumask_of_cpu(cpu);
268 static int __irq_prepare_move(int irq, int cpu)
270 struct irq_cfg *cfg = &irq_cfg[irq];
274 if (cfg->move_in_progress || cfg->move_cleanup_count)
276 if (cfg->vector == IRQ_VECTOR_UNASSIGNED || !cpu_online(cpu))
278 if (cpu_isset(cpu, cfg->domain))
280 domain = vector_allocation_domain(cpu);
281 vector = find_unassigned_vector(domain);
284 cfg->move_in_progress = 1;
285 cfg->old_domain = cfg->domain;
286 cfg->vector = IRQ_VECTOR_UNASSIGNED;
287 cfg->domain = CPU_MASK_NONE;
288 BUG_ON(__bind_irq_vector(irq, vector, domain));
292 int irq_prepare_move(int irq, int cpu)
297 spin_lock_irqsave(&vector_lock, flags);
298 ret = __irq_prepare_move(irq, cpu);
299 spin_unlock_irqrestore(&vector_lock, flags);
303 void irq_complete_move(unsigned irq)
305 struct irq_cfg *cfg = &irq_cfg[irq];
306 cpumask_t cleanup_mask;
309 if (likely(!cfg->move_in_progress))
312 if (unlikely(cpu_isset(smp_processor_id(), cfg->old_domain)))
315 cpumask_and(&cleanup_mask, &cfg->old_domain, cpu_online_mask);
316 cfg->move_cleanup_count = cpus_weight(cleanup_mask);
317 for_each_cpu_mask(i, cleanup_mask)
318 platform_send_ipi(i, IA64_IRQ_MOVE_VECTOR, IA64_IPI_DM_INT, 0);
319 cfg->move_in_progress = 0;
322 static irqreturn_t smp_irq_move_cleanup_interrupt(int irq, void *dev_id)
324 int me = smp_processor_id();
328 for (vector = IA64_FIRST_DEVICE_VECTOR;
329 vector < IA64_LAST_DEVICE_VECTOR; vector++) {
331 struct irq_desc *desc;
333 irq = __get_cpu_var(vector_irq)[vector];
337 desc = irq_to_desc(irq);
339 raw_spin_lock(&desc->lock);
340 if (!cfg->move_cleanup_count)
343 if (!cpu_isset(me, cfg->old_domain))
346 spin_lock_irqsave(&vector_lock, flags);
347 __get_cpu_var(vector_irq)[vector] = -1;
348 cpu_clear(me, vector_table[vector]);
349 spin_unlock_irqrestore(&vector_lock, flags);
350 cfg->move_cleanup_count--;
352 raw_spin_unlock(&desc->lock);
357 static struct irqaction irq_move_irqaction = {
358 .handler = smp_irq_move_cleanup_interrupt,
362 static int __init parse_vector_domain(char *arg)
366 if (!strcmp(arg, "percpu")) {
367 vector_domain_type = VECTOR_DOMAIN_PERCPU;
372 early_param("vector", parse_vector_domain);
374 static cpumask_t vector_allocation_domain(int cpu)
381 void destroy_and_reserve_irq(unsigned int irq)
386 spin_lock_irqsave(&vector_lock, flags);
387 __clear_irq_vector(irq);
388 irq_status[irq] = IRQ_RSVD;
389 spin_unlock_irqrestore(&vector_lock, flags);
393 * Dynamic irq allocate and deallocation for MSI
398 int irq, vector, cpu;
399 cpumask_t domain = CPU_MASK_NONE;
401 irq = vector = -ENOSPC;
402 spin_lock_irqsave(&vector_lock, flags);
403 for_each_online_cpu(cpu) {
404 domain = vector_allocation_domain(cpu);
405 vector = find_unassigned_vector(domain);
411 irq = find_unassigned_irq();
414 BUG_ON(__bind_irq_vector(irq, vector, domain));
416 spin_unlock_irqrestore(&vector_lock, flags);
422 void destroy_irq(unsigned int irq)
425 clear_irq_vector(irq);
429 # define IS_RESCHEDULE(vec) (vec == IA64_IPI_RESCHEDULE)
430 # define IS_LOCAL_TLB_FLUSH(vec) (vec == IA64_IPI_LOCAL_TLB_FLUSH)
432 # define IS_RESCHEDULE(vec) (0)
433 # define IS_LOCAL_TLB_FLUSH(vec) (0)
436 * That's where the IVT branches when we get an external
437 * interrupt. This branches to the correct hardware IRQ handler via
441 ia64_handle_irq (ia64_vector vector, struct pt_regs *regs)
443 struct pt_regs *old_regs = set_irq_regs(regs);
444 unsigned long saved_tpr;
448 unsigned long bsp, sp;
451 * Note: if the interrupt happened while executing in
452 * the context switch routine (ia64_switch_to), we may
453 * get a spurious stack overflow here. This is
454 * because the register and the memory stack are not
455 * switched atomically.
457 bsp = ia64_getreg(_IA64_REG_AR_BSP);
458 sp = ia64_getreg(_IA64_REG_SP);
460 if ((sp - bsp) < 1024) {
461 static DEFINE_RATELIMIT_STATE(ratelimit, 5 * HZ, 5);
463 if (__ratelimit(&ratelimit)) {
464 printk("ia64_handle_irq: DANGER: less than "
465 "1KB of free stack space!!\n"
466 "(bsp=0x%lx, sp=%lx)\n", bsp, sp);
470 #endif /* IRQ_DEBUG */
473 * Always set TPR to limit maximum interrupt nesting depth to
474 * 16 (without this, it would be ~240, which could easily lead
475 * to kernel stack overflows).
478 saved_tpr = ia64_getreg(_IA64_REG_CR_TPR);
480 while (vector != IA64_SPURIOUS_INT_VECTOR) {
481 int irq = local_vector_to_irq(vector);
483 if (unlikely(IS_LOCAL_TLB_FLUSH(vector))) {
484 smp_local_flush_tlb();
485 kstat_incr_irq_this_cpu(irq);
486 } else if (unlikely(IS_RESCHEDULE(vector))) {
488 kstat_incr_irq_this_cpu(irq);
490 ia64_setreg(_IA64_REG_CR_TPR, vector);
493 if (unlikely(irq < 0)) {
494 printk(KERN_ERR "%s: Unexpected interrupt "
495 "vector %d on CPU %d is not mapped "
496 "to any IRQ!\n", __func__, vector,
499 generic_handle_irq(irq);
502 * Disable interrupts and send EOI:
505 ia64_setreg(_IA64_REG_CR_TPR, saved_tpr);
508 vector = ia64_get_ivr();
511 * This must be done *after* the ia64_eoi(). For example, the keyboard softirq
512 * handler needs to be able to wait for further keyboard interrupts, which can't
513 * come through until ia64_eoi() has been done.
516 set_irq_regs(old_regs);
519 #ifdef CONFIG_HOTPLUG_CPU
521 * This function emulates a interrupt processing when a cpu is about to be
524 void ia64_process_pending_intr(void)
527 unsigned long saved_tpr;
528 extern unsigned int vectors_in_migration[NR_IRQS];
530 vector = ia64_get_ivr();
533 saved_tpr = ia64_getreg(_IA64_REG_CR_TPR);
537 * Perform normal interrupt style processing
539 while (vector != IA64_SPURIOUS_INT_VECTOR) {
540 int irq = local_vector_to_irq(vector);
542 if (unlikely(IS_LOCAL_TLB_FLUSH(vector))) {
543 smp_local_flush_tlb();
544 kstat_incr_irq_this_cpu(irq);
545 } else if (unlikely(IS_RESCHEDULE(vector))) {
546 kstat_incr_irq_this_cpu(irq);
548 struct pt_regs *old_regs = set_irq_regs(NULL);
550 ia64_setreg(_IA64_REG_CR_TPR, vector);
554 * Now try calling normal ia64_handle_irq as it would have got called
555 * from a real intr handler. Try passing null for pt_regs, hopefully
556 * it will work. I hope it works!.
557 * Probably could shared code.
559 if (unlikely(irq < 0)) {
560 printk(KERN_ERR "%s: Unexpected interrupt "
561 "vector %d on CPU %d not being mapped "
562 "to any IRQ!!\n", __func__, vector,
565 vectors_in_migration[irq]=0;
566 generic_handle_irq(irq);
568 set_irq_regs(old_regs);
571 * Disable interrupts and send EOI
574 ia64_setreg(_IA64_REG_CR_TPR, saved_tpr);
577 vector = ia64_get_ivr();
586 static irqreturn_t dummy_handler (int irq, void *dev_id)
591 static struct irqaction ipi_irqaction = {
592 .handler = handle_IPI,
597 * KVM uses this interrupt to force a cpu out of guest mode
599 static struct irqaction resched_irqaction = {
600 .handler = dummy_handler,
604 static struct irqaction tlb_irqaction = {
605 .handler = dummy_handler,
612 ia64_native_register_percpu_irq (ia64_vector vec, struct irqaction *action)
617 BUG_ON(bind_irq_vector(irq, vec, CPU_MASK_ALL));
618 irq_set_status_flags(irq, IRQ_PER_CPU);
619 irq_set_chip(irq, &irq_type_ia64_lsapic);
621 setup_irq(irq, action);
622 irq_set_handler(irq, handle_percpu_irq);
626 ia64_native_register_ipi(void)
629 register_percpu_irq(IA64_IPI_VECTOR, &ipi_irqaction);
630 register_percpu_irq(IA64_IPI_RESCHEDULE, &resched_irqaction);
631 register_percpu_irq(IA64_IPI_LOCAL_TLB_FLUSH, &tlb_irqaction);
642 register_percpu_irq(IA64_SPURIOUS_INT_VECTOR, NULL);
644 #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_DIG)
645 if (vector_domain_type != VECTOR_DOMAIN_NONE)
646 register_percpu_irq(IA64_IRQ_MOVE_VECTOR, &irq_move_irqaction);
649 #ifdef CONFIG_PERFMON
656 ia64_send_ipi (int cpu, int vector, int delivery_mode, int redirect)
658 void __iomem *ipi_addr;
659 unsigned long ipi_data;
660 unsigned long phys_cpu_id;
662 phys_cpu_id = cpu_physical_id(cpu);
665 * cpu number is in 8bit ID and 8bit EID
668 ipi_data = (delivery_mode << 8) | (vector & 0xff);
669 ipi_addr = ipi_base_addr + ((phys_cpu_id << 4) | ((redirect & 1) << 3));
671 writeq(ipi_data, ipi_addr);