1 /****************************************************************************/
4 * mcfintc.h -- support definitions for the simple ColdFire
7 * (C) Copyright 2009, Greg Ungerer <gerg@uclinux.org>
10 /****************************************************************************/
13 /****************************************************************************/
16 * Most of the older ColdFire parts use the same simple interrupt
17 * controller. This is currently used on the 5206, 5206e, 5249, 5307
20 * The builtin peripherals are masked through dedicated bits in the
21 * Interrupt Mask register (IMR) - and this is not indexed (or in any way
22 * related to) the actual interrupt number they use. So knowing the IRQ
23 * number doesn't explicitly map to a certain internal device for
24 * interrupt control purposes.
28 * Define the base address of the SIM within the MBAR address space.
30 #define MCFSIM_BASE 0x0 /* Base address within SIM */
33 * Bit definitions for the ICR family of registers.
35 #define MCFSIM_ICR_AUTOVEC 0x80 /* Auto-vectored intr */
36 #define MCFSIM_ICR_LEVEL0 0x00 /* Level 0 intr */
37 #define MCFSIM_ICR_LEVEL1 0x04 /* Level 1 intr */
38 #define MCFSIM_ICR_LEVEL2 0x08 /* Level 2 intr */
39 #define MCFSIM_ICR_LEVEL3 0x0c /* Level 3 intr */
40 #define MCFSIM_ICR_LEVEL4 0x10 /* Level 4 intr */
41 #define MCFSIM_ICR_LEVEL5 0x14 /* Level 5 intr */
42 #define MCFSIM_ICR_LEVEL6 0x18 /* Level 6 intr */
43 #define MCFSIM_ICR_LEVEL7 0x1c /* Level 7 intr */
45 #define MCFSIM_ICR_PRI0 0x00 /* Priority 0 intr */
46 #define MCFSIM_ICR_PRI1 0x01 /* Priority 1 intr */
47 #define MCFSIM_ICR_PRI2 0x02 /* Priority 2 intr */
48 #define MCFSIM_ICR_PRI3 0x03 /* Priority 3 intr */
51 * IMR bit position definitions.
53 #define MCFINTC_EINT1 1 /* External int #1 */
54 #define MCFINTC_EINT2 2 /* External int #2 */
55 #define MCFINTC_EINT3 3 /* External int #3 */
56 #define MCFINTC_EINT4 4 /* External int #4 */
57 #define MCFINTC_EINT5 5 /* External int #5 */
58 #define MCFINTC_EINT6 6 /* External int #6 */
59 #define MCFINTC_EINT7 7 /* External int #7 */
60 #define MCFINTC_SWT 8 /* Software Watchdog */
61 #define MCFINTC_TIMER1 9
62 #define MCFINTC_TIMER2 10
63 #define MCFINTC_I2C 11 /* I2C / MBUS */
64 #define MCFINTC_UART0 12
65 #define MCFINTC_UART1 13
66 #define MCFINTC_DMA0 14
67 #define MCFINTC_DMA1 15
68 #define MCFINTC_DMA2 16
69 #define MCFINTC_DMA3 17
70 #define MCFINTC_QSPI 18
73 void mcf_autovector(int irq);
74 void mcf_setimr(int index);
75 void mcf_clrimr(int index);
78 /****************************************************************************/
79 #endif /* mcfintc_h */