1 /****************************************************************************/
4 * nettel.h -- Lineo (formerly Moreton Bay) NETtel support.
6 * (C) Copyright 1999-2000, Moreton Bay (www.moretonbay.com)
7 * (C) Copyright 2000-2001, Lineo Inc. (www.lineo.com)
8 * (C) Copyright 2001-2002, SnapGear Inc., (www.snapgear.com)
11 /****************************************************************************/
14 /****************************************************************************/
17 /****************************************************************************/
19 /****************************************************************************/
21 #ifdef CONFIG_COLDFIRE
22 #include <asm/coldfire.h>
23 #include <asm/mcfsim.h>
27 /*---------------------------------------------------------------------------*/
28 #if defined(CONFIG_M5307)
30 * NETtel/5307 based hardware first. DTR/DCD lines are wired to
31 * GPIO lines. Most of the LED's are driver through a latch
34 #define MCFPP_DCD1 0x0001
35 #define MCFPP_DCD0 0x0002
36 #define MCFPP_DTR1 0x0004
37 #define MCFPP_DTR0 0x0008
39 #define NETtel_LEDADDR 0x30400000
43 extern volatile unsigned short ppdata;
46 * These functions defined to give quasi generic access to the
47 * PPIO bits used for DTR/DCD.
49 static __inline__ unsigned int mcf_getppdata(void)
51 volatile unsigned short *pp;
52 pp = (volatile unsigned short *) MCFSIM_PADAT;
53 return((unsigned int) *pp);
56 static __inline__ void mcf_setppdata(unsigned int mask, unsigned int bits)
58 volatile unsigned short *pp;
59 pp = (volatile unsigned short *) MCFSIM_PADAT;
60 ppdata = (ppdata & ~mask) | bits;
65 /*---------------------------------------------------------------------------*/
66 #elif defined(CONFIG_M5206e)
68 * NETtel/5206e based hardware has leds on latch on CS3.
69 * No support modem for lines??
71 #define NETtel_LEDADDR 0x50000000
73 /*---------------------------------------------------------------------------*/
74 #elif defined(CONFIG_M5272)
76 * NETtel/5272 based hardware. DTR/DCD lines are wired to GPB lines.
78 #define MCFPP_DCD0 0x0080
79 #define MCFPP_DCD1 0x0000 /* Port 1 no DCD support */
80 #define MCFPP_DTR0 0x0040
81 #define MCFPP_DTR1 0x0000 /* Port 1 no DTR support */
85 * These functions defined to give quasi generic access to the
86 * PPIO bits used for DTR/DCD.
88 static __inline__ unsigned int mcf_getppdata(void)
90 return readw(MCFSIM_PBDAT);
93 static __inline__ void mcf_setppdata(unsigned int mask, unsigned int bits)
95 write((readw(MCFSIM_PBDAT) & ~mask) | bits, MCFSIM_PBDAT);
100 /*---------------------------------------------------------------------------*/
102 /****************************************************************************/
103 #endif /* CONFIG_NETtel */
104 /****************************************************************************/
105 #endif /* nettel_h */