3 ** head.S -- This file contains the initial boot code for the
6 ** Copyright 1993 by Hamish Macdonald
8 ** 68040 fixes by Michael Rausch
9 ** 68060 fixes by Roman Hodek
10 ** MMU cleanup by Randy Thelen
11 ** Final MMU cleanup by Roman Zippel
13 ** Atari support by Andreas Schwab, using ideas of Robert de Vries
15 ** VME Support by Richard Hirst
17 ** 94/11/14 Andreas Schwab: put kernel at PAGESIZE
18 ** 94/11/18 Andreas Schwab: remove identity mapping of STRAM for Atari
19 ** ++ Bjoern & Roman: ATARI-68040 support for the Medusa
20 ** 95/11/18 Richard Hirst: Added MVME166 support
21 ** 96/04/26 Guenther Kelleter: fixed identity mapping for Falcon with
22 ** Magnum- and FX-alternate ram
23 ** 98/04/25 Phil Blundell: added HP300 support
24 ** 1998/08/30 David Kilzer: Added support for font_desc structures
26 ** 9/02/11 Richard Zidlicky: added Q40 support (initial vesion 99/01/01)
27 ** 2004/05/13 Kars de Jong: Finalised HP300 support
29 ** This file is subject to the terms and conditions of the GNU General Public
30 ** License. See the file README.legal in the main directory of this archive
38 * At this point, the boot loader has:
41 * Put us in supervisor state.
43 * The kernel setup code takes the following steps:
44 * . Raise interrupt level
45 * . Set up initial kernel memory mapping.
46 * . This sets up a mapping of the 4M of memory the kernel is located in.
47 * . It also does a mapping of any initial machine specific areas.
49 * . Enable cache memories
50 * . Jump to kernel startup
52 * Much of the file restructuring was to accomplish:
53 * 1) Remove register dependency through-out the file.
54 * 2) Increase use of subroutines to perform functions
55 * 3) Increase readability of the code
57 * Of course, readability is a subjective issue, so it will never be
58 * argued that that goal was accomplished. It was merely a goal.
59 * A key way to help make code more readable is to give good
60 * documentation. So, the first thing you will find is exaustive
61 * write-ups on the structure of the file, and the features of the
62 * functional subroutines.
66 * Without a doubt the single largest chunk of head.S is spent
67 * mapping the kernel and I/O physical space into the logical range
69 * There are new subroutines and data structures to make MMU
70 * support cleaner and easier to understand.
71 * First, you will find a routine call "mmu_map" which maps
72 * a logical to a physical region for some length given a cache
73 * type on behalf of the caller. This routine makes writing the
74 * actual per-machine specific code very simple.
75 * A central part of the code, but not a subroutine in itself,
76 * is the mmu_init code which is broken down into mapping the kernel
77 * (the same for all machines) and mapping machine-specific I/O
79 * Also, there will be a description of engaging the MMU and
81 * You will notice that there is a chunk of code which
82 * can emit the entire MMU mapping of the machine. This is present
83 * only in debug modes and can be very helpful.
84 * Further, there is a new console driver in head.S that is
85 * also only engaged in debug mode. Currently, it's only supported
86 * on the Macintosh class of machines. However, it is hoped that
87 * others will plug-in support for specific machines.
89 * ######################################################################
93 * mmu_map was written for two key reasons. First, it was clear
94 * that it was very difficult to read the previous code for mapping
95 * regions of memory. Second, the Macintosh required such extensive
96 * memory allocations that it didn't make sense to propagate the
97 * existing code any further.
98 * mmu_map requires some parameters:
100 * mmu_map (logical, physical, length, cache_type)
102 * While this essentially describes the function in the abstract, you'll
103 * find more indepth description of other parameters at the implementation site.
105 * mmu_get_root_table_entry
106 * ------------------------
107 * mmu_get_ptr_table_entry
108 * -----------------------
109 * mmu_get_page_table_entry
110 * ------------------------
112 * These routines are used by other mmu routines to get a pointer into
113 * a table, if necessary a new table is allocated. These routines are working
114 * basically like pmd_alloc() and pte_alloc() in <asm/pgtable.h>. The root
115 * table needs of course only to be allocated once in mmu_get_root_table_entry,
116 * so that here also some mmu specific initialization is done. The second page
117 * at the start of the kernel (the first page is unmapped later) is used for
118 * the kernel_pg_dir. It must be at a position known at link time (as it's used
119 * to initialize the init task struct) and since it needs special cache
120 * settings, it's the easiest to use this page, the rest of the page is used
121 * for further pointer tables.
122 * mmu_get_page_table_entry allocates always a whole page for page tables, this
123 * means 1024 pages and so 4MB of memory can be mapped. It doesn't make sense
124 * to manage page tables in smaller pieces as nearly all mappings have that
127 * ######################################################################
130 * ######################################################################
134 * Thanks to a small helping routine enabling the mmu got quite simple
135 * and there is only one way left. mmu_engage makes a complete a new mapping
136 * that only includes the absolute necessary to be able to jump to the final
137 * postion and to restore the original mapping.
138 * As this code doesn't need a transparent translation register anymore this
139 * means all registers are free to be used by machines that needs them for
142 * ######################################################################
146 * This algorithm will print out the page tables of the system as
147 * appropriate for an 030 or an 040. This is useful for debugging purposes
148 * and as such is enclosed in #ifdef MMU_PRINT/#endif clauses.
150 * ######################################################################
154 * The console is also able to be turned off. The console in head.S
155 * is specifically for debugging and can be very useful. It is surrounded by
156 * #ifdef CONSOLE/#endif clauses so it doesn't have to ship in known-good
157 * kernels. It's basic algorithm is to determine the size of the screen
158 * (in height/width and bit depth) and then use that information for
159 * displaying an 8x8 font or an 8x16 (widthxheight). I prefer the 8x8 for
160 * debugging so I can see more good data. But it was trivial to add support
161 * for both fonts, so I included it.
162 * Also, the algorithm for plotting pixels is abstracted so that in
163 * theory other platforms could add support for different kinds of frame
164 * buffers. This could be very useful.
166 * console_put_penguin
167 * -------------------
168 * An important part of any Linux bring up is the penguin and there's
169 * nothing like getting the Penguin on the screen! This algorithm will work
170 * on any machine for which there is a console_plot_pixel.
174 * My hope is that the scroll algorithm does the right thing on the
175 * various platforms, but it wouldn't be hard to add the test conditions
176 * and new code if it doesn't.
181 * ######################################################################
183 * Register usage has greatly simplified within head.S. Every subroutine
184 * saves and restores all registers that it modifies (except it returns a
185 * value in there of course). So the only register that needs to be initialized
186 * is the stack pointer.
187 * All other init code and data is now placed in the init section, so it will
188 * be automatically freed at the end of the kernel initialization.
190 * ######################################################################
194 * There are many options available in a build of this file. I've
195 * taken the time to describe them here to save you the time of searching
196 * for them and trying to understand what they mean.
198 * CONFIG_xxx: These are the obvious machine configuration defines created
199 * during configuration. These are defined in include/linux/autoconf.h.
201 * CONSOLE: There is support for head.S console in this file. This
202 * console can talk to a Mac frame buffer, but could easily be extrapolated
203 * to extend it to support other platforms.
205 * TEST_MMU: This is a test harness for running on any given machine but
206 * getting an MMU dump for another class of machine. The classes of machines
207 * that can be tested are any of the makes (Atari, Amiga, Mac, VME, etc.)
208 * and any of the models (030, 040, 060, etc.).
210 * NOTE: TEST_MMU is NOT permanent! It is scheduled to be removed
211 * When head.S boots on Atari, Amiga, Macintosh, and VME
212 * machines. At that point the underlying logic will be
213 * believed to be solid enough to be trusted, and TEST_MMU
214 * can be dropped. Do note that that will clean up the
215 * head.S code significantly as large blocks of #if/#else
216 * clauses can be removed.
218 * MMU_NOCACHE_KERNEL: On the Macintosh platform there was an inquiry into
219 * determing why devices don't appear to work. A test case was to remove
220 * the cacheability of the kernel bits.
222 * MMU_PRINT: There is a routine built into head.S that can display the
223 * MMU data structures. It outputs its result through the serial_putc
224 * interface. So where ever that winds up driving data, that's where the
225 * mmu struct will appear. On the Macintosh that's typically the console.
227 * SERIAL_DEBUG: There are a series of putc() macro statements
228 * scattered through out the code to give progress of status to the
229 * person sitting at the console. This constant determines whether those
232 * DEBUG: This is the standard DEBUG flag that can be set for building
233 * the kernel. It has the effect adding additional tests into
239 * In theory these could be determined at run time or handed
240 * over by the booter. But, let's be real, it's a fine hard
241 * coded value. (But, you will notice the code is run-time
242 * flexible!) A pointer to the font's struct font_desc
243 * is kept locally in Lconsole_font. It is used to determine
244 * font size information dynamically.
247 * USE_PRINTER: Use the printer port for serial debug.
248 * USE_SCC_B: Use the SCC port A (Serial2) for serial debug.
249 * USE_SCC_A: Use the SCC port B (Modem2) for serial debug.
250 * USE_MFP: Use the ST-MFP port (Modem1) for serial debug.
252 * Macintosh constants:
253 * MAC_SERIAL_DEBUG: Turns on serial debug output for the Macintosh.
254 * MAC_USE_SCC_A: Use the SCC port A (modem) for serial debug.
255 * MAC_USE_SCC_B: Use the SCC port B (printer) for serial debug (default).
258 #include <linux/linkage.h>
259 #include <linux/init.h>
260 #include <asm/bootinfo.h>
261 #include <asm/setup.h>
262 #include <asm/entry.h>
263 #include <asm/pgtable.h>
264 #include <asm/page.h>
265 #include <asm/asm-offsets.h>
269 #include <asm/machw.h>
272 * Macintosh console support
275 #ifdef CONFIG_FRAMEBUFFER_CONSOLE
277 #define CONSOLE_PENGUIN
281 * Macintosh serial debug support; outputs boot info to the printer
282 * and/or modem serial ports
284 #undef MAC_SERIAL_DEBUG
287 * Macintosh serial debug port selection; define one or both;
288 * requires MAC_SERIAL_DEBUG to be defined
290 #define MAC_USE_SCC_A /* Macintosh modem serial port */
291 #define MAC_USE_SCC_B /* Macintosh printer serial port */
293 #endif /* CONFIG_MAC */
296 #undef MMU_NOCACHE_KERNEL
301 * For the head.S console, there are three supported fonts, 6x11, 8x16 and 8x8.
302 * The 8x8 font is harder to read but fits more on the screen.
304 #define FONT_8x8 /* default */
305 /* #define FONT_8x16 */ /* 2nd choice */
306 /* #define FONT_6x11 */ /* 3rd choice */
310 .globl m68k_pgtable_cachemode
311 .globl m68k_supervisor_cachemode
312 #ifdef CONFIG_MVME16x
319 CPUTYPE_040 = 1 /* indicates an 040 */
320 CPUTYPE_060 = 2 /* indicates an 060 */
321 CPUTYPE_0460 = 3 /* if either above are set, this is set */
322 CPUTYPE_020 = 4 /* indicates an 020 */
324 /* Translation control register */
329 /* Transparent translation registers */
330 TTR_ENABLE = 0x8000 /* enable transparent translation */
331 TTR_ANYMODE = 0x4000 /* user and kernel mode access */
332 TTR_KERNELMODE = 0x2000 /* only kernel mode access */
333 TTR_USERMODE = 0x0000 /* only user mode access */
334 TTR_CI = 0x0400 /* inhibit cache */
335 TTR_RW = 0x0200 /* read/write mode */
336 TTR_RWM = 0x0100 /* read/write mask */
337 TTR_FCB2 = 0x0040 /* function code base bit 2 */
338 TTR_FCB1 = 0x0020 /* function code base bit 1 */
339 TTR_FCB0 = 0x0010 /* function code base bit 0 */
340 TTR_FCM2 = 0x0004 /* function code mask bit 2 */
341 TTR_FCM1 = 0x0002 /* function code mask bit 1 */
342 TTR_FCM0 = 0x0001 /* function code mask bit 0 */
344 /* Cache Control registers */
345 CC6_ENABLE_D = 0x80000000 /* enable data cache (680[46]0) */
346 CC6_FREEZE_D = 0x40000000 /* freeze data cache (68060) */
347 CC6_ENABLE_SB = 0x20000000 /* enable store buffer (68060) */
348 CC6_PUSH_DPI = 0x10000000 /* disable CPUSH invalidation (68060) */
349 CC6_HALF_D = 0x08000000 /* half-cache mode for data cache (68060) */
350 CC6_ENABLE_B = 0x00800000 /* enable branch cache (68060) */
351 CC6_CLRA_B = 0x00400000 /* clear all entries in branch cache (68060) */
352 CC6_CLRU_B = 0x00200000 /* clear user entries in branch cache (68060) */
353 CC6_ENABLE_I = 0x00008000 /* enable instruction cache (680[46]0) */
354 CC6_FREEZE_I = 0x00004000 /* freeze instruction cache (68060) */
355 CC6_HALF_I = 0x00002000 /* half-cache mode for instruction cache (68060) */
356 CC3_ALLOC_WRITE = 0x00002000 /* write allocate mode(68030) */
357 CC3_ENABLE_DB = 0x00001000 /* enable data burst (68030) */
358 CC3_CLR_D = 0x00000800 /* clear data cache (68030) */
359 CC3_CLRE_D = 0x00000400 /* clear entry in data cache (68030) */
360 CC3_FREEZE_D = 0x00000200 /* freeze data cache (68030) */
361 CC3_ENABLE_D = 0x00000100 /* enable data cache (68030) */
362 CC3_ENABLE_IB = 0x00000010 /* enable instruction burst (68030) */
363 CC3_CLR_I = 0x00000008 /* clear instruction cache (68030) */
364 CC3_CLRE_I = 0x00000004 /* clear entry in instruction cache (68030) */
365 CC3_FREEZE_I = 0x00000002 /* freeze instruction cache (68030) */
366 CC3_ENABLE_I = 0x00000001 /* enable instruction cache (68030) */
368 /* Miscellaneous definitions */
372 ROOT_TABLE_SIZE = 128
375 ROOT_INDEX_SHIFT = 25
377 PAGE_INDEX_SHIFT = 12
380 /* When debugging use readable names for labels */
382 #define L(name) .head.S.##name
384 #define L(name) .head.S./**/name
388 #define L(name) .L##name
390 #define L(name) .L/**/name
394 /* The __INITDATA stuff is a no-op when ftrace or kgdb are turned on */
396 #define __INITDATA .data
397 #define __FINIT .previous
400 /* Several macros to make the writing of subroutines easier:
401 * - func_start marks the beginning of the routine which setups the frame
402 * register and saves the registers, it also defines another macro
403 * to automatically restore the registers again.
404 * - func_return marks the end of the routine and simply calls the prepared
405 * macro to restore registers and jump back to the caller.
406 * - func_define generates another macro to automatically put arguments
407 * onto the stack call the subroutine and cleanup the stack again.
410 /* Within subroutines these macros can be used to access the arguments
411 * on the stack. With STACK some allocated memory on the stack can be
412 * accessed and ARG0 points to the return address (used by mmu_engage).
414 #define STACK %a6@(stackstart)
417 #define ARG2 %a6@(12)
418 #define ARG3 %a6@(16)
419 #define ARG4 %a6@(20)
421 .macro func_start name,saveregs,stack=0
424 moveml \saveregs,%sp@-
425 .set stackstart,-\stack
427 .macro func_return_\name
428 moveml %sp@+,\saveregs
434 .macro func_return name
438 .macro func_call name
442 .macro move_stack nr,arg1,arg2,arg3,arg4
444 move_stack "(\nr-1)",\arg2,\arg3,\arg4
449 .macro func_define name,nr=0
450 .macro \name arg1,arg2,arg3,arg4
451 move_stack \nr,\arg1,\arg2,\arg3,\arg4
459 func_define mmu_map,4
460 func_define mmu_map_tt,4
461 func_define mmu_fixup_page_mmu_cache,1
462 func_define mmu_temp_map,2
463 func_define mmu_engage
464 func_define mmu_get_root_table_entry,1
465 func_define mmu_get_ptr_table_entry,2
466 func_define mmu_get_page_table_entry,2
467 func_define mmu_print
468 func_define get_new_page
469 #if defined(CONFIG_HP300) || defined(CONFIG_APOLLO)
473 .macro mmu_map_eq arg1,arg2,arg3
474 mmu_map \arg1,\arg1,\arg2,\arg3
477 .macro get_bi_record record
479 func_call get_bi_record
483 func_define serial_putc,1
484 func_define console_putc,1
486 func_define console_init
487 func_define console_put_stats
488 func_define console_put_penguin
489 func_define console_plot_pixel,3
490 func_define console_scroll
493 #if defined(CONSOLE) || defined(SERIAL_DEBUG)
497 func_call console_putc
500 func_call serial_putc
502 #if defined(CONSOLE) || defined(SERIAL_DEBUG)
522 #if defined(CONSOLE) || defined(SERIAL_DEBUG)
539 #define is_not_amiga(lab) cmpl &MACH_AMIGA,%pc@(m68k_machtype); jne lab
540 #define is_not_atari(lab) cmpl &MACH_ATARI,%pc@(m68k_machtype); jne lab
541 #define is_not_mac(lab) cmpl &MACH_MAC,%pc@(m68k_machtype); jne lab
542 #define is_not_mvme147(lab) cmpl &MACH_MVME147,%pc@(m68k_machtype); jne lab
543 #define is_not_mvme16x(lab) cmpl &MACH_MVME16x,%pc@(m68k_machtype); jne lab
544 #define is_not_bvme6000(lab) cmpl &MACH_BVME6000,%pc@(m68k_machtype); jne lab
545 #define is_mvme147(lab) cmpl &MACH_MVME147,%pc@(m68k_machtype); jeq lab
546 #define is_mvme16x(lab) cmpl &MACH_MVME16x,%pc@(m68k_machtype); jeq lab
547 #define is_bvme6000(lab) cmpl &MACH_BVME6000,%pc@(m68k_machtype); jeq lab
548 #define is_not_hp300(lab) cmpl &MACH_HP300,%pc@(m68k_machtype); jne lab
549 #define is_not_apollo(lab) cmpl &MACH_APOLLO,%pc@(m68k_machtype); jne lab
550 #define is_not_q40(lab) cmpl &MACH_Q40,%pc@(m68k_machtype); jne lab
551 #define is_not_sun3x(lab) cmpl &MACH_SUN3X,%pc@(m68k_machtype); jne lab
553 #define hasnt_leds(lab) cmpl &MACH_HP300,%pc@(m68k_machtype); \
555 cmpl &MACH_APOLLO,%pc@(m68k_machtype); \
559 #define is_040_or_060(lab) btst &CPUTYPE_0460,%pc@(L(cputype)+3); jne lab
560 #define is_not_040_or_060(lab) btst &CPUTYPE_0460,%pc@(L(cputype)+3); jeq lab
561 #define is_040(lab) btst &CPUTYPE_040,%pc@(L(cputype)+3); jne lab
562 #define is_060(lab) btst &CPUTYPE_060,%pc@(L(cputype)+3); jne lab
563 #define is_not_060(lab) btst &CPUTYPE_060,%pc@(L(cputype)+3); jeq lab
564 #define is_020(lab) btst &CPUTYPE_020,%pc@(L(cputype)+3); jne lab
565 #define is_not_020(lab) btst &CPUTYPE_020,%pc@(L(cputype)+3); jeq lab
567 /* On the HP300 we use the on-board LEDs for debug output before
568 the console is running. Writing a 1 bit turns the corresponding LED
569 _off_ - on the 340 bit 7 is towards the back panel of the machine. */
571 #if defined(CONFIG_HP300) || defined(CONFIG_APOLLO)
580 .section ".text.head","ax"
583 * Version numbers of the bootinfo interface
584 * The area from _stext to _start will later be used as kernel pointer table
586 bras 1f /* Jump over bootinfo version numbers */
588 .long BOOTINFOV_MAGIC
589 .long MACH_AMIGA, AMIGA_BOOTI_VERSION
590 .long MACH_ATARI, ATARI_BOOTI_VERSION
591 .long MACH_MVME147, MVME147_BOOTI_VERSION
592 .long MACH_MVME16x, MVME16x_BOOTI_VERSION
593 .long MACH_BVME6000, BVME6000_BOOTI_VERSION
594 .long MACH_MAC, MAC_BOOTI_VERSION
595 .long MACH_Q40, Q40_BOOTI_VERSION
596 .long MACH_HP300, HP300_BOOTI_VERSION
600 .equ kernel_pg_dir,_stext
602 .equ .,_stext+PAGESIZE
609 * Setup initial stack pointer
614 * Record the CPU and machine type.
616 get_bi_record BI_MACHTYPE
617 lea %pc@(m68k_machtype),%a1
620 get_bi_record BI_FPUTYPE
621 lea %pc@(m68k_fputype),%a1
624 get_bi_record BI_MMUTYPE
625 lea %pc@(m68k_mmutype),%a1
628 get_bi_record BI_CPUTYPE
629 lea %pc@(m68k_cputype),%a1
636 * For Macintosh, we need to determine the display parameters early (at least
637 * while debugging it).
640 is_not_mac(L(test_notmac))
642 get_bi_record BI_MAC_VADDR
643 lea %pc@(L(mac_videobase)),%a1
646 get_bi_record BI_MAC_VDEPTH
647 lea %pc@(L(mac_videodepth)),%a1
650 get_bi_record BI_MAC_VDIM
651 lea %pc@(L(mac_dimensions)),%a1
654 get_bi_record BI_MAC_VROW
655 lea %pc@(L(mac_rowbytes)),%a1
658 #ifdef MAC_SERIAL_DEBUG
659 get_bi_record BI_MAC_SCCBASE
660 lea %pc@(L(mac_sccbase)),%a1
662 #endif /* MAC_SERIAL_DEBUG */
668 lea %pc@(L(mac_videobase)),%a0
670 lea %pc@(L(mac_dimensions)),%a0
672 swap %d1 /* #rows is high bytes */
673 andl #0xFFFF,%d1 /* rows */
675 lea %pc@(L(mac_rowbytes)),%a0
686 #endif /* CONFIG_MAC */
690 * There are ultimately two pieces of information we want for all kinds of
691 * processors CpuType and CacheBits. The CPUTYPE was passed in from booter
692 * and is converted here from a booter type definition to a separate bit
693 * number which allows for the standard is_0x0 macro tests.
695 movel %pc@(m68k_cputype),%d0
702 * Test the BootInfo cputype for 060
706 bset #CPUTYPE_060,%d1
707 bset #CPUTYPE_0460,%d1
711 * Test the BootInfo cputype for 040
715 bset #CPUTYPE_040,%d1
716 bset #CPUTYPE_0460,%d1
720 * Test the BootInfo cputype for 020
724 bset #CPUTYPE_020,%d1
728 * Record the cpu type
730 lea %pc@(L(cputype)),%a0
736 * Now the macros are valid:
745 * Determine the cache mode for pages holding MMU tables
746 * and for supervisor mode, unused for '020 and '030
751 is_not_040_or_060(L(save_cachetype))
755 * d1 := cacheable write-through
756 * NOTE: The 68040 manual strongly recommends non-cached for MMU tables,
757 * but we have been using write-through since at least 2.0.29 so I
760 #ifdef CONFIG_060_WRITETHROUGH
762 * If this is a 68060 board using drivers with cache coherency
763 * problems, then supervisor memory accesses need to be write-through
764 * also; otherwise, we want copyback.
768 movel #_PAGE_CACHE040W,%d0
769 jra L(save_cachetype)
770 #endif /* CONFIG_060_WRITETHROUGH */
772 movew #_PAGE_CACHE040,%d0
774 movel #_PAGE_CACHE040W,%d1
777 /* Save cache mode for supervisor mode and page tables
779 lea %pc@(m68k_supervisor_cachemode),%a0
781 lea %pc@(m68k_pgtable_cachemode),%a0
785 * raise interrupt level
790 If running on an Atari, determine the I/O base of the
791 serial port and test if we are running on a Medusa or Hades.
792 This test is necessary here, because on the Hades the serial
793 port is only accessible in the high I/O memory area.
795 The test whether it is a Medusa is done by writing to the byte at
796 phys. 0x0. This should result in a bus error on all other machines.
798 ...should, but doesn't. The Afterburner040 for the Falcon has the
799 same behaviour (0x0..0x7 are no ROM shadow). So we have to do
800 another test to distinguish Medusa and AB040. This is a
801 read attempt for 0x00ff82fe phys. that should bus error on a Falcon
802 (+AB040), but is in the range where the Medusa always asserts DTACK.
804 The test for the Hades is done by reading address 0xb0000000. This
805 should give a bus error on the Medusa.
809 is_not_atari(L(notypetest))
811 /* get special machine type (Medusa/Hades/AB40) */
812 moveq #0,%d3 /* default if tag doesn't exist */
813 get_bi_record BI_ATARI_MCH_TYPE
817 lea %pc@(atari_mch_type),%a0
820 /* On the Hades, the iobase must be set up before opening the
821 * serial port. There are no I/O regs at 0x00ffxxxx at all. */
823 cmpl #ATARI_MACH_HADES,%d3
825 movel #0xff000000,%d0 /* Hades I/O base addr: 0xff000000 */
826 1: lea %pc@(L(iobase)),%a0
833 is_mvme147(L(getvmetype))
834 is_bvme6000(L(getvmetype))
835 is_not_mvme16x(L(gvtdone))
837 /* See if the loader has specified the BI_VME_TYPE tag. Recent
838 * versions of VMELILO and TFTPLILO do this. We have to do this
839 * early so we know how to handle console output. If the tag
840 * doesn't exist then we use the Bug for output on MVME16x.
843 get_bi_record BI_VME_TYPE
847 lea %pc@(vme_brdtype),%a0
850 #ifdef CONFIG_MVME16x
851 is_not_mvme16x(L(gvtdone))
853 /* Need to get the BRD_ID info to differentiate between 162, 167,
854 * etc. This is available as a BI_VME_BRDINFO tag with later
855 * versions of VMELILO and TFTPLILO, otherwise we call the Bug.
857 get_bi_record BI_VME_BRDINFO
861 /* Get pointer to board ID data from Bug */
864 .word 0x70 /* trap 0x70 - .BRD_ID */
867 lea %pc@(mvme_bdid),%a1
868 /* Structure is 32 bytes long */
884 is_not_hp300(L(nothp))
886 /* Get the address of the UART for serial debugging */
887 get_bi_record BI_HP300_UART_ADDR
891 lea %pc@(L(uartbase)),%a0
893 get_bi_record BI_HP300_UART_SCODE
897 lea %pc@(L(uart_scode)),%a0
904 * Initialize serial port
915 #ifdef CONSOLE_PENGUIN
917 #endif /* CONSOLE_PENGUIN */
921 #endif /* CONFIG_MAC */
927 dputn %pc@(L(cputype))
928 dputn %pc@(m68k_supervisor_cachemode)
929 dputn %pc@(m68k_pgtable_cachemode)
933 * Save physical start address of kernel
935 lea %pc@(L(phys_kernel_start)),%a0
938 addl #PAGE_OFFSET,%a1
948 * This block of code does what's necessary to map in the various kinds
949 * of machines for execution of Linux.
950 * First map the first 4 MB of kernel code & data
953 mmu_map #PAGE_OFFSET,%pc@(L(phys_kernel_start)),#4*1024*1024,\
954 %pc@(m68k_supervisor_cachemode)
962 is_not_amiga(L(mmu_init_not_amiga))
969 is_not_040_or_060(1f)
972 * 040: Map the 16Meg range physical 0x0 upto logical 0x8000.0000
974 mmu_map #0x80000000,#0,#0x01000000,#_PAGE_NOCACHE_S
976 * Map the Zorro III I/O space with transparent translation
977 * for frame buffer memory etc.
979 mmu_map_tt #1,#0x40000000,#0x20000000,#_PAGE_NOCACHE_S
981 jbra L(mmu_init_done)
985 * 030: Map the 32Meg range physical 0x0 upto logical 0x8000.0000
987 mmu_map #0x80000000,#0,#0x02000000,#_PAGE_NOCACHE030
988 mmu_map_tt #1,#0x40000000,#0x20000000,#_PAGE_NOCACHE030
990 jbra L(mmu_init_done)
992 L(mmu_init_not_amiga):
999 is_not_atari(L(mmu_init_not_atari))
1003 /* On the Atari, we map the I/O region (phys. 0x00ffxxxx) by mapping
1004 the last 16 MB of virtual address space to the first 16 MB (i.e.
1005 0xffxxxxxx -> 0x00xxxxxx). For this, an additional pointer table is
1006 needed. I/O ranges are marked non-cachable.
1008 For the Medusa it is better to map the I/O region transparently
1009 (i.e. 0xffxxxxxx -> 0xffxxxxxx), because some I/O registers are
1010 accessible only in the high area.
1012 On the Hades all I/O registers are only accessible in the high
1016 /* I/O base addr for non-Medusa, non-Hades: 0x00000000 */
1018 movel %pc@(atari_mch_type),%d3
1019 cmpl #ATARI_MACH_MEDUSA,%d3
1021 cmpl #ATARI_MACH_HADES,%d3
1023 2: movel #0xff000000,%d0 /* Medusa/Hades base addr: 0xff000000 */
1026 is_040_or_060(L(spata68040))
1028 /* Map everything non-cacheable, though not all parts really
1029 * need to disable caches (crucial only for 0xff8000..0xffffff
1030 * (standard I/O) and 0xf00000..0xf3ffff (IDE)). The remainder
1031 * isn't really used, except for sometimes peeking into the
1032 * ROMs (mirror at phys. 0x0), so caching isn't necessary for
1034 mmu_map #0xff000000,%d3,#0x01000000,#_PAGE_NOCACHE030
1036 jbra L(mmu_init_done)
1040 mmu_map #0xff000000,%d3,#0x01000000,#_PAGE_NOCACHE_S
1042 jbra L(mmu_init_done)
1044 L(mmu_init_not_atari):
1048 is_not_q40(L(notq40))
1050 * add transparent mapping for 0xff00 0000 - 0xffff ffff
1051 * non-cached serialized etc..
1052 * this includes master chip, DAC, RTC and ISA ports
1053 * 0xfe000000-0xfeffffff is for screen and ROM
1058 mmu_map_tt #0,#0xfe000000,#0x01000000,#_PAGE_CACHE040W
1059 mmu_map_tt #1,#0xff000000,#0x01000000,#_PAGE_NOCACHE_S
1061 jbra L(mmu_init_done)
1067 is_not_hp300(L(nothp300))
1069 /* On the HP300, we map the ROM, INTIO and DIO regions (phys. 0x00xxxxxx)
1070 * by mapping 32MB (on 020/030) or 16 MB (on 040) from 0xf0xxxxxx -> 0x00xxxxxx).
1071 * The ROM mapping is needed because the LEDs are mapped there too.
1077 * 030: Map the 32Meg range physical 0x0 upto logical 0xf000.0000
1079 mmu_map #0xf0000000,#0,#0x02000000,#_PAGE_NOCACHE030
1081 jbra L(mmu_init_done)
1085 * 040: Map the 16Meg range physical 0x0 upto logical 0xf000.0000
1087 mmu_map #0xf0000000,#0,#0x01000000,#_PAGE_NOCACHE_S
1089 jbra L(mmu_init_done)
1092 #endif /* CONFIG_HP300 */
1094 #ifdef CONFIG_MVME147
1096 is_not_mvme147(L(not147))
1099 * On MVME147 we have already created kernel page tables for
1100 * 4MB of RAM at address 0, so now need to do a transparent
1101 * mapping of the top of memory space. Make it 0.5GByte for now,
1102 * so we can access on-board i/o areas.
1105 mmu_map_tt #1,#0xe0000000,#0x20000000,#_PAGE_NOCACHE030
1107 jbra L(mmu_init_done)
1110 #endif /* CONFIG_MVME147 */
1112 #ifdef CONFIG_MVME16x
1114 is_not_mvme16x(L(not16x))
1117 * On MVME16x we have already created kernel page tables for
1118 * 4MB of RAM at address 0, so now need to do a transparent
1119 * mapping of the top of memory space. Make it 0.5GByte for now.
1120 * Supervisor only access, so transparent mapping doesn't
1121 * clash with User code virtual address space.
1122 * this covers IO devices, PROM and SRAM. The PROM and SRAM
1123 * mapping is needed to allow 167Bug to run.
1124 * IO is in the range 0xfff00000 to 0xfffeffff.
1125 * PROM is 0xff800000->0xffbfffff and SRAM is
1126 * 0xffe00000->0xffe1ffff.
1129 mmu_map_tt #1,#0xe0000000,#0x20000000,#_PAGE_NOCACHE_S
1131 jbra L(mmu_init_done)
1134 #endif /* CONFIG_MVME162 | CONFIG_MVME167 */
1136 #ifdef CONFIG_BVME6000
1138 is_not_bvme6000(L(not6000))
1141 * On BVME6000 we have already created kernel page tables for
1142 * 4MB of RAM at address 0, so now need to do a transparent
1143 * mapping of the top of memory space. Make it 0.5GByte for now,
1144 * so we can access on-board i/o areas.
1145 * Supervisor only access, so transparent mapping doesn't
1146 * clash with User code virtual address space.
1149 mmu_map_tt #1,#0xe0000000,#0x20000000,#_PAGE_NOCACHE_S
1151 jbra L(mmu_init_done)
1154 #endif /* CONFIG_BVME6000 */
1159 * The Macintosh mappings are less clear.
1161 * Even as of this writing, it is unclear how the
1162 * Macintosh mappings will be done. However, as
1163 * the first author of this code I'm proposing the
1166 * Map the kernel (that's already done),
1167 * Map the I/O (on most machines that's the
1168 * 0x5000.0000 ... 0x5300.0000 range,
1169 * Map the video frame buffer using as few pages
1170 * as absolutely (this requirement mostly stems from
1171 * the fact that when the frame buffer is at
1172 * 0x0000.0000 then we know there is valid RAM just
1173 * above the screen that we don't want to waste!).
1175 * By the way, if the frame buffer is at 0x0000.0000
1176 * then the Macintosh is known as an RBV based Mac.
1178 * By the way 2, the code currently maps in a bunch of
1179 * regions. But I'd like to cut that out. (And move most
1180 * of the mappings up into the kernel proper ... or only
1181 * map what's necessary.)
1188 is_not_mac(L(mmu_init_not_mac))
1192 is_not_040_or_060(1f)
1194 moveq #_PAGE_NOCACHE_S,%d3
1197 moveq #_PAGE_NOCACHE030,%d3
1200 * Mac Note: screen address of logical 0xF000.0000 -> <screen physical>
1201 * we simply map the 4MB that contains the videomem
1204 movel #VIDEOMEMMASK,%d0
1205 andl %pc@(L(mac_videobase)),%d0
1207 mmu_map #VIDEOMEMBASE,%d0,#VIDEOMEMSIZE,%d3
1208 /* ROM from 4000 0000 to 4200 0000 (only for mac_reset()) */
1209 mmu_map_eq #0x40000000,#0x02000000,%d3
1210 /* IO devices (incl. serial port) from 5000 0000 to 5300 0000 */
1211 mmu_map_eq #0x50000000,#0x03000000,%d3
1212 /* Nubus slot space (video at 0xF0000000, rom at 0xF0F80000) */
1213 mmu_map_tt #1,#0xf8000000,#0x08000000,%d3
1215 jbra L(mmu_init_done)
1217 L(mmu_init_not_mac):
1221 is_not_sun3x(L(notsun3x))
1223 /* oh, the pain.. We're gonna want the prom code after
1224 * starting the MMU, so we copy the mappings, translating
1225 * from 8k -> 4k pages as we go.
1228 /* copy maps from 0xfee00000 to 0xff000000 */
1229 movel #0xfee00000, %d0
1230 moveq #ROOT_INDEX_SHIFT, %d1
1232 mmu_get_root_table_entry %d0
1234 movel #0xfee00000, %d0
1235 moveq #PTR_INDEX_SHIFT, %d1
1237 andl #PTR_TABLE_SIZE-1, %d0
1238 mmu_get_ptr_table_entry %a0,%d0
1240 movel #0xfee00000, %d0
1241 moveq #PAGE_INDEX_SHIFT, %d1
1243 andl #PAGE_TABLE_SIZE-1, %d0
1244 mmu_get_page_table_entry %a0,%d0
1246 /* this is where the prom page table lives */
1247 movel 0xfefe00d4, %a1
1250 movel #((0x200000 >> 13)-1), %d1
1260 /* setup tt1 for I/O */
1261 mmu_map_tt #1,#0x40000000,#0x40000000,#_PAGE_NOCACHE_S
1262 jbra L(mmu_init_done)
1267 #ifdef CONFIG_APOLLO
1268 is_not_apollo(L(notapollo))
1271 mmu_map #0x80000000,#0,#0x02000000,#_PAGE_NOCACHE030
1274 jbra L(mmu_init_done)
1285 * On the 040 class machines, all pages that are used for the
1286 * mmu have to be fixed up. According to Motorola, pages holding mmu
1287 * tables should be non-cacheable on a '040 and write-through on a
1288 * '060. But analysis of the reasons for this, and practical
1289 * experience, showed that write-through also works on a '040.
1291 * Allocated memory so far goes from kernel_end to memory_start that
1292 * is used for all kind of tables, for that the cache attributes
1297 is_not_040_or_060(L(mmu_fixup_done))
1299 #ifdef MMU_NOCACHE_KERNEL
1300 jbra L(mmu_fixup_done)
1303 /* first fix the page at the start of the kernel, that
1304 * contains also kernel_pg_dir.
1306 movel %pc@(L(phys_kernel_start)),%d0
1307 subl #PAGE_OFFSET,%d0
1308 lea %pc@(_stext),%a0
1310 mmu_fixup_page_mmu_cache %a0
1312 movel %pc@(L(kernel_end)),%a0
1314 movel %pc@(L(memory_start)),%a1
1318 mmu_fixup_page_mmu_cache %a0
1333 * This chunk of code performs the gruesome task of engaging the MMU.
1334 * The reason its gruesome is because when the MMU becomes engaged it
1335 * maps logical addresses to physical addresses. The Program Counter
1336 * register is then passed through the MMU before the next instruction
1337 * is fetched (the instruction following the engage MMU instruction).
1338 * This may mean one of two things:
1339 * 1. The Program Counter falls within the logical address space of
1340 * the kernel of which there are two sub-possibilities:
1341 * A. The PC maps to the correct instruction (logical PC == physical
1342 * code location), or
1343 * B. The PC does not map through and the processor will read some
1344 * data (or instruction) which is not the logically next instr.
1345 * As you can imagine, A is good and B is bad.
1347 * 2. The Program Counter does not map through the MMU. The processor
1348 * will take a Bus Error.
1349 * Clearly, 2 is bad.
1350 * It doesn't take a wiz kid to figure you want 1.A.
1351 * This code creates that possibility.
1352 * There are two possible 1.A. states (we now ignore the other above states):
1353 * A. The kernel is located at physical memory addressed the same as
1354 * the logical memory for the kernel, i.e., 0x01000.
1355 * B. The kernel is located some where else. e.g., 0x0400.0000
1357 * Under some conditions the Macintosh can look like A or B.
1358 * [A friend and I once noted that Apple hardware engineers should be
1359 * wacked twice each day: once when they show up at work (as in, Whack!,
1360 * "This is for the screwy hardware we know you're going to design today."),
1361 * and also at the end of the day (as in, Whack! "I don't know what
1362 * you designed today, but I'm sure it wasn't good."). -- rst]
1364 * This code works on the following premise:
1365 * If the kernel start (%d5) is within the first 16 Meg of RAM,
1366 * then create a mapping for the kernel at logical 0x8000.0000 to
1367 * the physical location of the pc. And, create a transparent
1368 * translation register for the first 16 Meg. Then, after the MMU
1369 * is engaged, the PC can be moved up into the 0x8000.0000 range
1370 * and then the transparent translation can be turned off and then
1371 * the PC can jump to the correct logical location and it will be
1372 * home (finally). This is essentially the code that the Amiga used
1373 * to use. Now, it's generalized for all processors. Which means
1374 * that a fresh (but temporary) mapping has to be created. The mapping
1375 * is made in page 0 (an as of yet unused location -- except for the
1376 * stack!). This temporary mapping will only require 1 pointer table
1377 * and a single page table (it can map 256K).
1379 * OK, alternatively, imagine that the Program Counter is not within
1380 * the first 16 Meg. Then, just use Transparent Translation registers
1381 * to do the right thing.
1383 * Last, if _start is already at 0x01000, then there's nothing special
1384 * to do (in other words, in a degenerate case of the first case above,
1397 * After this point no new memory is allocated and
1398 * the start of available memory is stored in availmem.
1399 * (The bootmem allocator requires now the physicall address.)
1402 movel L(memory_start),availmem
1406 /* fixup the Amiga custom register location before printing */
1413 /* fixup the Atari iobase register location before printing */
1414 movel #0xff000000,L(iobase)
1420 movel #~VIDEOMEMMASK,%d0
1421 andl L(mac_videobase),%d0
1422 addl #VIDEOMEMBASE,%d0
1423 movel %d0,L(mac_videobase)
1424 #if defined(CONSOLE)
1425 movel %pc@(L(phys_kernel_start)),%d0
1426 subl #PAGE_OFFSET,%d0
1427 subl %d0,L(console_font)
1428 subl %d0,L(console_font_data)
1430 #ifdef MAC_SERIAL_DEBUG
1431 orl #0x50000000,L(mac_sccbase)
1439 * Fix up the iobase register to point to the new location of the LEDs.
1441 movel #0xf0000000,L(iobase)
1444 * Energise the FPU and caches.
1447 movel #0x60,0xf05f400c
1451 * 040: slightly different, apparently.
1453 1: movew #0,0xf05f400e
1454 movew #0x64,0xf05f400e
1462 oriw #0x4000,0x61000000
1466 #ifdef CONFIG_APOLLO
1470 * Fix up the iobase before printing
1472 movel #0x80000000,L(iobase)
1483 is_not_040_or_060(L(cache_not_680460))
1491 is_060(L(cache68060))
1493 movel #CC6_ENABLE_D+CC6_ENABLE_I,%d0
1494 /* MMU stuff works in copyback mode now, so enable the cache */
1499 movel #CC6_ENABLE_D+CC6_ENABLE_I+CC6_ENABLE_SB+CC6_PUSH_DPI+CC6_ENABLE_B+CC6_CLRA_B,%d0
1500 /* MMU stuff works in copyback mode now, so enable the cache */
1502 /* enable superscalar dispatch in PCR */
1508 L(cache_not_680460):
1511 movel #CC3_ENABLE_DB+CC3_CLR_D+CC3_ENABLE_D+CC3_ENABLE_IB+CC3_CLR_I+CC3_ENABLE_I,%d0
1521 * Setup initial stack pointer
1523 lea init_task,%curptr
1524 lea init_thread_union+THREAD_SIZE,%sp
1528 subl %a6,%a6 /* clear a6 for gdb */
1531 * The new 64bit printf support requires an early exception initialization.
1535 /* jump to the kernel start */
1543 * Find a tag record in the bootinfo structure
1544 * The bootinfo structure is located right after the kernel bss
1545 * Returns: d0: size (-1 if not found)
1546 * a0: data pointer (end-of-records if not found)
1548 func_start get_bi_record,%d1
1552 1: tstw %a0@(BIR_TAG)
1554 cmpw %a0@(BIR_TAG),%d0
1556 addw %a0@(BIR_SIZE),%a0
1559 movew %a0@(BIR_SIZE),%d0
1560 lea %a0@(BIR_DATA),%a0
1563 lea %a0@(BIR_SIZE),%a0
1565 func_return get_bi_record
1569 * MMU Initialization Begins Here
1571 * The structure of the MMU tables on the 68k machines
1574 * Logical addresses are translated through
1575 * a hierarchical translation mechanism where the high-order
1576 * seven bits of the logical address (LA) are used as an
1577 * index into the "root table." Each entry in the root
1578 * table has a bit which specifies if it's a valid pointer to a
1579 * pointer table. Each entry defines a 32KMeg range of memory.
1580 * If an entry is invalid then that logical range of 32M is
1581 * invalid and references to that range of memory (when the MMU
1582 * is enabled) will fault. If the entry is valid, then it does
1583 * one of two things. On 040/060 class machines, it points to
1584 * a pointer table which then describes more finely the memory
1585 * within that 32M range. On 020/030 class machines, a technique
1586 * called "early terminating descriptors" are used. This technique
1587 * allows an entire 32Meg to be described by a single entry in the
1588 * root table. Thus, this entry in the root table, contains the
1589 * physical address of the memory or I/O at the logical address
1590 * which the entry represents and it also contains the necessary
1591 * cache bits for this region.
1594 * Per the Root Table, there will be one or more
1595 * pointer tables. Each pointer table defines a 32M range.
1596 * Not all of the 32M range need be defined. Again, the next
1597 * seven bits of the logical address are used an index into
1598 * the pointer table to point to page tables (if the pointer
1599 * is valid). There will undoubtedly be more than one
1600 * pointer table for the kernel because each pointer table
1601 * defines a range of only 32M. Valid pointer table entries
1602 * point to page tables, or are early terminating entries
1606 * Per the Pointer Tables, each page table entry points
1607 * to the physical page in memory that supports the logical
1608 * address that translates to the particular index.
1610 * In short, the Logical Address gets translated as follows:
1611 * bits 31..26 - index into the Root Table
1612 * bits 25..18 - index into the Pointer Table
1613 * bits 17..12 - index into the Page Table
1614 * bits 11..0 - offset into a particular 4K page
1616 * The algorithms which follows do one thing: they abstract
1617 * the MMU hardware. For example, there are three kinds of
1618 * cache settings that are relevant. Either, memory is
1619 * being mapped in which case it is either Kernel Code (or
1620 * the RamDisk) or it is MMU data. On the 030, the MMU data
1621 * option also describes the kernel. Or, I/O is being mapped
1622 * in which case it has its own kind of cache bits. There
1623 * are constants which abstract these notions from the code that
1624 * actually makes the call to map some range of memory.
1634 * This algorithm will print out the current MMU mappings.
1637 * %a5 points to the root table. Everything else is calculated
1641 #define mmu_next_valid 0
1642 #define mmu_start_logical 4
1643 #define mmu_next_logical 8
1644 #define mmu_start_physical 12
1645 #define mmu_next_physical 16
1647 #define MMU_PRINT_INVALID -1
1648 #define MMU_PRINT_VALID 1
1649 #define MMU_PRINT_UNINITED 0
1651 #define putZc(z,n) jbne 1f; putc z; jbra 2f; 1: putc n; 2:
1653 func_start mmu_print,%a0-%a6/%d0-%d7
1655 movel %pc@(L(kernel_pgdir_ptr)),%a5
1656 lea %pc@(L(mmu_print_data)),%a0
1657 movel #MMU_PRINT_UNINITED,%a0@(mmu_next_valid)
1659 is_not_040_or_060(mmu_030_print)
1668 * The following #if/#endif block is a tight algorithm for dumping the 040
1669 * MMU Map in gory detail. It really isn't that practical unless the
1670 * MMU Map algorithm appears to go awry and you need to debug it at the
1671 * entry per entry level.
1673 movel #ROOT_TABLE_SIZE,%d5
1675 movel %a5@+,%d7 | Burn an entry to skip the kernel mappings,
1676 subql #1,%d5 | they (might) work
1686 andil #0xFFFFFE00,%d7
1688 movel #PTR_TABLE_SIZE,%d4
1698 andil #0xFFFFFF00,%d7
1700 movel #PAGE_TABLE_SIZE,%d3
1714 movel #8+1+8+1+1,%d2
1729 #endif /* MMU 040 Dumping code that's gory and detailed */
1731 lea %pc@(kernel_pg_dir),%a5
1732 movel %a5,%a0 /* a0 has the address of the root table ptr */
1733 movel #0x00000000,%a4 /* logical address */
1736 /* Increment the logical address and preserve in d5 */
1738 addil #PAGESIZE<<13,%d5
1742 jbsr mmu_print_tuple_invalidate
1746 andil #0xfffffe00,%d6
1750 addil #PAGESIZE<<6,%d5
1754 jbsr mmu_print_tuple_invalidate
1758 andil #0xffffff00,%d6
1766 jbsr mmu_print_tuple_invalidate
1769 moveml %d0-%d1,%sp@-
1772 andil #0xfffff4e0,%d1
1773 lea %pc@(mmu_040_print_flags),%a6
1774 jbsr mmu_print_tuple
1775 moveml %sp@+,%d0-%d1
1787 movel %d5,%a4 /* move to the next logical address */
1795 andiw #0x8000,%d1 /* is it valid ? */
1796 jbeq 1f /* No, bail out */
1799 andil #0xff000000,%d1 /* Get the address */
1805 jbsr mmu_040_print_flags_tt
1809 andiw #0x8000,%d1 /* is it valid ? */
1810 jbeq 1f /* No, bail out */
1813 andil #0xff000000,%d1 /* Get the address */
1819 jbsr mmu_040_print_flags_tt
1825 mmu_040_print_flags:
1827 putZc(' ','G') /* global bit */
1829 putZc(' ','S') /* supervisor bit */
1830 mmu_040_print_flags_tt:
1835 putZc('w','c') /* write through or copy-back */
1840 putZc('s',' ') /* serialized non-cacheable, or non-cacheable */
1844 mmu_030_print_flags:
1846 putZc('C','I') /* write through or copy-back */
1855 andil #0xfffffff0,%d0
1857 movel #0x00000000,%a4 /* logical address */
1861 addil #PAGESIZE<<13,%d5
1863 btst #1,%d6 /* is it a table ptr? */
1865 btst #0,%d6 /* is it early terminating? */
1867 jbsr mmu_030_print_helper
1870 jbsr mmu_print_tuple_invalidate
1874 andil #0xfffffff0,%d6
1878 addil #PAGESIZE<<6,%d5
1880 btst #1,%d6 /* is it a table ptr? */
1882 btst #0,%d6 /* is it a page descriptor? */
1884 jbsr mmu_030_print_helper
1887 jbsr mmu_print_tuple_invalidate
1891 andil #0xfffffff0,%d6
1899 jbsr mmu_print_tuple_invalidate
1902 jbsr mmu_030_print_helper
1914 movel %d5,%a4 /* move to the next logical address */
1922 func_return mmu_print
1925 mmu_030_print_helper:
1926 moveml %d0-%d1,%sp@-
1929 lea %pc@(mmu_030_print_flags),%a6
1930 jbsr mmu_print_tuple
1931 moveml %sp@+,%d0-%d1
1934 mmu_print_tuple_invalidate:
1935 moveml %a0/%d7,%sp@-
1937 lea %pc@(L(mmu_print_data)),%a0
1938 tstl %a0@(mmu_next_valid)
1939 jbmi mmu_print_tuple_invalidate_exit
1941 movel #MMU_PRINT_INVALID,%a0@(mmu_next_valid)
1947 mmu_print_tuple_invalidate_exit:
1948 moveml %sp@+,%a0/%d7
1953 moveml %d0-%d7/%a0,%sp@-
1955 lea %pc@(L(mmu_print_data)),%a0
1957 tstl %a0@(mmu_next_valid)
1958 jble mmu_print_tuple_print
1960 cmpl %a0@(mmu_next_physical),%d1
1961 jbeq mmu_print_tuple_increment
1963 mmu_print_tuple_print:
1971 mmu_print_tuple_record:
1972 movel #MMU_PRINT_VALID,%a0@(mmu_next_valid)
1974 movel %d1,%a0@(mmu_next_physical)
1976 mmu_print_tuple_increment:
1979 addl %d7,%a0@(mmu_next_physical)
1981 mmu_print_tuple_exit:
1982 moveml %sp@+,%d0-%d7/%a0
1985 mmu_print_machine_cpu_types:
2007 is_not_040_or_060(2f)
2015 #endif /* MMU_PRINT */
2020 * This is a specific function which works on all 680x0 machines.
2021 * On 030, 040 & 060 it will attempt to use Transparent Translation
2023 * On 020 it will call the standard mmu_map which will use early
2024 * terminating descriptors.
2026 func_start mmu_map_tt,%d0/%d1/%a0,4
2037 /* Extract the highest bit set
2039 bfffo ARG3{#0,#32},%d1
2055 /* Generate the upper 16bit of the tt register
2061 is_040_or_060(L(mmu_map_tt_040))
2063 /* set 030 specific bits (read/write access for supervisor mode
2064 * (highest function code set, lower two bits masked))
2066 orw #TTR_ENABLE+TTR_RWM+TTR_FCB2+TTR_FCM1+TTR_FCM0,%d1
2082 jra L(mmu_map_tt_done)
2084 /* set 040 specific bits
2087 orw #TTR_ENABLE+TTR_KERNELMODE,%d1
2101 jra L(mmu_map_tt_done)
2104 mmu_map_eq ARG2,ARG3,ARG4
2108 func_return mmu_map_tt
2113 * This routine will map a range of memory using a pointer
2114 * table and allocating the pages on the fly from the kernel.
2115 * The pointer table does not have to be already linked into
2116 * the root table, this routine will do that if necessary.
2119 * This routine will assert failure and use the serial_putc
2120 * routines in the case of a run-time error. For example,
2121 * if the address is already mapped.
2124 * This routine will use early terminating descriptors
2125 * where possible for the 68020+68851 and 68030 type
2128 func_start mmu_map,%d0-%d4/%a0-%a4
2137 /* Get logical address and round it down to 256KB
2140 andl #-(PAGESIZE*PAGE_TABLE_SIZE),%d0
2143 /* Get the end address
2149 /* Get physical address and round it down to 256KB
2152 andl #-(PAGESIZE*PAGE_TABLE_SIZE),%d0
2155 /* Add page attributes to the physical address
2158 orw #_PAGE_PRESENT+_PAGE_ACCESSED+_PAGE_DIRTY,%d0
2165 is_not_040_or_060(L(mmu_map_030))
2167 addw #_PAGE_GLOBAL040,%a2
2169 * MMU 040 & 060 Support
2171 * The MMU usage for the 040 and 060 is different enough from
2172 * the 030 and 68851 that there is separate code. This comment
2173 * block describes the data structures and algorithms built by
2176 * The 040 does not support early terminating descriptors, as
2177 * the 030 does. Therefore, a third level of table is needed
2178 * for the 040, and that would be the page table. In Linux,
2179 * page tables are allocated directly from the memory above the
2185 /* Calculate the offset into the root table
2188 moveq #ROOT_INDEX_SHIFT,%d1
2190 mmu_get_root_table_entry %d0
2192 /* Calculate the offset into the pointer table
2195 moveq #PTR_INDEX_SHIFT,%d1
2197 andl #PTR_TABLE_SIZE-1,%d0
2198 mmu_get_ptr_table_entry %a0,%d0
2200 /* Calculate the offset into the page table
2203 moveq #PAGE_INDEX_SHIFT,%d1
2205 andl #PAGE_TABLE_SIZE-1,%d0
2206 mmu_get_page_table_entry %a0,%d0
2208 /* The page table entry must not no be busy
2211 jne L(mmu_map_error)
2213 /* Do the mapping and advance the pointers
2220 /* Ready with mapping?
2228 /* Calculate the offset into the root table
2231 moveq #ROOT_INDEX_SHIFT,%d1
2233 mmu_get_root_table_entry %d0
2235 /* Check if logical address 32MB aligned,
2236 * so we can try to map it once
2239 andl #(PTR_TABLE_SIZE*PAGE_TABLE_SIZE*PAGESIZE-1)&(-ROOT_TABLE_SIZE),%d0
2242 /* Is there enough to map for 32MB at once
2244 lea %a3@(PTR_TABLE_SIZE*PAGE_TABLE_SIZE*PAGESIZE-1),%a1
2250 /* The root table entry must not no be busy
2253 jne L(mmu_map_error)
2255 /* Do the mapping and advance the pointers
2265 lea %a2@(PTR_TABLE_SIZE*PAGE_TABLE_SIZE*PAGESIZE),%a2
2266 jra L(mmu_mapnext_030)
2268 /* Calculate the offset into the pointer table
2271 moveq #PTR_INDEX_SHIFT,%d1
2273 andl #PTR_TABLE_SIZE-1,%d0
2274 mmu_get_ptr_table_entry %a0,%d0
2276 /* The pointer table entry must not no be busy
2279 jne L(mmu_map_error)
2281 /* Do the mapping and advance the pointers
2289 addl #PAGE_TABLE_SIZE*PAGESIZE,%a2
2290 addl #PAGE_TABLE_SIZE*PAGESIZE,%a3
2293 /* Ready with mapping?
2302 dputs "mmu_map error:"
2314 * On the 040 class machines, all pages that are used for the
2315 * mmu have to be fixed up.
2318 func_start mmu_fixup_page_mmu_cache,%d0/%a0
2320 dputs "mmu_fixup_page_mmu_cache"
2323 /* Calculate the offset into the root table
2326 moveq #ROOT_INDEX_SHIFT,%d1
2328 mmu_get_root_table_entry %d0
2330 /* Calculate the offset into the pointer table
2333 moveq #PTR_INDEX_SHIFT,%d1
2335 andl #PTR_TABLE_SIZE-1,%d0
2336 mmu_get_ptr_table_entry %a0,%d0
2338 /* Calculate the offset into the page table
2341 moveq #PAGE_INDEX_SHIFT,%d1
2343 andl #PAGE_TABLE_SIZE-1,%d0
2344 mmu_get_page_table_entry %a0,%d0
2347 andil #_CACHEMASK040,%d0
2348 orl %pc@(m68k_pgtable_cachemode),%d0
2353 func_return mmu_fixup_page_mmu_cache
2358 * create a temporary mapping to enable the mmu,
2359 * this we don't need any transparation translation tricks.
2362 func_start mmu_temp_map,%d0/%d1/%a0/%a1
2364 dputs "mmu_temp_map"
2369 lea %pc@(L(temp_mmap_mem)),%a1
2371 /* Calculate the offset in the root table
2374 moveq #ROOT_INDEX_SHIFT,%d1
2376 mmu_get_root_table_entry %d0
2378 /* Check if the table is temporary allocated, so we have to reuse it
2381 cmpl %pc@(L(memory_start)),%d0
2384 /* Temporary allocate a ptr table and insert it into the root table
2387 addl #PTR_TABLE_SIZE*4,%a1@
2388 orw #_PAGE_TABLE+_PAGE_ACCESSED,%d0
2393 /* Mask the root table entry for the ptr table
2395 andw #-ROOT_TABLE_SIZE,%d0
2398 /* Calculate the offset into the pointer table
2401 moveq #PTR_INDEX_SHIFT,%d1
2403 andl #PTR_TABLE_SIZE-1,%d0
2407 /* Check if a temporary page table is already allocated
2412 /* Temporary allocate a page table and insert it into the ptr table
2415 /* The 512 should be PAGE_TABLE_SIZE*4, but that violates the
2416 alignment restriction for pointer tables on the '0[46]0. */
2418 orw #_PAGE_TABLE+_PAGE_ACCESSED,%d0
2423 /* Mask the ptr table entry for the page table
2425 andw #-PTR_TABLE_SIZE,%d0
2428 /* Calculate the offset into the page table
2431 moveq #PAGE_INDEX_SHIFT,%d1
2433 andl #PAGE_TABLE_SIZE-1,%d0
2437 /* Insert the address into the page table
2441 orw #_PAGE_PRESENT+_PAGE_ACCESSED+_PAGE_DIRTY,%d0
2447 func_return mmu_temp_map
2449 func_start mmu_engage,%d0-%d2/%a0-%a3
2451 moveq #ROOT_TABLE_SIZE-1,%d0
2452 /* Temporarily use a different root table. */
2453 lea %pc@(L(kernel_pgdir_ptr)),%a0
2455 movel %pc@(L(memory_start)),%a1
2462 lea %pc@(L(temp_mmap_mem)),%a0
2465 movew #PAGESIZE-1,%d0
2472 /* Skip temp mappings if phys == virt */
2476 mmu_temp_map %a0,%a0
2477 mmu_temp_map %a0,%a1
2481 mmu_temp_map %a0,%a0
2482 mmu_temp_map %a0,%a1
2484 movel %pc@(L(memory_start)),%a3
2485 movel %pc@(L(phys_kernel_start)),%d2
2487 is_not_040_or_060(L(mmu_engage_030))
2497 movel #TC_ENABLE+TC_PAGE4K,%d0
2498 movec %d0,%tc /* enable the MMU */
2507 jra L(mmu_engage_cleanup)
2509 L(mmu_engage_030_temp):
2513 lea %pc@(L(mmu_engage_030_temp)),%a0
2514 movel #0x80000002,%a0@
2521 * enable,super root enable,4096 byte pages,7 bit root index,
2522 * 7 bit pointer index, 6 bit page table index.
2524 movel #0x82c07760,%a0@(8)
2525 pmove %a0@(8),%tc /* enable the MMU */
2527 1: movel %a2,%a0@(4)
2534 L(mmu_engage_cleanup):
2535 subl #PAGE_OFFSET,%d2
2537 movel %a2,L(kernel_pgdir_ptr)
2542 func_return mmu_engage
2544 func_start mmu_get_root_table_entry,%d0/%a1
2547 dputs "mmu_get_root_table_entry:"
2552 movel %pc@(L(kernel_pgdir_ptr)),%a0
2558 /* Find the start of free memory, get_bi_record does this for us,
2559 * as the bootinfo structure is located directly behind the kernel
2560 * and and we simply search for the last entry.
2562 get_bi_record BI_LAST
2563 addw #PAGESIZE-1,%a0
2569 lea %pc@(L(memory_start)),%a0
2571 lea %pc@(L(kernel_end)),%a0
2574 /* we have to return the first page at _stext since the init code
2575 * in mm/init.c simply expects kernel_pg_dir there, the rest of
2576 * page is used for further ptr tables in get_ptr_table.
2578 lea %pc@(_stext),%a0
2579 lea %pc@(L(mmu_cached_pointer_tables)),%a1
2581 addl #ROOT_TABLE_SIZE*4,%a1@
2583 lea %pc@(L(mmu_num_pointer_tables)),%a1
2589 movew #PAGESIZE/4-1,%d0
2594 lea %pc@(L(kernel_pgdir_ptr)),%a1
2608 func_return mmu_get_root_table_entry
2612 func_start mmu_get_ptr_table_entry,%d0/%a1
2615 dputs "mmu_get_ptr_table_entry:"
2625 /* Keep track of the number of pointer tables we use
2627 dputs "\nmmu_get_new_ptr_table:"
2628 lea %pc@(L(mmu_num_pointer_tables)),%a0
2632 /* See if there is a free pointer table in our cache of pointer tables
2634 lea %pc@(L(mmu_cached_pointer_tables)),%a1
2638 /* Get a new pointer table page from above the kernel memory
2643 /* There is an unused pointer table in our cache... use it
2646 addl #PTR_TABLE_SIZE*4,%a1@
2651 /* Insert the new pointer table into the root table
2654 orw #_PAGE_TABLE+_PAGE_ACCESSED,%d0
2657 /* Extract the pointer table entry
2659 andw #-PTR_TABLE_SIZE,%d0
2669 func_return mmu_get_ptr_table_entry
2672 func_start mmu_get_page_table_entry,%d0/%a1
2675 dputs "mmu_get_page_table_entry:"
2685 /* If the page table entry doesn't exist, we allocate a complete new
2686 * page and use it as one continues big page table which can cover
2687 * 4MB of memory, nearly almost all mappings have that alignment.
2690 addw #_PAGE_TABLE+_PAGE_ACCESSED,%a0
2692 /* align pointer table entry for a page of page tables
2695 andw #-(PAGESIZE/PAGE_TABLE_SIZE),%d0
2698 /* Insert the page tables into the pointer entries
2700 moveq #PAGESIZE/PAGE_TABLE_SIZE/4-1,%d0
2703 lea %a0@(PAGE_TABLE_SIZE*4),%a0
2706 /* Now we can get the initialized pointer table entry
2711 /* Extract the page table entry
2713 andw #-PAGE_TABLE_SIZE,%d0
2723 func_return mmu_get_page_table_entry
2728 * Return a new page from the memory start and clear it.
2730 func_start get_new_page,%d0/%a1
2732 dputs "\nget_new_page:"
2734 /* allocate the page and adjust memory_start
2736 lea %pc@(L(memory_start)),%a0
2740 /* clear the new page
2743 movew #PAGESIZE/4-1,%d0
2751 func_return get_new_page
2756 * Debug output support
2757 * Atarians have a choice between the parallel port, the serial port
2758 * from the MFP or a serial port of the SCC
2763 L(scc_initable_mac):
2764 .byte 9,12 /* Reset */
2765 .byte 4,0x44 /* x16, 1 stopbit, no parity */
2766 .byte 3,0xc0 /* receiver: 8 bpc */
2767 .byte 5,0xe2 /* transmitter: 8 bpc, assert dtr/rts */
2768 .byte 9,0 /* no interrupts */
2769 .byte 10,0 /* NRZ */
2770 .byte 11,0x50 /* use baud rate generator */
2771 .byte 12,10,13,0 /* 9600 baud */
2772 .byte 14,1 /* Baud rate generator enable */
2773 .byte 3,0xc1 /* enable receiver */
2774 .byte 5,0xea /* enable transmitter */
2780 /* #define USE_PRINTER */
2781 /* #define USE_SCC_B */
2782 /* #define USE_SCC_A */
2785 #if defined(USE_SCC_A) || defined(USE_SCC_B)
2787 /* Initialisation table for SCC */
2789 .byte 9,12 /* Reset */
2790 .byte 4,0x44 /* x16, 1 stopbit, no parity */
2791 .byte 3,0xc0 /* receiver: 8 bpc */
2792 .byte 5,0xe2 /* transmitter: 8 bpc, assert dtr/rts */
2793 .byte 9,0 /* no interrupts */
2794 .byte 10,0 /* NRZ */
2795 .byte 11,0x50 /* use baud rate generator */
2796 .byte 12,24,13,0 /* 9600 baud */
2797 .byte 14,2,14,3 /* use master clock for BRG, enable */
2798 .byte 3,0xc1 /* enable receiver */
2799 .byte 5,0xea /* enable transmitter */
2806 LPSG_SELECT = 0xff8800
2807 LPSG_READ = 0xff8800
2808 LPSG_WRITE = 0xff8802
2812 LSTMFP_GPIP = 0xfffa01
2813 LSTMFP_DDR = 0xfffa05
2814 LSTMFP_IERB = 0xfffa09
2816 #elif defined(USE_SCC_B)
2818 LSCC_CTRL = 0xff8c85
2819 LSCC_DATA = 0xff8c87
2821 #elif defined(USE_SCC_A)
2823 LSCC_CTRL = 0xff8c81
2824 LSCC_DATA = 0xff8c83
2826 #elif defined(USE_MFP)
2829 LMFP_TDCDR = 0xfffa1d
2830 LMFP_TDDR = 0xfffa25
2835 #endif /* CONFIG_ATARI */
2838 * Serial port output support.
2842 * Initialize serial port hardware for 9600/8/1
2844 func_start serial_init,%d0/%d1/%a0/%a1
2846 * Some of the register usage that follows
2848 * a0 = pointer to boot info record
2849 * d0 = boot info offset
2851 * a0 = address of SCC
2852 * a1 = Liobase address/address of scc_initable
2853 * d0 = init data for serial port
2855 * a0 = address of SCC
2856 * a1 = address of scc_initable_mac
2857 * d0 = init data for serial port
2861 #define SERIAL_DTR 7
2862 #define SERIAL_CNTRL CIABBASE+C_PRA
2865 lea %pc@(L(custom)),%a0
2866 movel #-ZTWOBASE,%a0@
2867 bclr #SERIAL_DTR,SERIAL_CNTRL-ZTWOBASE
2868 get_bi_record BI_AMIGA_SERPER
2869 movew %a0@,CUSTOMBASE+C_SERPER-ZTWOBASE
2870 | movew #61,CUSTOMBASE+C_SERPER-ZTWOBASE
2875 movel %pc@(L(iobase)),%a1
2876 #if defined(USE_PRINTER)
2877 bclr #0,%a1@(LSTMFP_IERB)
2878 bclr #0,%a1@(LSTMFP_DDR)
2879 moveb #LPSG_CONTROL,%a1@(LPSG_SELECT)
2880 moveb #0xff,%a1@(LPSG_WRITE)
2881 moveb #LPSG_IO_B,%a1@(LPSG_SELECT)
2882 clrb %a1@(LPSG_WRITE)
2883 moveb #LPSG_IO_A,%a1@(LPSG_SELECT)
2884 moveb %a1@(LPSG_READ),%d0
2886 moveb %d0,%a1@(LPSG_WRITE)
2887 #elif defined(USE_SCC)
2888 lea %a1@(LSCC_CTRL),%a0
2889 lea %pc@(L(scc_initable)),%a1
2896 #elif defined(USE_MFP)
2897 bclr #1,%a1@(LMFP_TSR)
2898 moveb #0x88,%a1@(LMFP_UCR)
2899 andb #0x70,%a1@(LMFP_TDCDR)
2900 moveb #2,%a1@(LMFP_TDDR)
2901 orb #1,%a1@(LMFP_TDCDR)
2902 bset #1,%a1@(LMFP_TSR)
2904 jra L(serial_init_done)
2908 is_not_mac(L(serial_init_not_mac))
2909 #ifdef MAC_SERIAL_DEBUG
2910 #if !defined(MAC_USE_SCC_A) && !defined(MAC_USE_SCC_B)
2911 #define MAC_USE_SCC_B
2913 #define mac_scc_cha_b_ctrl_offset 0x0
2914 #define mac_scc_cha_a_ctrl_offset 0x2
2915 #define mac_scc_cha_b_data_offset 0x4
2916 #define mac_scc_cha_a_data_offset 0x6
2918 #ifdef MAC_USE_SCC_A
2919 /* Initialize channel A */
2920 movel %pc@(L(mac_sccbase)),%a0
2921 lea %pc@(L(scc_initable_mac)),%a1
2924 moveb %d0,%a0@(mac_scc_cha_a_ctrl_offset)
2925 moveb %a1@+,%a0@(mac_scc_cha_a_ctrl_offset)
2928 #endif /* MAC_USE_SCC_A */
2930 #ifdef MAC_USE_SCC_B
2931 /* Initialize channel B */
2932 #ifndef MAC_USE_SCC_A /* Load mac_sccbase only if needed */
2933 movel %pc@(L(mac_sccbase)),%a0
2934 #endif /* MAC_USE_SCC_A */
2935 lea %pc@(L(scc_initable_mac)),%a1
2938 moveb %d0,%a0@(mac_scc_cha_b_ctrl_offset)
2939 moveb %a1@+,%a0@(mac_scc_cha_b_ctrl_offset)
2942 #endif /* MAC_USE_SCC_B */
2943 #endif /* MAC_SERIAL_DEBUG */
2945 jra L(serial_init_done)
2946 L(serial_init_not_mac):
2947 #endif /* CONFIG_MAC */
2951 /* debug output goes into SRAM, so we don't do it unless requested
2952 - check for '%LX$' signature in SRAM */
2953 lea %pc@(q40_mem_cptr),%a1
2954 move.l #0xff020010,%a1@ /* must be inited - also used by debug=mem */
2955 move.l #0xff020000,%a1
2968 lea %pc@(L(q40_do_debug)),%a1
2970 /*nodbg: q40_do_debug is 0 by default*/
2974 #ifdef CONFIG_APOLLO
2975 /* We count on the PROM initializing SIO1 */
2979 /* We count on the boot loader initialising the UART */
2982 L(serial_init_done):
2983 func_return serial_init
2986 * Output character on serial port.
2988 func_start serial_putc,%d0/%d1/%a0/%a1
2994 /* A little safe recursion is good for the soul */
3002 movel %pc@(L(custom)),%a0
3003 movew %d0,%a0@(CUSTOMBASE+C_SERDAT)
3004 1: movew %a0@(CUSTOMBASE+C_SERDATR),%d0
3007 jra L(serial_putc_done)
3014 #ifdef MAC_SERIAL_DEBUG
3016 #ifdef MAC_USE_SCC_A
3017 movel %pc@(L(mac_sccbase)),%a1
3018 3: btst #2,%a1@(mac_scc_cha_a_ctrl_offset)
3020 moveb %d0,%a1@(mac_scc_cha_a_data_offset)
3021 #endif /* MAC_USE_SCC_A */
3023 #ifdef MAC_USE_SCC_B
3024 #ifndef MAC_USE_SCC_A /* Load mac_sccbase only if needed */
3025 movel %pc@(L(mac_sccbase)),%a1
3026 #endif /* MAC_USE_SCC_A */
3027 4: btst #2,%a1@(mac_scc_cha_b_ctrl_offset)
3029 moveb %d0,%a1@(mac_scc_cha_b_data_offset)
3030 #endif /* MAC_USE_SCC_B */
3032 #endif /* MAC_SERIAL_DEBUG */
3034 jra L(serial_putc_done)
3036 #endif /* CONFIG_MAC */
3040 movel %pc@(L(iobase)),%a1
3041 #if defined(USE_PRINTER)
3042 3: btst #0,%a1@(LSTMFP_GPIP)
3044 moveb #LPSG_IO_B,%a1@(LPSG_SELECT)
3045 moveb %d0,%a1@(LPSG_WRITE)
3046 moveb #LPSG_IO_A,%a1@(LPSG_SELECT)
3047 moveb %a1@(LPSG_READ),%d0
3049 moveb %d0,%a1@(LPSG_WRITE)
3053 moveb %d0,%a1@(LPSG_WRITE)
3054 #elif defined(USE_SCC)
3055 3: btst #2,%a1@(LSCC_CTRL)
3057 moveb %d0,%a1@(LSCC_DATA)
3058 #elif defined(USE_MFP)
3059 3: btst #7,%a1@(LMFP_TSR)
3061 moveb %d0,%a1@(LMFP_UDR)
3063 jra L(serial_putc_done)
3065 #endif /* CONFIG_ATARI */
3067 #ifdef CONFIG_MVME147
3069 1: btst #2,M147_SCC_CTRL_A
3071 moveb %d0,M147_SCC_DATA_A
3072 jbra L(serial_putc_done)
3076 #ifdef CONFIG_MVME16x
3079 * If the loader gave us a board type then we can use that to
3080 * select an appropriate output routine; otherwise we just use
3081 * the Bug code. If we haev to use the Bug that means the Bug
3082 * workspace has to be valid, which means the Bug has to use
3083 * the SRAM, which is non-standard.
3085 moveml %d0-%d7/%a2-%a6,%sp@-
3086 movel vme_brdtype,%d1
3087 jeq 1f | No tag - use the Bug
3088 cmpi #VME_TYPE_MVME162,%d1
3090 cmpi #VME_TYPE_MVME172,%d1
3092 /* 162/172; it's an SCC */
3093 6: btst #2,M162_SCC_CTRL_A
3098 moveb #8,M162_SCC_CTRL_A
3102 moveb %d0,M162_SCC_CTRL_A
3105 /* 166/167/177; it's a CD2401 */
3107 moveb M167_CYIER,%d2
3108 moveb #0x02,M167_CYIER
3110 btst #5,M167_PCSCCTICR
3112 moveb M167_PCTPIACKR,%d1
3113 moveb M167_CYLICR,%d1
3115 moveb #0x08,M167_CYTEOIR
3118 moveb %d0,M167_CYTDR
3119 moveb #0,M167_CYTEOIR
3120 moveb %d2,M167_CYIER
3125 .word 0x0020 /* TRAP 0x020 */
3127 moveml %sp@+,%d0-%d7/%a2-%a6
3128 jbra L(serial_putc_done)
3130 #endif /* CONFIG_MVME16x */
3132 #ifdef CONFIG_BVME6000
3135 * The BVME6000 machine has a serial port ...
3137 1: btst #2,BVME_SCC_CTRL_A
3139 moveb %d0,BVME_SCC_DATA_A
3140 jbra L(serial_putc_done)
3147 movel 0xFEFE0018,%a1
3150 jbra L(serial_putc_done)
3156 tst.l %pc@(L(q40_do_debug)) /* only debug if requested */
3158 lea %pc@(q40_mem_cptr),%a1
3163 jbra L(serial_putc_done)
3167 #ifdef CONFIG_APOLLO
3169 movl %pc@(L(iobase)),%a1
3170 moveb %d0,%a1@(LTHRB0)
3171 1: moveb %a1@(LSRB0),%d0
3174 jbra L(serial_putc_done)
3180 movl %pc@(L(iobase)),%a1
3181 addl %pc@(L(uartbase)),%a1
3182 movel %pc@(L(uart_scode)),%d1 /* Check the scode */
3183 jmi 3f /* Unset? Exit */
3184 cmpi #256,%d1 /* APCI scode? */
3186 1: moveb %a1@(DCALSR),%d1 /* Output to DCA */
3189 moveb %d0,%a1@(DCADATA)
3190 jbra L(serial_putc_done)
3191 2: moveb %a1@(APCILSR),%d1 /* Output to APCI */
3194 moveb %d0,%a1@(APCIDATA)
3195 jbra L(serial_putc_done)
3199 L(serial_putc_done):
3200 func_return serial_putc
3205 func_start puts,%d0/%a0
3222 * Output number in hex notation.
3225 func_start putn,%d0-%d2
3237 addb #'A'-('9'+1),%d2
3253 * This routine takes its parameters on the stack. It then
3254 * turns around and calls the internal routine. This routine
3255 * is used until the Linux console driver initializes itself.
3257 * The calling parameters are:
3258 * void mac_serial_print(const char *str);
3260 * This routine does NOT understand variable arguments only
3263 ENTRY(mac_serial_print)
3264 moveml %d0/%a0,%sp@-
3269 movel %sp@(10),%a0 /* fetch parameter */
3277 moveml %sp@+,%d0/%a0
3279 #endif /* CONFIG_MAC */
3281 #if defined(CONFIG_HP300) || defined(CONFIG_APOLLO)
3282 func_start set_leds,%d0/%a0
3286 movel %pc@(L(iobase)),%a0
3287 moveb %d0,%a0@(0x1ffff)
3291 #ifdef CONFIG_APOLLO
3292 movel %pc@(L(iobase)),%a0
3295 moveb %d0,%a0@(LCPUCTRL)
3298 func_return set_leds
3303 * For continuity, see the data alignment
3304 * to which this structure is tied.
3306 #define Lconsole_struct_cur_column 0
3307 #define Lconsole_struct_cur_row 4
3308 #define Lconsole_struct_num_columns 8
3309 #define Lconsole_struct_num_rows 12
3310 #define Lconsole_struct_left_edge 16
3311 #define Lconsole_struct_penguin_putc 20
3313 func_start console_init,%a0-%a4/%d0-%d7
3315 * Some of the register usage that follows
3316 * a0 = pointer to boot_info
3317 * a1 = pointer to screen
3318 * a2 = pointer to Lconsole_globals
3319 * d3 = pixel width of screen
3320 * d4 = pixel height of screen
3321 * (d3,d4) ~= (x,y) of a point just below
3322 * and to the right of the screen
3323 * NOT on the screen!
3324 * d5 = number of bytes per scan line
3325 * d6 = number of bytes on the entire screen
3328 lea %pc@(L(console_globals)),%a2
3329 movel %pc@(L(mac_videobase)),%a1
3330 movel %pc@(L(mac_rowbytes)),%d5
3331 movel %pc@(L(mac_dimensions)),%d3 /* -> low byte */
3333 swap %d4 /* -> high byte */
3334 andl #0xffff,%d3 /* d3 = screen width in pixels */
3335 andl #0xffff,%d4 /* d4 = screen height in pixels */
3339 mulul %d4,%d6 /* scan line bytes x num scan lines */
3340 divul #8,%d6 /* we'll clear 8 bytes at a time */
3341 moveq #-1,%d0 /* Mac_black */
3344 L(console_clear_loop):
3347 dbra %d6,L(console_clear_loop)
3349 /* Calculate font size */
3351 #if defined(FONT_8x8) && defined(CONFIG_FONT_8x8)
3352 lea %pc@(font_vga_8x8),%a0
3353 #elif defined(FONT_8x16) && defined(CONFIG_FONT_8x16)
3354 lea %pc@(font_vga_8x16),%a0
3355 #elif defined(FONT_6x11) && defined(CONFIG_FONT_6x11)
3356 lea %pc@(font_vga_6x11),%a0
3357 #elif defined(CONFIG_FONT_8x8) /* default */
3358 lea %pc@(font_vga_8x8),%a0
3359 #else /* no compiled-in font */
3364 * At this point we make a shift in register usage
3365 * a1 = address of console_font pointer
3367 lea %pc@(L(console_font)),%a1
3368 movel %a0,%a1@ /* store pointer to struct fbcon_font_desc in console_font */
3371 lea %pc@(L(console_font_data)),%a4
3372 movel %a0@(FONT_DESC_DATA),%d0
3373 subl #L(console_font),%a1
3378 * Calculate global maxs
3379 * Note - we can use either an
3380 * 8 x 16 or 8 x 8 character font
3381 * 6 x 11 also supported
3383 /* ASSERT: a0 = contents of Lconsole_font */
3384 movel %d3,%d0 /* screen width in pixels */
3385 divul %a0@(FONT_DESC_WIDTH),%d0 /* d0 = max num chars per row */
3387 movel %d4,%d1 /* screen height in pixels */
3388 divul %a0@(FONT_DESC_HEIGHT),%d1 /* d1 = max num rows */
3390 movel %d0,%a2@(Lconsole_struct_num_columns)
3391 movel %d1,%a2@(Lconsole_struct_num_rows)
3394 * Clear the current row and column
3396 clrl %a2@(Lconsole_struct_cur_column)
3397 clrl %a2@(Lconsole_struct_cur_row)
3398 clrl %a2@(Lconsole_struct_left_edge)
3401 * Initialization is complete
3404 func_return console_init
3406 func_start console_put_stats,%a0/%d7
3408 * Some of the register usage that follows
3409 * a0 = pointer to boot_info
3410 * d7 = value of boot_info fields
3412 puts "\nMacLinux\n\n"
3416 putn %pc@(L(mac_videobase)) /* video addr. */
3419 lea %pc@(_stext),%a0
3427 putn %pc@(L(cputype))
3430 #ifdef MAC_SERIAL_DEBUG
3431 putn %pc@(L(mac_sccbase))
3434 # if defined(MMU_PRINT)
3435 jbsr mmu_print_machine_cpu_types
3436 # endif /* MMU_PRINT */
3437 #endif /* SERIAL_DEBUG */
3439 func_return console_put_stats
3441 #ifdef CONSOLE_PENGUIN
3442 func_start console_put_penguin,%a0-%a1/%d0-%d7
3444 * Get 'that_penguin' onto the screen in the upper right corner
3445 * penguin is 64 x 74 pixels, align against right edge of screen
3447 lea %pc@(L(mac_dimensions)),%a0
3450 subil #64,%d0 /* snug up against the right edge */
3451 clrl %d1 /* start at the top */
3453 lea %pc@(L(that_penguin)),%a1
3454 L(console_penguin_row):
3456 L(console_penguin_pixel_pair):
3459 console_plot_pixel %d0,%d1,%d2
3462 console_plot_pixel %d0,%d1,%d2
3464 dbra %d6,L(console_penguin_pixel_pair)
3468 dbra %d7,L(console_penguin_row)
3470 func_return console_put_penguin
3472 /* include penguin bitmap */
3474 #include "../mac/mac_penguin.S"
3478 * Calculate source and destination addresses
3483 func_start console_scroll,%a0-%a4/%d0-%d7
3484 lea %pc@(L(mac_videobase)),%a0
3487 lea %pc@(L(mac_rowbytes)),%a0
3489 movel %pc@(L(console_font)),%a0
3492 mulul %a0@(FONT_DESC_HEIGHT),%d5 /* account for # scan lines per character */
3498 lea %pc@(L(mac_dimensions)),%a0
3502 andl #0xffff,%d3 /* d3 = screen width in pixels */
3503 andl #0xffff,%d4 /* d4 = screen height in pixels */
3506 * Calculate number of bytes to move
3508 lea %pc@(L(mac_rowbytes)),%a0
3510 movel %pc@(L(console_font)),%a0
3511 subl %a0@(FONT_DESC_HEIGHT),%d4 /* we're not scrolling the top row! */
3512 mulul %d4,%d6 /* scan line bytes x num scan lines */
3513 divul #32,%d6 /* we'll move 8 longs at a time */
3516 L(console_scroll_loop):
3525 dbra %d6,L(console_scroll_loop)
3527 lea %pc@(L(mac_rowbytes)),%a0
3529 movel %pc@(L(console_font)),%a0
3530 mulul %a0@(FONT_DESC_HEIGHT),%d6 /* scan line bytes x font height */
3531 divul #32,%d6 /* we'll move 8 words at a time */
3535 L(console_scroll_clear_loop):
3544 dbra %d6,L(console_scroll_clear_loop)
3547 func_return console_scroll
3550 func_start console_putc,%a0/%a1/%d0-%d7
3552 is_not_mac(L(console_exit))
3553 tstl %pc@(L(console_font))
3556 /* Output character in d7 on console.
3562 /* A little safe recursion is good for the soul */
3565 lea %pc@(L(console_globals)),%a0
3568 jne L(console_not_lf)
3569 movel %a0@(Lconsole_struct_cur_row),%d0
3571 movel %d0,%a0@(Lconsole_struct_cur_row)
3572 movel %a0@(Lconsole_struct_num_rows),%d1
3576 movel %d0,%a0@(Lconsole_struct_cur_row)
3583 jne L(console_not_cr)
3584 clrl %a0@(Lconsole_struct_cur_column)
3589 jne L(console_not_home)
3590 clrl %a0@(Lconsole_struct_cur_row)
3591 clrl %a0@(Lconsole_struct_cur_column)
3595 * At this point we know that the %d7 character is going to be
3596 * rendered on the screen. Register usage is -
3597 * a0 = pointer to console globals
3599 * d0 = cursor column
3600 * d1 = cursor row to draw the character
3601 * d7 = character number
3603 L(console_not_home):
3604 movel %a0@(Lconsole_struct_cur_column),%d0
3605 addql #1,%a0@(Lconsole_struct_cur_column)
3606 movel %a0@(Lconsole_struct_num_columns),%d1
3609 console_putc #'\n' /* recursion is OK! */
3611 movel %a0@(Lconsole_struct_cur_row),%d1
3614 * At this point we make a shift in register usage
3615 * a0 = address of pointer to font data (fbcon_font_desc)
3617 movel %pc@(L(console_font)),%a0
3618 movel %pc@(L(console_font_data)),%a1 /* Load fbcon_font_desc.data into a1 */
3619 andl #0x000000ff,%d7
3620 /* ASSERT: a0 = contents of Lconsole_font */
3621 mulul %a0@(FONT_DESC_HEIGHT),%d7 /* d7 = index into font data */
3622 addl %d7,%a1 /* a1 = points to char image */
3625 * At this point we make a shift in register usage
3626 * d0 = pixel coordinate, x
3627 * d1 = pixel coordinate, y
3628 * d2 = (bit 0) 1/0 for white/black (!) pixel on screen
3629 * d3 = font scan line data (8 pixels)
3630 * d6 = count down for the font's pixel width (8)
3631 * d7 = count down for the font's pixel count in height
3633 /* ASSERT: a0 = contents of Lconsole_font */
3634 mulul %a0@(FONT_DESC_WIDTH),%d0
3635 mulul %a0@(FONT_DESC_HEIGHT),%d1
3636 movel %a0@(FONT_DESC_HEIGHT),%d7 /* Load fbcon_font_desc.height into d7 */
3638 L(console_read_char_scanline):
3641 /* ASSERT: a0 = contents of Lconsole_font */
3642 movel %a0@(FONT_DESC_WIDTH),%d6 /* Load fbcon_font_desc.width into d6 */
3645 L(console_do_font_scanline):
3647 scsb %d2 /* convert 1 bit into a byte */
3648 console_plot_pixel %d0,%d1,%d2
3650 dbra %d6,L(console_do_font_scanline)
3652 /* ASSERT: a0 = contents of Lconsole_font */
3653 subl %a0@(FONT_DESC_WIDTH),%d0
3655 dbra %d7,L(console_read_char_scanline)
3658 func_return console_putc
3664 * d2 = (bit 0) 1/0 for white/black (!)
3665 * All registers are preserved
3667 func_start console_plot_pixel,%a0-%a1/%d0-%d4
3669 movel %pc@(L(mac_videobase)),%a1
3670 movel %pc@(L(mac_videodepth)),%d3
3673 mulul %pc@(L(mac_rowbytes)),%d1
3678 * d0 = x coord becomes byte offset into frame buffer
3680 * d2 = black or white (0/1)
3682 * d4 = temp of x (d0) for many bit depths
3687 movel %d0,%d4 /* we need the low order 3 bits! */
3692 eorb #7,%d4 /* reverse the x-coordinate w/ screen-bit # */
3696 jbra L(console_plot_pixel_exit)
3699 jbra L(console_plot_pixel_exit)
3704 movel %d0,%d4 /* we need the low order 2 bits! */
3709 eorb #3,%d4 /* reverse the x-coordinate w/ screen-bit # */
3716 jbra L(console_plot_pixel_exit)
3721 jbra L(console_plot_pixel_exit)
3726 movel %d0,%d4 /* we need the low order bit! */
3742 jbra L(console_plot_pixel_exit)
3751 jbra L(console_plot_pixel_exit)
3761 jbra L(console_plot_pixel_exit)
3764 jbra L(console_plot_pixel_exit)
3768 jbne L(console_plot_pixel_exit)
3775 jbra L(console_plot_pixel_exit)
3778 jbra L(console_plot_pixel_exit)
3780 L(console_plot_pixel_exit):
3781 func_return console_plot_pixel
3782 #endif /* CONSOLE */
3786 * This is some old code lying around. I don't believe
3787 * it's used or important anymore. My guess is it contributed
3788 * to getting to this point, but it's done for now.
3789 * It was still in the 2.1.77 head.S, so it's still here.
3790 * (And still not used!)
3793 moveml %a0/%d7,%sp@-
3797 .long 0xf0119f15 | ptestr #5,%a1@,#7,%a0
3806 lea %pc@(L(mmu)),%a0
3807 .long 0xf0106200 | pmove %psr,%a0@
3813 moveml %sp@+,%a0/%d7
3820 #if defined(CONFIG_ATARI) || defined(CONFIG_AMIGA) || \
3821 defined(CONFIG_HP300) || defined(CONFIG_APOLLO)
3827 #if defined(CONSOLE)
3829 .long 0 /* cursor column */
3830 .long 0 /* cursor row */
3831 .long 0 /* max num columns */
3832 .long 0 /* max num rows */
3833 .long 0 /* left edge */
3834 .long 0 /* mac putc */
3836 .long 0 /* pointer to console font (struct font_desc) */
3837 L(console_font_data):
3838 .long 0 /* pointer to console font data */
3839 #endif /* CONSOLE */
3841 #if defined(MMU_PRINT)
3843 .long 0 /* valid flag */
3844 .long 0 /* start logical */
3845 .long 0 /* next logical */
3846 .long 0 /* start physical */
3847 .long 0 /* next physical */
3848 #endif /* MMU_PRINT */
3852 L(mmu_cached_pointer_tables):
3854 L(mmu_num_pointer_tables):
3856 L(phys_kernel_start):
3862 L(kernel_pgdir_ptr):
3867 #if defined (CONFIG_MVME147)
3868 M147_SCC_CTRL_A = 0xfffe3002
3869 M147_SCC_DATA_A = 0xfffe3003
3872 #if defined (CONFIG_MVME16x)
3873 M162_SCC_CTRL_A = 0xfff45005
3874 M167_CYCAR = 0xfff450ee
3875 M167_CYIER = 0xfff45011
3876 M167_CYLICR = 0xfff45026
3877 M167_CYTEOIR = 0xfff45085
3878 M167_CYTDR = 0xfff450f8
3879 M167_PCSCCTICR = 0xfff4201e
3880 M167_PCTPIACKR = 0xfff42025
3883 #if defined (CONFIG_BVME6000)
3884 BVME_SCC_CTRL_A = 0xffb0000b
3885 BVME_SCC_DATA_A = 0xffb0000f
3888 #if defined(CONFIG_MAC)
3899 #ifdef MAC_SERIAL_DEBUG
3902 #endif /* MAC_SERIAL_DEBUG */
3905 #if defined (CONFIG_APOLLO)
3911 #if defined(CONFIG_HP300)
3928 m68k_pgtable_cachemode:
3930 m68k_supervisor_cachemode:
3932 #if defined(CONFIG_MVME16x)
3934 .long 0,0,0,0,0,0,0,0
3936 #if defined(CONFIG_Q40)