3 ** head.S -- This file contains the initial boot code for the
6 ** Copyright 1993 by Hamish Macdonald
8 ** 68040 fixes by Michael Rausch
9 ** 68060 fixes by Roman Hodek
10 ** MMU cleanup by Randy Thelen
11 ** Final MMU cleanup by Roman Zippel
13 ** Atari support by Andreas Schwab, using ideas of Robert de Vries
15 ** VME Support by Richard Hirst
17 ** 94/11/14 Andreas Schwab: put kernel at PAGESIZE
18 ** 94/11/18 Andreas Schwab: remove identity mapping of STRAM for Atari
19 ** ++ Bjoern & Roman: ATARI-68040 support for the Medusa
20 ** 95/11/18 Richard Hirst: Added MVME166 support
21 ** 96/04/26 Guenther Kelleter: fixed identity mapping for Falcon with
22 ** Magnum- and FX-alternate ram
23 ** 98/04/25 Phil Blundell: added HP300 support
24 ** 1998/08/30 David Kilzer: Added support for font_desc structures
26 ** 1999/02/11 Richard Zidlicky: added Q40 support (initial version 99/01/01)
27 ** 2004/05/13 Kars de Jong: Finalised HP300 support
29 ** This file is subject to the terms and conditions of the GNU General Public
30 ** License. See the file README.legal in the main directory of this archive
38 * At this point, the boot loader has:
41 * Put us in supervisor state.
43 * The kernel setup code takes the following steps:
44 * . Raise interrupt level
45 * . Set up initial kernel memory mapping.
46 * . This sets up a mapping of the 4M of memory the kernel is located in.
47 * . It also does a mapping of any initial machine specific areas.
49 * . Enable cache memories
50 * . Jump to kernel startup
52 * Much of the file restructuring was to accomplish:
53 * 1) Remove register dependency through-out the file.
54 * 2) Increase use of subroutines to perform functions
55 * 3) Increase readability of the code
57 * Of course, readability is a subjective issue, so it will never be
58 * argued that that goal was accomplished. It was merely a goal.
59 * A key way to help make code more readable is to give good
60 * documentation. So, the first thing you will find is exaustive
61 * write-ups on the structure of the file, and the features of the
62 * functional subroutines.
66 * Without a doubt the single largest chunk of head.S is spent
67 * mapping the kernel and I/O physical space into the logical range
69 * There are new subroutines and data structures to make MMU
70 * support cleaner and easier to understand.
71 * First, you will find a routine call "mmu_map" which maps
72 * a logical to a physical region for some length given a cache
73 * type on behalf of the caller. This routine makes writing the
74 * actual per-machine specific code very simple.
75 * A central part of the code, but not a subroutine in itself,
76 * is the mmu_init code which is broken down into mapping the kernel
77 * (the same for all machines) and mapping machine-specific I/O
79 * Also, there will be a description of engaging the MMU and
81 * You will notice that there is a chunk of code which
82 * can emit the entire MMU mapping of the machine. This is present
83 * only in debug modes and can be very helpful.
84 * Further, there is a new console driver in head.S that is
85 * also only engaged in debug mode. Currently, it's only supported
86 * on the Macintosh class of machines. However, it is hoped that
87 * others will plug-in support for specific machines.
89 * ######################################################################
93 * mmu_map was written for two key reasons. First, it was clear
94 * that it was very difficult to read the previous code for mapping
95 * regions of memory. Second, the Macintosh required such extensive
96 * memory allocations that it didn't make sense to propagate the
97 * existing code any further.
98 * mmu_map requires some parameters:
100 * mmu_map (logical, physical, length, cache_type)
102 * While this essentially describes the function in the abstract, you'll
103 * find more indepth description of other parameters at the implementation site.
105 * mmu_get_root_table_entry
106 * ------------------------
107 * mmu_get_ptr_table_entry
108 * -----------------------
109 * mmu_get_page_table_entry
110 * ------------------------
112 * These routines are used by other mmu routines to get a pointer into
113 * a table, if necessary a new table is allocated. These routines are working
114 * basically like pmd_alloc() and pte_alloc() in <asm/pgtable.h>. The root
115 * table needs of course only to be allocated once in mmu_get_root_table_entry,
116 * so that here also some mmu specific initialization is done. The second page
117 * at the start of the kernel (the first page is unmapped later) is used for
118 * the kernel_pg_dir. It must be at a position known at link time (as it's used
119 * to initialize the init task struct) and since it needs special cache
120 * settings, it's the easiest to use this page, the rest of the page is used
121 * for further pointer tables.
122 * mmu_get_page_table_entry allocates always a whole page for page tables, this
123 * means 1024 pages and so 4MB of memory can be mapped. It doesn't make sense
124 * to manage page tables in smaller pieces as nearly all mappings have that
127 * ######################################################################
130 * ######################################################################
134 * Thanks to a small helping routine enabling the mmu got quite simple
135 * and there is only one way left. mmu_engage makes a complete a new mapping
136 * that only includes the absolute necessary to be able to jump to the final
137 * position and to restore the original mapping.
138 * As this code doesn't need a transparent translation register anymore this
139 * means all registers are free to be used by machines that needs them for
142 * ######################################################################
146 * This algorithm will print out the page tables of the system as
147 * appropriate for an 030 or an 040. This is useful for debugging purposes
148 * and as such is enclosed in #ifdef MMU_PRINT/#endif clauses.
150 * ######################################################################
154 * The console is also able to be turned off. The console in head.S
155 * is specifically for debugging and can be very useful. It is surrounded by
156 * #ifdef CONSOLE/#endif clauses so it doesn't have to ship in known-good
157 * kernels. It's basic algorithm is to determine the size of the screen
158 * (in height/width and bit depth) and then use that information for
159 * displaying an 8x8 font or an 8x16 (widthxheight). I prefer the 8x8 for
160 * debugging so I can see more good data. But it was trivial to add support
161 * for both fonts, so I included it.
162 * Also, the algorithm for plotting pixels is abstracted so that in
163 * theory other platforms could add support for different kinds of frame
164 * buffers. This could be very useful.
166 * console_put_penguin
167 * -------------------
168 * An important part of any Linux bring up is the penguin and there's
169 * nothing like getting the Penguin on the screen! This algorithm will work
170 * on any machine for which there is a console_plot_pixel.
174 * My hope is that the scroll algorithm does the right thing on the
175 * various platforms, but it wouldn't be hard to add the test conditions
176 * and new code if it doesn't.
181 * ######################################################################
183 * Register usage has greatly simplified within head.S. Every subroutine
184 * saves and restores all registers that it modifies (except it returns a
185 * value in there of course). So the only register that needs to be initialized
186 * is the stack pointer.
187 * All other init code and data is now placed in the init section, so it will
188 * be automatically freed at the end of the kernel initialization.
190 * ######################################################################
194 * There are many options available in a build of this file. I've
195 * taken the time to describe them here to save you the time of searching
196 * for them and trying to understand what they mean.
198 * CONFIG_xxx: These are the obvious machine configuration defines created
199 * during configuration. These are defined in autoconf.h.
201 * CONSOLE: There is support for head.S console in this file. This
202 * console can talk to a Mac frame buffer, but could easily be extrapolated
203 * to extend it to support other platforms.
205 * TEST_MMU: This is a test harness for running on any given machine but
206 * getting an MMU dump for another class of machine. The classes of machines
207 * that can be tested are any of the makes (Atari, Amiga, Mac, VME, etc.)
208 * and any of the models (030, 040, 060, etc.).
210 * NOTE: TEST_MMU is NOT permanent! It is scheduled to be removed
211 * When head.S boots on Atari, Amiga, Macintosh, and VME
212 * machines. At that point the underlying logic will be
213 * believed to be solid enough to be trusted, and TEST_MMU
214 * can be dropped. Do note that that will clean up the
215 * head.S code significantly as large blocks of #if/#else
216 * clauses can be removed.
218 * MMU_NOCACHE_KERNEL: On the Macintosh platform there was an inquiry into
219 * determing why devices don't appear to work. A test case was to remove
220 * the cacheability of the kernel bits.
222 * MMU_PRINT: There is a routine built into head.S that can display the
223 * MMU data structures. It outputs its result through the serial_putc
224 * interface. So where ever that winds up driving data, that's where the
225 * mmu struct will appear. On the Macintosh that's typically the console.
227 * SERIAL_DEBUG: There are a series of putc() macro statements
228 * scattered through out the code to give progress of status to the
229 * person sitting at the console. This constant determines whether those
232 * DEBUG: This is the standard DEBUG flag that can be set for building
233 * the kernel. It has the effect adding additional tests into
239 * In theory these could be determined at run time or handed
240 * over by the booter. But, let's be real, it's a fine hard
241 * coded value. (But, you will notice the code is run-time
242 * flexible!) A pointer to the font's struct font_desc
243 * is kept locally in Lconsole_font. It is used to determine
244 * font size information dynamically.
247 * USE_PRINTER: Use the printer port for serial debug.
248 * USE_SCC_B: Use the SCC port A (Serial2) for serial debug.
249 * USE_SCC_A: Use the SCC port B (Modem2) for serial debug.
250 * USE_MFP: Use the ST-MFP port (Modem1) for serial debug.
252 * Macintosh constants:
253 * MAC_USE_SCC_A: Use SCC port A (modem) for serial debug and early console.
254 * MAC_USE_SCC_B: Use SCC port B (printer) for serial debug and early console.
257 #include <linux/linkage.h>
258 #include <linux/init.h>
259 #include <asm/bootinfo.h>
260 #include <asm/bootinfo-amiga.h>
261 #include <asm/bootinfo-atari.h>
262 #include <asm/bootinfo-hp300.h>
263 #include <asm/bootinfo-mac.h>
264 #include <asm/bootinfo-q40.h>
265 #include <asm/bootinfo-vme.h>
266 #include <asm/setup.h>
267 #include <asm/entry.h>
268 #include <asm/pgtable.h>
269 #include <asm/page.h>
270 #include <asm/asm-offsets.h>
274 #include <asm/machw.h>
276 #ifdef CONFIG_FRAMEBUFFER_CONSOLE
280 #ifdef CONFIG_EARLY_PRINTK
286 #else /* !CONFIG_MAC */
290 #endif /* !CONFIG_MAC */
293 #undef MMU_NOCACHE_KERNEL
297 * For the head.S console, there are three supported fonts, 6x11, 8x16 and 8x8.
298 * The 8x8 font is harder to read but fits more on the screen.
300 #define FONT_8x8 /* default */
301 /* #define FONT_8x16 */ /* 2nd choice */
302 /* #define FONT_6x11 */ /* 3rd choice */
306 .globl m68k_pgtable_cachemode
307 .globl m68k_supervisor_cachemode
308 #ifdef CONFIG_MVME16x
315 CPUTYPE_040 = 1 /* indicates an 040 */
316 CPUTYPE_060 = 2 /* indicates an 060 */
317 CPUTYPE_0460 = 3 /* if either above are set, this is set */
318 CPUTYPE_020 = 4 /* indicates an 020 */
320 /* Translation control register */
325 /* Transparent translation registers */
326 TTR_ENABLE = 0x8000 /* enable transparent translation */
327 TTR_ANYMODE = 0x4000 /* user and kernel mode access */
328 TTR_KERNELMODE = 0x2000 /* only kernel mode access */
329 TTR_USERMODE = 0x0000 /* only user mode access */
330 TTR_CI = 0x0400 /* inhibit cache */
331 TTR_RW = 0x0200 /* read/write mode */
332 TTR_RWM = 0x0100 /* read/write mask */
333 TTR_FCB2 = 0x0040 /* function code base bit 2 */
334 TTR_FCB1 = 0x0020 /* function code base bit 1 */
335 TTR_FCB0 = 0x0010 /* function code base bit 0 */
336 TTR_FCM2 = 0x0004 /* function code mask bit 2 */
337 TTR_FCM1 = 0x0002 /* function code mask bit 1 */
338 TTR_FCM0 = 0x0001 /* function code mask bit 0 */
340 /* Cache Control registers */
341 CC6_ENABLE_D = 0x80000000 /* enable data cache (680[46]0) */
342 CC6_FREEZE_D = 0x40000000 /* freeze data cache (68060) */
343 CC6_ENABLE_SB = 0x20000000 /* enable store buffer (68060) */
344 CC6_PUSH_DPI = 0x10000000 /* disable CPUSH invalidation (68060) */
345 CC6_HALF_D = 0x08000000 /* half-cache mode for data cache (68060) */
346 CC6_ENABLE_B = 0x00800000 /* enable branch cache (68060) */
347 CC6_CLRA_B = 0x00400000 /* clear all entries in branch cache (68060) */
348 CC6_CLRU_B = 0x00200000 /* clear user entries in branch cache (68060) */
349 CC6_ENABLE_I = 0x00008000 /* enable instruction cache (680[46]0) */
350 CC6_FREEZE_I = 0x00004000 /* freeze instruction cache (68060) */
351 CC6_HALF_I = 0x00002000 /* half-cache mode for instruction cache (68060) */
352 CC3_ALLOC_WRITE = 0x00002000 /* write allocate mode(68030) */
353 CC3_ENABLE_DB = 0x00001000 /* enable data burst (68030) */
354 CC3_CLR_D = 0x00000800 /* clear data cache (68030) */
355 CC3_CLRE_D = 0x00000400 /* clear entry in data cache (68030) */
356 CC3_FREEZE_D = 0x00000200 /* freeze data cache (68030) */
357 CC3_ENABLE_D = 0x00000100 /* enable data cache (68030) */
358 CC3_ENABLE_IB = 0x00000010 /* enable instruction burst (68030) */
359 CC3_CLR_I = 0x00000008 /* clear instruction cache (68030) */
360 CC3_CLRE_I = 0x00000004 /* clear entry in instruction cache (68030) */
361 CC3_FREEZE_I = 0x00000002 /* freeze instruction cache (68030) */
362 CC3_ENABLE_I = 0x00000001 /* enable instruction cache (68030) */
364 /* Miscellaneous definitions */
368 ROOT_TABLE_SIZE = 128
371 ROOT_INDEX_SHIFT = 25
373 PAGE_INDEX_SHIFT = 12
376 /* When debugging use readable names for labels */
378 #define L(name) .head.S.##name
380 #define L(name) .head.S./**/name
384 #define L(name) .L##name
386 #define L(name) .L/**/name
390 /* The __INITDATA stuff is a no-op when ftrace or kgdb are turned on */
392 #define __INITDATA .data
393 #define __FINIT .previous
396 /* Several macros to make the writing of subroutines easier:
397 * - func_start marks the beginning of the routine which setups the frame
398 * register and saves the registers, it also defines another macro
399 * to automatically restore the registers again.
400 * - func_return marks the end of the routine and simply calls the prepared
401 * macro to restore registers and jump back to the caller.
402 * - func_define generates another macro to automatically put arguments
403 * onto the stack call the subroutine and cleanup the stack again.
406 /* Within subroutines these macros can be used to access the arguments
407 * on the stack. With STACK some allocated memory on the stack can be
408 * accessed and ARG0 points to the return address (used by mmu_engage).
410 #define STACK %a6@(stackstart)
413 #define ARG2 %a6@(12)
414 #define ARG3 %a6@(16)
415 #define ARG4 %a6@(20)
417 .macro func_start name,saveregs,stack=0
420 moveml \saveregs,%sp@-
421 .set stackstart,-\stack
423 .macro func_return_\name
424 moveml %sp@+,\saveregs
430 .macro func_return name
434 .macro func_call name
438 .macro move_stack nr,arg1,arg2,arg3,arg4
440 move_stack "(\nr-1)",\arg2,\arg3,\arg4
445 .macro func_define name,nr=0
446 .macro \name arg1,arg2,arg3,arg4
447 move_stack \nr,\arg1,\arg2,\arg3,\arg4
455 func_define mmu_map,4
456 func_define mmu_map_tt,4
457 func_define mmu_fixup_page_mmu_cache,1
458 func_define mmu_temp_map,2
459 func_define mmu_engage
460 func_define mmu_get_root_table_entry,1
461 func_define mmu_get_ptr_table_entry,2
462 func_define mmu_get_page_table_entry,2
463 func_define mmu_print
464 func_define get_new_page
465 #if defined(CONFIG_HP300) || defined(CONFIG_APOLLO)
469 .macro mmu_map_eq arg1,arg2,arg3
470 mmu_map \arg1,\arg1,\arg2,\arg3
473 .macro get_bi_record record
475 func_call get_bi_record
479 func_define serial_putc,1
480 func_define console_putc,1
482 func_define console_init
483 func_define console_put_stats
484 func_define console_put_penguin
485 func_define console_plot_pixel,3
486 func_define console_scroll
489 #if defined(CONSOLE) || defined(SERIAL_DEBUG)
493 func_call console_putc
496 func_call serial_putc
498 #if defined(CONSOLE) || defined(SERIAL_DEBUG)
518 #if defined(CONSOLE) || defined(SERIAL_DEBUG)
535 #define is_not_amiga(lab) cmpl &MACH_AMIGA,%pc@(m68k_machtype); jne lab
536 #define is_not_atari(lab) cmpl &MACH_ATARI,%pc@(m68k_machtype); jne lab
537 #define is_not_mac(lab) cmpl &MACH_MAC,%pc@(m68k_machtype); jne lab
538 #define is_not_mvme147(lab) cmpl &MACH_MVME147,%pc@(m68k_machtype); jne lab
539 #define is_not_mvme16x(lab) cmpl &MACH_MVME16x,%pc@(m68k_machtype); jne lab
540 #define is_not_bvme6000(lab) cmpl &MACH_BVME6000,%pc@(m68k_machtype); jne lab
541 #define is_mvme147(lab) cmpl &MACH_MVME147,%pc@(m68k_machtype); jeq lab
542 #define is_mvme16x(lab) cmpl &MACH_MVME16x,%pc@(m68k_machtype); jeq lab
543 #define is_bvme6000(lab) cmpl &MACH_BVME6000,%pc@(m68k_machtype); jeq lab
544 #define is_not_hp300(lab) cmpl &MACH_HP300,%pc@(m68k_machtype); jne lab
545 #define is_not_apollo(lab) cmpl &MACH_APOLLO,%pc@(m68k_machtype); jne lab
546 #define is_not_q40(lab) cmpl &MACH_Q40,%pc@(m68k_machtype); jne lab
547 #define is_not_sun3x(lab) cmpl &MACH_SUN3X,%pc@(m68k_machtype); jne lab
549 #define hasnt_leds(lab) cmpl &MACH_HP300,%pc@(m68k_machtype); \
551 cmpl &MACH_APOLLO,%pc@(m68k_machtype); \
555 #define is_040_or_060(lab) btst &CPUTYPE_0460,%pc@(L(cputype)+3); jne lab
556 #define is_not_040_or_060(lab) btst &CPUTYPE_0460,%pc@(L(cputype)+3); jeq lab
557 #define is_040(lab) btst &CPUTYPE_040,%pc@(L(cputype)+3); jne lab
558 #define is_060(lab) btst &CPUTYPE_060,%pc@(L(cputype)+3); jne lab
559 #define is_not_060(lab) btst &CPUTYPE_060,%pc@(L(cputype)+3); jeq lab
560 #define is_020(lab) btst &CPUTYPE_020,%pc@(L(cputype)+3); jne lab
561 #define is_not_020(lab) btst &CPUTYPE_020,%pc@(L(cputype)+3); jeq lab
563 /* On the HP300 we use the on-board LEDs for debug output before
564 the console is running. Writing a 1 bit turns the corresponding LED
565 _off_ - on the 340 bit 7 is towards the back panel of the machine. */
567 #if defined(CONFIG_HP300) || defined(CONFIG_APOLLO)
579 * Version numbers of the bootinfo interface
580 * The area from _stext to _start will later be used as kernel pointer table
582 bras 1f /* Jump over bootinfo version numbers */
584 .long BOOTINFOV_MAGIC
585 .long MACH_AMIGA, AMIGA_BOOTI_VERSION
586 .long MACH_ATARI, ATARI_BOOTI_VERSION
587 .long MACH_MVME147, MVME147_BOOTI_VERSION
588 .long MACH_MVME16x, MVME16x_BOOTI_VERSION
589 .long MACH_BVME6000, BVME6000_BOOTI_VERSION
590 .long MACH_MAC, MAC_BOOTI_VERSION
591 .long MACH_Q40, Q40_BOOTI_VERSION
592 .long MACH_HP300, HP300_BOOTI_VERSION
596 .equ kernel_pg_dir,_stext
598 .equ .,_stext+PAGESIZE
605 * Setup initial stack pointer
610 * Record the CPU and machine type.
612 get_bi_record BI_MACHTYPE
613 lea %pc@(m68k_machtype),%a1
616 get_bi_record BI_FPUTYPE
617 lea %pc@(m68k_fputype),%a1
620 get_bi_record BI_MMUTYPE
621 lea %pc@(m68k_mmutype),%a1
624 get_bi_record BI_CPUTYPE
625 lea %pc@(m68k_cputype),%a1
632 * For Macintosh, we need to determine the display parameters early (at least
633 * while debugging it).
636 is_not_mac(L(test_notmac))
638 get_bi_record BI_MAC_VADDR
639 lea %pc@(L(mac_videobase)),%a1
642 get_bi_record BI_MAC_VDEPTH
643 lea %pc@(L(mac_videodepth)),%a1
646 get_bi_record BI_MAC_VDIM
647 lea %pc@(L(mac_dimensions)),%a1
650 get_bi_record BI_MAC_VROW
651 lea %pc@(L(mac_rowbytes)),%a1
655 get_bi_record BI_MAC_SCCBASE
656 lea %pc@(L(mac_sccbase)),%a1
661 #endif /* CONFIG_MAC */
665 * There are ultimately two pieces of information we want for all kinds of
666 * processors CpuType and CacheBits. The CPUTYPE was passed in from booter
667 * and is converted here from a booter type definition to a separate bit
668 * number which allows for the standard is_0x0 macro tests.
670 movel %pc@(m68k_cputype),%d0
677 * Test the BootInfo cputype for 060
681 bset #CPUTYPE_060,%d1
682 bset #CPUTYPE_0460,%d1
686 * Test the BootInfo cputype for 040
690 bset #CPUTYPE_040,%d1
691 bset #CPUTYPE_0460,%d1
695 * Test the BootInfo cputype for 020
699 bset #CPUTYPE_020,%d1
703 * Record the cpu type
705 lea %pc@(L(cputype)),%a0
711 * Now the macros are valid:
720 * Determine the cache mode for pages holding MMU tables
721 * and for supervisor mode, unused for '020 and '030
726 is_not_040_or_060(L(save_cachetype))
730 * d1 := cacheable write-through
731 * NOTE: The 68040 manual strongly recommends non-cached for MMU tables,
732 * but we have been using write-through since at least 2.0.29 so I
735 #ifdef CONFIG_060_WRITETHROUGH
737 * If this is a 68060 board using drivers with cache coherency
738 * problems, then supervisor memory accesses need to be write-through
739 * also; otherwise, we want copyback.
743 movel #_PAGE_CACHE040W,%d0
744 jra L(save_cachetype)
745 #endif /* CONFIG_060_WRITETHROUGH */
747 movew #_PAGE_CACHE040,%d0
749 movel #_PAGE_CACHE040W,%d1
752 /* Save cache mode for supervisor mode and page tables
754 lea %pc@(m68k_supervisor_cachemode),%a0
756 lea %pc@(m68k_pgtable_cachemode),%a0
760 * raise interrupt level
765 If running on an Atari, determine the I/O base of the
766 serial port and test if we are running on a Medusa or Hades.
767 This test is necessary here, because on the Hades the serial
768 port is only accessible in the high I/O memory area.
770 The test whether it is a Medusa is done by writing to the byte at
771 phys. 0x0. This should result in a bus error on all other machines.
773 ...should, but doesn't. The Afterburner040 for the Falcon has the
774 same behaviour (0x0..0x7 are no ROM shadow). So we have to do
775 another test to distinguish Medusa and AB040. This is a
776 read attempt for 0x00ff82fe phys. that should bus error on a Falcon
777 (+AB040), but is in the range where the Medusa always asserts DTACK.
779 The test for the Hades is done by reading address 0xb0000000. This
780 should give a bus error on the Medusa.
784 is_not_atari(L(notypetest))
786 /* get special machine type (Medusa/Hades/AB40) */
787 moveq #0,%d3 /* default if tag doesn't exist */
788 get_bi_record BI_ATARI_MCH_TYPE
792 lea %pc@(atari_mch_type),%a0
795 /* On the Hades, the iobase must be set up before opening the
796 * serial port. There are no I/O regs at 0x00ffxxxx at all. */
798 cmpl #ATARI_MACH_HADES,%d3
800 movel #0xff000000,%d0 /* Hades I/O base addr: 0xff000000 */
801 1: lea %pc@(L(iobase)),%a0
808 is_mvme147(L(getvmetype))
809 is_bvme6000(L(getvmetype))
810 is_not_mvme16x(L(gvtdone))
812 /* See if the loader has specified the BI_VME_TYPE tag. Recent
813 * versions of VMELILO and TFTPLILO do this. We have to do this
814 * early so we know how to handle console output. If the tag
815 * doesn't exist then we use the Bug for output on MVME16x.
818 get_bi_record BI_VME_TYPE
822 lea %pc@(vme_brdtype),%a0
825 #ifdef CONFIG_MVME16x
826 is_not_mvme16x(L(gvtdone))
828 /* Need to get the BRD_ID info to differentiate between 162, 167,
829 * etc. This is available as a BI_VME_BRDINFO tag with later
830 * versions of VMELILO and TFTPLILO, otherwise we call the Bug.
832 get_bi_record BI_VME_BRDINFO
836 /* Get pointer to board ID data from Bug */
839 .word 0x70 /* trap 0x70 - .BRD_ID */
842 lea %pc@(mvme_bdid),%a1
843 /* Structure is 32 bytes long */
859 is_not_hp300(L(nothp))
861 /* Get the address of the UART for serial debugging */
862 get_bi_record BI_HP300_UART_ADDR
866 lea %pc@(L(uartbase)),%a0
868 get_bi_record BI_HP300_UART_SCODE
872 lea %pc@(L(uart_scode)),%a0
879 * Initialize serial port
892 # endif /* CONFIG_LOGO */
894 # endif /* CONSOLE */
896 #endif /* CONFIG_MAC */
902 dputn %pc@(L(cputype))
903 dputn %pc@(m68k_supervisor_cachemode)
904 dputn %pc@(m68k_pgtable_cachemode)
908 * Save physical start address of kernel
910 lea %pc@(L(phys_kernel_start)),%a0
913 addl #PAGE_OFFSET,%a1
923 * This block of code does what's necessary to map in the various kinds
924 * of machines for execution of Linux.
925 * First map the first 4 MB of kernel code & data
928 mmu_map #PAGE_OFFSET,%pc@(L(phys_kernel_start)),#4*1024*1024,\
929 %pc@(m68k_supervisor_cachemode)
937 is_not_amiga(L(mmu_init_not_amiga))
944 is_not_040_or_060(1f)
947 * 040: Map the 16Meg range physical 0x0 up to logical 0x8000.0000
949 mmu_map #0x80000000,#0,#0x01000000,#_PAGE_NOCACHE_S
951 * Map the Zorro III I/O space with transparent translation
952 * for frame buffer memory etc.
954 mmu_map_tt #1,#0x40000000,#0x20000000,#_PAGE_NOCACHE_S
956 jbra L(mmu_init_done)
960 * 030: Map the 32Meg range physical 0x0 up to logical 0x8000.0000
962 mmu_map #0x80000000,#0,#0x02000000,#_PAGE_NOCACHE030
963 mmu_map_tt #1,#0x40000000,#0x20000000,#_PAGE_NOCACHE030
965 jbra L(mmu_init_done)
967 L(mmu_init_not_amiga):
974 is_not_atari(L(mmu_init_not_atari))
978 /* On the Atari, we map the I/O region (phys. 0x00ffxxxx) by mapping
979 the last 16 MB of virtual address space to the first 16 MB (i.e.
980 0xffxxxxxx -> 0x00xxxxxx). For this, an additional pointer table is
981 needed. I/O ranges are marked non-cachable.
983 For the Medusa it is better to map the I/O region transparently
984 (i.e. 0xffxxxxxx -> 0xffxxxxxx), because some I/O registers are
985 accessible only in the high area.
987 On the Hades all I/O registers are only accessible in the high
991 /* I/O base addr for non-Medusa, non-Hades: 0x00000000 */
993 movel %pc@(atari_mch_type),%d3
994 cmpl #ATARI_MACH_MEDUSA,%d3
996 cmpl #ATARI_MACH_HADES,%d3
998 2: movel #0xff000000,%d0 /* Medusa/Hades base addr: 0xff000000 */
1001 is_040_or_060(L(spata68040))
1003 /* Map everything non-cacheable, though not all parts really
1004 * need to disable caches (crucial only for 0xff8000..0xffffff
1005 * (standard I/O) and 0xf00000..0xf3ffff (IDE)). The remainder
1006 * isn't really used, except for sometimes peeking into the
1007 * ROMs (mirror at phys. 0x0), so caching isn't necessary for
1009 mmu_map #0xff000000,%d3,#0x01000000,#_PAGE_NOCACHE030
1011 jbra L(mmu_init_done)
1015 mmu_map #0xff000000,%d3,#0x01000000,#_PAGE_NOCACHE_S
1017 jbra L(mmu_init_done)
1019 L(mmu_init_not_atari):
1023 is_not_q40(L(notq40))
1025 * add transparent mapping for 0xff00 0000 - 0xffff ffff
1026 * non-cached serialized etc..
1027 * this includes master chip, DAC, RTC and ISA ports
1028 * 0xfe000000-0xfeffffff is for screen and ROM
1033 mmu_map_tt #0,#0xfe000000,#0x01000000,#_PAGE_CACHE040W
1034 mmu_map_tt #1,#0xff000000,#0x01000000,#_PAGE_NOCACHE_S
1036 jbra L(mmu_init_done)
1042 is_not_hp300(L(nothp300))
1044 /* On the HP300, we map the ROM, INTIO and DIO regions (phys. 0x00xxxxxx)
1045 * by mapping 32MB (on 020/030) or 16 MB (on 040) from 0xf0xxxxxx -> 0x00xxxxxx).
1046 * The ROM mapping is needed because the LEDs are mapped there too.
1052 * 030: Map the 32Meg range physical 0x0 up to logical 0xf000.0000
1054 mmu_map #0xf0000000,#0,#0x02000000,#_PAGE_NOCACHE030
1056 jbra L(mmu_init_done)
1060 * 040: Map the 16Meg range physical 0x0 up to logical 0xf000.0000
1062 mmu_map #0xf0000000,#0,#0x01000000,#_PAGE_NOCACHE_S
1064 jbra L(mmu_init_done)
1067 #endif /* CONFIG_HP300 */
1069 #ifdef CONFIG_MVME147
1071 is_not_mvme147(L(not147))
1074 * On MVME147 we have already created kernel page tables for
1075 * 4MB of RAM at address 0, so now need to do a transparent
1076 * mapping of the top of memory space. Make it 0.5GByte for now,
1077 * so we can access on-board i/o areas.
1080 mmu_map_tt #1,#0xe0000000,#0x20000000,#_PAGE_NOCACHE030
1082 jbra L(mmu_init_done)
1085 #endif /* CONFIG_MVME147 */
1087 #ifdef CONFIG_MVME16x
1089 is_not_mvme16x(L(not16x))
1092 * On MVME16x we have already created kernel page tables for
1093 * 4MB of RAM at address 0, so now need to do a transparent
1094 * mapping of the top of memory space. Make it 0.5GByte for now.
1095 * Supervisor only access, so transparent mapping doesn't
1096 * clash with User code virtual address space.
1097 * this covers IO devices, PROM and SRAM. The PROM and SRAM
1098 * mapping is needed to allow 167Bug to run.
1099 * IO is in the range 0xfff00000 to 0xfffeffff.
1100 * PROM is 0xff800000->0xffbfffff and SRAM is
1101 * 0xffe00000->0xffe1ffff.
1104 mmu_map_tt #1,#0xe0000000,#0x20000000,#_PAGE_NOCACHE_S
1106 jbra L(mmu_init_done)
1109 #endif /* CONFIG_MVME162 | CONFIG_MVME167 */
1111 #ifdef CONFIG_BVME6000
1113 is_not_bvme6000(L(not6000))
1116 * On BVME6000 we have already created kernel page tables for
1117 * 4MB of RAM at address 0, so now need to do a transparent
1118 * mapping of the top of memory space. Make it 0.5GByte for now,
1119 * so we can access on-board i/o areas.
1120 * Supervisor only access, so transparent mapping doesn't
1121 * clash with User code virtual address space.
1124 mmu_map_tt #1,#0xe0000000,#0x20000000,#_PAGE_NOCACHE_S
1126 jbra L(mmu_init_done)
1129 #endif /* CONFIG_BVME6000 */
1134 * The Macintosh mappings are less clear.
1136 * Even as of this writing, it is unclear how the
1137 * Macintosh mappings will be done. However, as
1138 * the first author of this code I'm proposing the
1141 * Map the kernel (that's already done),
1142 * Map the I/O (on most machines that's the
1143 * 0x5000.0000 ... 0x5300.0000 range,
1144 * Map the video frame buffer using as few pages
1145 * as absolutely (this requirement mostly stems from
1146 * the fact that when the frame buffer is at
1147 * 0x0000.0000 then we know there is valid RAM just
1148 * above the screen that we don't want to waste!).
1150 * By the way, if the frame buffer is at 0x0000.0000
1151 * then the Macintosh is known as an RBV based Mac.
1153 * By the way 2, the code currently maps in a bunch of
1154 * regions. But I'd like to cut that out. (And move most
1155 * of the mappings up into the kernel proper ... or only
1156 * map what's necessary.)
1163 is_not_mac(L(mmu_init_not_mac))
1167 is_not_040_or_060(1f)
1169 moveq #_PAGE_NOCACHE_S,%d3
1172 moveq #_PAGE_NOCACHE030,%d3
1175 * Mac Note: screen address of logical 0xF000.0000 -> <screen physical>
1176 * we simply map the 4MB that contains the videomem
1179 movel #VIDEOMEMMASK,%d0
1180 andl %pc@(L(mac_videobase)),%d0
1182 mmu_map #VIDEOMEMBASE,%d0,#VIDEOMEMSIZE,%d3
1183 /* ROM from 4000 0000 to 4200 0000 (only for mac_reset()) */
1184 mmu_map_eq #0x40000000,#0x02000000,%d3
1185 /* IO devices (incl. serial port) from 5000 0000 to 5300 0000 */
1186 mmu_map_eq #0x50000000,#0x03000000,%d3
1187 /* Nubus slot space (video at 0xF0000000, rom at 0xF0F80000) */
1188 mmu_map_tt #1,#0xf8000000,#0x08000000,%d3
1190 jbra L(mmu_init_done)
1192 L(mmu_init_not_mac):
1196 is_not_sun3x(L(notsun3x))
1198 /* oh, the pain.. We're gonna want the prom code after
1199 * starting the MMU, so we copy the mappings, translating
1200 * from 8k -> 4k pages as we go.
1203 /* copy maps from 0xfee00000 to 0xff000000 */
1204 movel #0xfee00000, %d0
1205 moveq #ROOT_INDEX_SHIFT, %d1
1207 mmu_get_root_table_entry %d0
1209 movel #0xfee00000, %d0
1210 moveq #PTR_INDEX_SHIFT, %d1
1212 andl #PTR_TABLE_SIZE-1, %d0
1213 mmu_get_ptr_table_entry %a0,%d0
1215 movel #0xfee00000, %d0
1216 moveq #PAGE_INDEX_SHIFT, %d1
1218 andl #PAGE_TABLE_SIZE-1, %d0
1219 mmu_get_page_table_entry %a0,%d0
1221 /* this is where the prom page table lives */
1222 movel 0xfefe00d4, %a1
1225 movel #((0x200000 >> 13)-1), %d1
1235 /* setup tt1 for I/O */
1236 mmu_map_tt #1,#0x40000000,#0x40000000,#_PAGE_NOCACHE_S
1237 jbra L(mmu_init_done)
1242 #ifdef CONFIG_APOLLO
1243 is_not_apollo(L(notapollo))
1246 mmu_map #0x80000000,#0,#0x02000000,#_PAGE_NOCACHE030
1249 jbra L(mmu_init_done)
1260 * On the 040 class machines, all pages that are used for the
1261 * mmu have to be fixed up. According to Motorola, pages holding mmu
1262 * tables should be non-cacheable on a '040 and write-through on a
1263 * '060. But analysis of the reasons for this, and practical
1264 * experience, showed that write-through also works on a '040.
1266 * Allocated memory so far goes from kernel_end to memory_start that
1267 * is used for all kind of tables, for that the cache attributes
1272 is_not_040_or_060(L(mmu_fixup_done))
1274 #ifdef MMU_NOCACHE_KERNEL
1275 jbra L(mmu_fixup_done)
1278 /* first fix the page at the start of the kernel, that
1279 * contains also kernel_pg_dir.
1281 movel %pc@(L(phys_kernel_start)),%d0
1282 subl #PAGE_OFFSET,%d0
1283 lea %pc@(_stext),%a0
1285 mmu_fixup_page_mmu_cache %a0
1287 movel %pc@(L(kernel_end)),%a0
1289 movel %pc@(L(memory_start)),%a1
1293 mmu_fixup_page_mmu_cache %a0
1308 * This chunk of code performs the gruesome task of engaging the MMU.
1309 * The reason its gruesome is because when the MMU becomes engaged it
1310 * maps logical addresses to physical addresses. The Program Counter
1311 * register is then passed through the MMU before the next instruction
1312 * is fetched (the instruction following the engage MMU instruction).
1313 * This may mean one of two things:
1314 * 1. The Program Counter falls within the logical address space of
1315 * the kernel of which there are two sub-possibilities:
1316 * A. The PC maps to the correct instruction (logical PC == physical
1317 * code location), or
1318 * B. The PC does not map through and the processor will read some
1319 * data (or instruction) which is not the logically next instr.
1320 * As you can imagine, A is good and B is bad.
1322 * 2. The Program Counter does not map through the MMU. The processor
1323 * will take a Bus Error.
1324 * Clearly, 2 is bad.
1325 * It doesn't take a wiz kid to figure you want 1.A.
1326 * This code creates that possibility.
1327 * There are two possible 1.A. states (we now ignore the other above states):
1328 * A. The kernel is located at physical memory addressed the same as
1329 * the logical memory for the kernel, i.e., 0x01000.
1330 * B. The kernel is located some where else. e.g., 0x0400.0000
1332 * Under some conditions the Macintosh can look like A or B.
1333 * [A friend and I once noted that Apple hardware engineers should be
1334 * wacked twice each day: once when they show up at work (as in, Whack!,
1335 * "This is for the screwy hardware we know you're going to design today."),
1336 * and also at the end of the day (as in, Whack! "I don't know what
1337 * you designed today, but I'm sure it wasn't good."). -- rst]
1339 * This code works on the following premise:
1340 * If the kernel start (%d5) is within the first 16 Meg of RAM,
1341 * then create a mapping for the kernel at logical 0x8000.0000 to
1342 * the physical location of the pc. And, create a transparent
1343 * translation register for the first 16 Meg. Then, after the MMU
1344 * is engaged, the PC can be moved up into the 0x8000.0000 range
1345 * and then the transparent translation can be turned off and then
1346 * the PC can jump to the correct logical location and it will be
1347 * home (finally). This is essentially the code that the Amiga used
1348 * to use. Now, it's generalized for all processors. Which means
1349 * that a fresh (but temporary) mapping has to be created. The mapping
1350 * is made in page 0 (an as of yet unused location -- except for the
1351 * stack!). This temporary mapping will only require 1 pointer table
1352 * and a single page table (it can map 256K).
1354 * OK, alternatively, imagine that the Program Counter is not within
1355 * the first 16 Meg. Then, just use Transparent Translation registers
1356 * to do the right thing.
1358 * Last, if _start is already at 0x01000, then there's nothing special
1359 * to do (in other words, in a degenerate case of the first case above,
1372 * After this point no new memory is allocated and
1373 * the start of available memory is stored in availmem.
1374 * (The bootmem allocator requires now the physicall address.)
1377 movel L(memory_start),availmem
1381 /* fixup the Amiga custom register location before printing */
1388 /* fixup the Atari iobase register location before printing */
1389 movel #0xff000000,L(iobase)
1395 movel #~VIDEOMEMMASK,%d0
1396 andl L(mac_videobase),%d0
1397 addl #VIDEOMEMBASE,%d0
1398 movel %d0,L(mac_videobase)
1399 #if defined(CONSOLE)
1400 movel %pc@(L(phys_kernel_start)),%d0
1401 subl #PAGE_OFFSET,%d0
1402 subl %d0,L(console_font)
1403 subl %d0,L(console_font_data)
1406 orl #0x50000000,L(mac_sccbase)
1414 * Fix up the iobase register to point to the new location of the LEDs.
1416 movel #0xf0000000,L(iobase)
1419 * Energise the FPU and caches.
1422 movel #0x60,0xf05f400c
1426 * 040: slightly different, apparently.
1428 1: movew #0,0xf05f400e
1429 movew #0x64,0xf05f400e
1437 oriw #0x4000,0x61000000
1441 #ifdef CONFIG_APOLLO
1445 * Fix up the iobase before printing
1447 movel #0x80000000,L(iobase)
1458 is_not_040_or_060(L(cache_not_680460))
1466 is_060(L(cache68060))
1468 movel #CC6_ENABLE_D+CC6_ENABLE_I,%d0
1469 /* MMU stuff works in copyback mode now, so enable the cache */
1474 movel #CC6_ENABLE_D+CC6_ENABLE_I+CC6_ENABLE_SB+CC6_PUSH_DPI+CC6_ENABLE_B+CC6_CLRA_B,%d0
1475 /* MMU stuff works in copyback mode now, so enable the cache */
1477 /* enable superscalar dispatch in PCR */
1483 L(cache_not_680460):
1486 movel #CC3_ENABLE_DB+CC3_CLR_D+CC3_ENABLE_D+CC3_ENABLE_IB+CC3_CLR_I+CC3_ENABLE_I,%d0
1496 * Setup initial stack pointer
1498 lea init_task,%curptr
1499 lea init_thread_union+THREAD_SIZE,%sp
1503 subl %a6,%a6 /* clear a6 for gdb */
1506 * The new 64bit printf support requires an early exception initialization.
1510 /* jump to the kernel start */
1518 * Find a tag record in the bootinfo structure
1519 * The bootinfo structure is located right after the kernel
1520 * Returns: d0: size (-1 if not found)
1521 * a0: data pointer (end-of-records if not found)
1523 func_start get_bi_record,%d1
1527 1: tstw %a0@(BIR_TAG)
1529 cmpw %a0@(BIR_TAG),%d0
1531 addw %a0@(BIR_SIZE),%a0
1534 movew %a0@(BIR_SIZE),%d0
1535 lea %a0@(BIR_DATA),%a0
1538 lea %a0@(BIR_SIZE),%a0
1540 func_return get_bi_record
1544 * MMU Initialization Begins Here
1546 * The structure of the MMU tables on the 68k machines
1549 * Logical addresses are translated through
1550 * a hierarchical translation mechanism where the high-order
1551 * seven bits of the logical address (LA) are used as an
1552 * index into the "root table." Each entry in the root
1553 * table has a bit which specifies if it's a valid pointer to a
1554 * pointer table. Each entry defines a 32KMeg range of memory.
1555 * If an entry is invalid then that logical range of 32M is
1556 * invalid and references to that range of memory (when the MMU
1557 * is enabled) will fault. If the entry is valid, then it does
1558 * one of two things. On 040/060 class machines, it points to
1559 * a pointer table which then describes more finely the memory
1560 * within that 32M range. On 020/030 class machines, a technique
1561 * called "early terminating descriptors" are used. This technique
1562 * allows an entire 32Meg to be described by a single entry in the
1563 * root table. Thus, this entry in the root table, contains the
1564 * physical address of the memory or I/O at the logical address
1565 * which the entry represents and it also contains the necessary
1566 * cache bits for this region.
1569 * Per the Root Table, there will be one or more
1570 * pointer tables. Each pointer table defines a 32M range.
1571 * Not all of the 32M range need be defined. Again, the next
1572 * seven bits of the logical address are used an index into
1573 * the pointer table to point to page tables (if the pointer
1574 * is valid). There will undoubtedly be more than one
1575 * pointer table for the kernel because each pointer table
1576 * defines a range of only 32M. Valid pointer table entries
1577 * point to page tables, or are early terminating entries
1581 * Per the Pointer Tables, each page table entry points
1582 * to the physical page in memory that supports the logical
1583 * address that translates to the particular index.
1585 * In short, the Logical Address gets translated as follows:
1586 * bits 31..26 - index into the Root Table
1587 * bits 25..18 - index into the Pointer Table
1588 * bits 17..12 - index into the Page Table
1589 * bits 11..0 - offset into a particular 4K page
1591 * The algorithms which follows do one thing: they abstract
1592 * the MMU hardware. For example, there are three kinds of
1593 * cache settings that are relevant. Either, memory is
1594 * being mapped in which case it is either Kernel Code (or
1595 * the RamDisk) or it is MMU data. On the 030, the MMU data
1596 * option also describes the kernel. Or, I/O is being mapped
1597 * in which case it has its own kind of cache bits. There
1598 * are constants which abstract these notions from the code that
1599 * actually makes the call to map some range of memory.
1609 * This algorithm will print out the current MMU mappings.
1612 * %a5 points to the root table. Everything else is calculated
1616 #define mmu_next_valid 0
1617 #define mmu_start_logical 4
1618 #define mmu_next_logical 8
1619 #define mmu_start_physical 12
1620 #define mmu_next_physical 16
1622 #define MMU_PRINT_INVALID -1
1623 #define MMU_PRINT_VALID 1
1624 #define MMU_PRINT_UNINITED 0
1626 #define putZc(z,n) jbne 1f; putc z; jbra 2f; 1: putc n; 2:
1628 func_start mmu_print,%a0-%a6/%d0-%d7
1630 movel %pc@(L(kernel_pgdir_ptr)),%a5
1631 lea %pc@(L(mmu_print_data)),%a0
1632 movel #MMU_PRINT_UNINITED,%a0@(mmu_next_valid)
1634 is_not_040_or_060(mmu_030_print)
1643 * The following #if/#endif block is a tight algorithm for dumping the 040
1644 * MMU Map in gory detail. It really isn't that practical unless the
1645 * MMU Map algorithm appears to go awry and you need to debug it at the
1646 * entry per entry level.
1648 movel #ROOT_TABLE_SIZE,%d5
1650 movel %a5@+,%d7 | Burn an entry to skip the kernel mappings,
1651 subql #1,%d5 | they (might) work
1661 andil #0xFFFFFE00,%d7
1663 movel #PTR_TABLE_SIZE,%d4
1673 andil #0xFFFFFF00,%d7
1675 movel #PAGE_TABLE_SIZE,%d3
1689 movel #8+1+8+1+1,%d2
1704 #endif /* MMU 040 Dumping code that's gory and detailed */
1706 lea %pc@(kernel_pg_dir),%a5
1707 movel %a5,%a0 /* a0 has the address of the root table ptr */
1708 movel #0x00000000,%a4 /* logical address */
1711 /* Increment the logical address and preserve in d5 */
1713 addil #PAGESIZE<<13,%d5
1717 jbsr mmu_print_tuple_invalidate
1721 andil #0xfffffe00,%d6
1725 addil #PAGESIZE<<6,%d5
1729 jbsr mmu_print_tuple_invalidate
1733 andil #0xffffff00,%d6
1741 jbsr mmu_print_tuple_invalidate
1744 moveml %d0-%d1,%sp@-
1747 andil #0xfffff4e0,%d1
1748 lea %pc@(mmu_040_print_flags),%a6
1749 jbsr mmu_print_tuple
1750 moveml %sp@+,%d0-%d1
1762 movel %d5,%a4 /* move to the next logical address */
1770 andiw #0x8000,%d1 /* is it valid ? */
1771 jbeq 1f /* No, bail out */
1774 andil #0xff000000,%d1 /* Get the address */
1780 jbsr mmu_040_print_flags_tt
1784 andiw #0x8000,%d1 /* is it valid ? */
1785 jbeq 1f /* No, bail out */
1788 andil #0xff000000,%d1 /* Get the address */
1794 jbsr mmu_040_print_flags_tt
1800 mmu_040_print_flags:
1802 putZc(' ','G') /* global bit */
1804 putZc(' ','S') /* supervisor bit */
1805 mmu_040_print_flags_tt:
1810 putZc('w','c') /* write through or copy-back */
1815 putZc('s',' ') /* serialized non-cacheable, or non-cacheable */
1819 mmu_030_print_flags:
1821 putZc('C','I') /* write through or copy-back */
1830 andil #0xfffffff0,%d0
1832 movel #0x00000000,%a4 /* logical address */
1836 addil #PAGESIZE<<13,%d5
1838 btst #1,%d6 /* is it a table ptr? */
1840 btst #0,%d6 /* is it early terminating? */
1842 jbsr mmu_030_print_helper
1845 jbsr mmu_print_tuple_invalidate
1849 andil #0xfffffff0,%d6
1853 addil #PAGESIZE<<6,%d5
1855 btst #1,%d6 /* is it a table ptr? */
1857 btst #0,%d6 /* is it a page descriptor? */
1859 jbsr mmu_030_print_helper
1862 jbsr mmu_print_tuple_invalidate
1866 andil #0xfffffff0,%d6
1874 jbsr mmu_print_tuple_invalidate
1877 jbsr mmu_030_print_helper
1889 movel %d5,%a4 /* move to the next logical address */
1897 func_return mmu_print
1900 mmu_030_print_helper:
1901 moveml %d0-%d1,%sp@-
1904 lea %pc@(mmu_030_print_flags),%a6
1905 jbsr mmu_print_tuple
1906 moveml %sp@+,%d0-%d1
1909 mmu_print_tuple_invalidate:
1910 moveml %a0/%d7,%sp@-
1912 lea %pc@(L(mmu_print_data)),%a0
1913 tstl %a0@(mmu_next_valid)
1914 jbmi mmu_print_tuple_invalidate_exit
1916 movel #MMU_PRINT_INVALID,%a0@(mmu_next_valid)
1922 mmu_print_tuple_invalidate_exit:
1923 moveml %sp@+,%a0/%d7
1928 moveml %d0-%d7/%a0,%sp@-
1930 lea %pc@(L(mmu_print_data)),%a0
1932 tstl %a0@(mmu_next_valid)
1933 jble mmu_print_tuple_print
1935 cmpl %a0@(mmu_next_physical),%d1
1936 jbeq mmu_print_tuple_increment
1938 mmu_print_tuple_print:
1946 mmu_print_tuple_record:
1947 movel #MMU_PRINT_VALID,%a0@(mmu_next_valid)
1949 movel %d1,%a0@(mmu_next_physical)
1951 mmu_print_tuple_increment:
1954 addl %d7,%a0@(mmu_next_physical)
1956 mmu_print_tuple_exit:
1957 moveml %sp@+,%d0-%d7/%a0
1960 mmu_print_machine_cpu_types:
1982 is_not_040_or_060(2f)
1990 #endif /* MMU_PRINT */
1995 * This is a specific function which works on all 680x0 machines.
1996 * On 030, 040 & 060 it will attempt to use Transparent Translation
1998 * On 020 it will call the standard mmu_map which will use early
1999 * terminating descriptors.
2001 func_start mmu_map_tt,%d0/%d1/%a0,4
2012 /* Extract the highest bit set
2014 bfffo ARG3{#0,#32},%d1
2030 /* Generate the upper 16bit of the tt register
2036 is_040_or_060(L(mmu_map_tt_040))
2038 /* set 030 specific bits (read/write access for supervisor mode
2039 * (highest function code set, lower two bits masked))
2041 orw #TTR_ENABLE+TTR_RWM+TTR_FCB2+TTR_FCM1+TTR_FCM0,%d1
2057 jra L(mmu_map_tt_done)
2059 /* set 040 specific bits
2062 orw #TTR_ENABLE+TTR_KERNELMODE,%d1
2076 jra L(mmu_map_tt_done)
2079 mmu_map_eq ARG2,ARG3,ARG4
2083 func_return mmu_map_tt
2088 * This routine will map a range of memory using a pointer
2089 * table and allocating the pages on the fly from the kernel.
2090 * The pointer table does not have to be already linked into
2091 * the root table, this routine will do that if necessary.
2094 * This routine will assert failure and use the serial_putc
2095 * routines in the case of a run-time error. For example,
2096 * if the address is already mapped.
2099 * This routine will use early terminating descriptors
2100 * where possible for the 68020+68851 and 68030 type
2103 func_start mmu_map,%d0-%d4/%a0-%a4
2112 /* Get logical address and round it down to 256KB
2115 andl #-(PAGESIZE*PAGE_TABLE_SIZE),%d0
2118 /* Get the end address
2124 /* Get physical address and round it down to 256KB
2127 andl #-(PAGESIZE*PAGE_TABLE_SIZE),%d0
2130 /* Add page attributes to the physical address
2133 orw #_PAGE_PRESENT+_PAGE_ACCESSED+_PAGE_DIRTY,%d0
2140 is_not_040_or_060(L(mmu_map_030))
2142 addw #_PAGE_GLOBAL040,%a2
2144 * MMU 040 & 060 Support
2146 * The MMU usage for the 040 and 060 is different enough from
2147 * the 030 and 68851 that there is separate code. This comment
2148 * block describes the data structures and algorithms built by
2151 * The 040 does not support early terminating descriptors, as
2152 * the 030 does. Therefore, a third level of table is needed
2153 * for the 040, and that would be the page table. In Linux,
2154 * page tables are allocated directly from the memory above the
2160 /* Calculate the offset into the root table
2163 moveq #ROOT_INDEX_SHIFT,%d1
2165 mmu_get_root_table_entry %d0
2167 /* Calculate the offset into the pointer table
2170 moveq #PTR_INDEX_SHIFT,%d1
2172 andl #PTR_TABLE_SIZE-1,%d0
2173 mmu_get_ptr_table_entry %a0,%d0
2175 /* Calculate the offset into the page table
2178 moveq #PAGE_INDEX_SHIFT,%d1
2180 andl #PAGE_TABLE_SIZE-1,%d0
2181 mmu_get_page_table_entry %a0,%d0
2183 /* The page table entry must not no be busy
2186 jne L(mmu_map_error)
2188 /* Do the mapping and advance the pointers
2195 /* Ready with mapping?
2203 /* Calculate the offset into the root table
2206 moveq #ROOT_INDEX_SHIFT,%d1
2208 mmu_get_root_table_entry %d0
2210 /* Check if logical address 32MB aligned,
2211 * so we can try to map it once
2214 andl #(PTR_TABLE_SIZE*PAGE_TABLE_SIZE*PAGESIZE-1)&(-ROOT_TABLE_SIZE),%d0
2217 /* Is there enough to map for 32MB at once
2219 lea %a3@(PTR_TABLE_SIZE*PAGE_TABLE_SIZE*PAGESIZE-1),%a1
2225 /* The root table entry must not no be busy
2228 jne L(mmu_map_error)
2230 /* Do the mapping and advance the pointers
2240 lea %a2@(PTR_TABLE_SIZE*PAGE_TABLE_SIZE*PAGESIZE),%a2
2241 jra L(mmu_mapnext_030)
2243 /* Calculate the offset into the pointer table
2246 moveq #PTR_INDEX_SHIFT,%d1
2248 andl #PTR_TABLE_SIZE-1,%d0
2249 mmu_get_ptr_table_entry %a0,%d0
2251 /* The pointer table entry must not no be busy
2254 jne L(mmu_map_error)
2256 /* Do the mapping and advance the pointers
2264 addl #PAGE_TABLE_SIZE*PAGESIZE,%a2
2265 addl #PAGE_TABLE_SIZE*PAGESIZE,%a3
2268 /* Ready with mapping?
2277 dputs "mmu_map error:"
2289 * On the 040 class machines, all pages that are used for the
2290 * mmu have to be fixed up.
2293 func_start mmu_fixup_page_mmu_cache,%d0/%a0
2295 dputs "mmu_fixup_page_mmu_cache"
2298 /* Calculate the offset into the root table
2301 moveq #ROOT_INDEX_SHIFT,%d1
2303 mmu_get_root_table_entry %d0
2305 /* Calculate the offset into the pointer table
2308 moveq #PTR_INDEX_SHIFT,%d1
2310 andl #PTR_TABLE_SIZE-1,%d0
2311 mmu_get_ptr_table_entry %a0,%d0
2313 /* Calculate the offset into the page table
2316 moveq #PAGE_INDEX_SHIFT,%d1
2318 andl #PAGE_TABLE_SIZE-1,%d0
2319 mmu_get_page_table_entry %a0,%d0
2322 andil #_CACHEMASK040,%d0
2323 orl %pc@(m68k_pgtable_cachemode),%d0
2328 func_return mmu_fixup_page_mmu_cache
2333 * create a temporary mapping to enable the mmu,
2334 * this we don't need any transparation translation tricks.
2337 func_start mmu_temp_map,%d0/%d1/%a0/%a1
2339 dputs "mmu_temp_map"
2344 lea %pc@(L(temp_mmap_mem)),%a1
2346 /* Calculate the offset in the root table
2349 moveq #ROOT_INDEX_SHIFT,%d1
2351 mmu_get_root_table_entry %d0
2353 /* Check if the table is temporary allocated, so we have to reuse it
2356 cmpl %pc@(L(memory_start)),%d0
2359 /* Temporary allocate a ptr table and insert it into the root table
2362 addl #PTR_TABLE_SIZE*4,%a1@
2363 orw #_PAGE_TABLE+_PAGE_ACCESSED,%d0
2368 /* Mask the root table entry for the ptr table
2370 andw #-ROOT_TABLE_SIZE,%d0
2373 /* Calculate the offset into the pointer table
2376 moveq #PTR_INDEX_SHIFT,%d1
2378 andl #PTR_TABLE_SIZE-1,%d0
2382 /* Check if a temporary page table is already allocated
2387 /* Temporary allocate a page table and insert it into the ptr table
2390 /* The 512 should be PAGE_TABLE_SIZE*4, but that violates the
2391 alignment restriction for pointer tables on the '0[46]0. */
2393 orw #_PAGE_TABLE+_PAGE_ACCESSED,%d0
2398 /* Mask the ptr table entry for the page table
2400 andw #-PTR_TABLE_SIZE,%d0
2403 /* Calculate the offset into the page table
2406 moveq #PAGE_INDEX_SHIFT,%d1
2408 andl #PAGE_TABLE_SIZE-1,%d0
2412 /* Insert the address into the page table
2416 orw #_PAGE_PRESENT+_PAGE_ACCESSED+_PAGE_DIRTY,%d0
2422 func_return mmu_temp_map
2424 func_start mmu_engage,%d0-%d2/%a0-%a3
2426 moveq #ROOT_TABLE_SIZE-1,%d0
2427 /* Temporarily use a different root table. */
2428 lea %pc@(L(kernel_pgdir_ptr)),%a0
2430 movel %pc@(L(memory_start)),%a1
2437 lea %pc@(L(temp_mmap_mem)),%a0
2440 movew #PAGESIZE-1,%d0
2447 /* Skip temp mappings if phys == virt */
2451 mmu_temp_map %a0,%a0
2452 mmu_temp_map %a0,%a1
2456 mmu_temp_map %a0,%a0
2457 mmu_temp_map %a0,%a1
2459 movel %pc@(L(memory_start)),%a3
2460 movel %pc@(L(phys_kernel_start)),%d2
2462 is_not_040_or_060(L(mmu_engage_030))
2472 movel #TC_ENABLE+TC_PAGE4K,%d0
2473 movec %d0,%tc /* enable the MMU */
2482 jra L(mmu_engage_cleanup)
2484 L(mmu_engage_030_temp):
2488 lea %pc@(L(mmu_engage_030_temp)),%a0
2489 movel #0x80000002,%a0@
2496 * enable,super root enable,4096 byte pages,7 bit root index,
2497 * 7 bit pointer index, 6 bit page table index.
2499 movel #0x82c07760,%a0@(8)
2500 pmove %a0@(8),%tc /* enable the MMU */
2502 1: movel %a2,%a0@(4)
2509 L(mmu_engage_cleanup):
2510 subl #PAGE_OFFSET,%d2
2512 movel %a2,L(kernel_pgdir_ptr)
2517 func_return mmu_engage
2519 func_start mmu_get_root_table_entry,%d0/%a1
2522 dputs "mmu_get_root_table_entry:"
2527 movel %pc@(L(kernel_pgdir_ptr)),%a0
2533 /* Find the start of free memory, get_bi_record does this for us,
2534 * as the bootinfo structure is located directly behind the kernel
2535 * and and we simply search for the last entry.
2537 get_bi_record BI_LAST
2538 addw #PAGESIZE-1,%a0
2544 lea %pc@(L(memory_start)),%a0
2546 lea %pc@(L(kernel_end)),%a0
2549 /* we have to return the first page at _stext since the init code
2550 * in mm/init.c simply expects kernel_pg_dir there, the rest of
2551 * page is used for further ptr tables in get_ptr_table.
2553 lea %pc@(_stext),%a0
2554 lea %pc@(L(mmu_cached_pointer_tables)),%a1
2556 addl #ROOT_TABLE_SIZE*4,%a1@
2558 lea %pc@(L(mmu_num_pointer_tables)),%a1
2564 movew #PAGESIZE/4-1,%d0
2569 lea %pc@(L(kernel_pgdir_ptr)),%a1
2583 func_return mmu_get_root_table_entry
2587 func_start mmu_get_ptr_table_entry,%d0/%a1
2590 dputs "mmu_get_ptr_table_entry:"
2600 /* Keep track of the number of pointer tables we use
2602 dputs "\nmmu_get_new_ptr_table:"
2603 lea %pc@(L(mmu_num_pointer_tables)),%a0
2607 /* See if there is a free pointer table in our cache of pointer tables
2609 lea %pc@(L(mmu_cached_pointer_tables)),%a1
2613 /* Get a new pointer table page from above the kernel memory
2618 /* There is an unused pointer table in our cache... use it
2621 addl #PTR_TABLE_SIZE*4,%a1@
2626 /* Insert the new pointer table into the root table
2629 orw #_PAGE_TABLE+_PAGE_ACCESSED,%d0
2632 /* Extract the pointer table entry
2634 andw #-PTR_TABLE_SIZE,%d0
2644 func_return mmu_get_ptr_table_entry
2647 func_start mmu_get_page_table_entry,%d0/%a1
2650 dputs "mmu_get_page_table_entry:"
2660 /* If the page table entry doesn't exist, we allocate a complete new
2661 * page and use it as one continues big page table which can cover
2662 * 4MB of memory, nearly almost all mappings have that alignment.
2665 addw #_PAGE_TABLE+_PAGE_ACCESSED,%a0
2667 /* align pointer table entry for a page of page tables
2670 andw #-(PAGESIZE/PAGE_TABLE_SIZE),%d0
2673 /* Insert the page tables into the pointer entries
2675 moveq #PAGESIZE/PAGE_TABLE_SIZE/4-1,%d0
2678 lea %a0@(PAGE_TABLE_SIZE*4),%a0
2681 /* Now we can get the initialized pointer table entry
2686 /* Extract the page table entry
2688 andw #-PAGE_TABLE_SIZE,%d0
2698 func_return mmu_get_page_table_entry
2703 * Return a new page from the memory start and clear it.
2705 func_start get_new_page,%d0/%a1
2707 dputs "\nget_new_page:"
2709 /* allocate the page and adjust memory_start
2711 lea %pc@(L(memory_start)),%a0
2715 /* clear the new page
2718 movew #PAGESIZE/4-1,%d0
2726 func_return get_new_page
2731 * Debug output support
2732 * Atarians have a choice between the parallel port, the serial port
2733 * from the MFP or a serial port of the SCC
2738 L(scc_initable_mac):
2739 .byte 4,0x44 /* x16, 1 stopbit, no parity */
2740 .byte 3,0xc0 /* receiver: 8 bpc */
2741 .byte 5,0xe2 /* transmitter: 8 bpc, assert dtr/rts */
2742 .byte 10,0 /* NRZ */
2743 .byte 11,0x50 /* use baud rate generator */
2744 .byte 12,1,13,0 /* 38400 baud */
2745 .byte 14,1 /* Baud rate generator enable */
2746 .byte 3,0xc1 /* enable receiver */
2747 .byte 5,0xea /* enable transmitter */
2753 /* #define USE_PRINTER */
2754 /* #define USE_SCC_B */
2755 /* #define USE_SCC_A */
2758 #if defined(USE_SCC_A) || defined(USE_SCC_B)
2760 /* Initialisation table for SCC */
2762 .byte 9,12 /* Reset */
2763 .byte 4,0x44 /* x16, 1 stopbit, no parity */
2764 .byte 3,0xc0 /* receiver: 8 bpc */
2765 .byte 5,0xe2 /* transmitter: 8 bpc, assert dtr/rts */
2766 .byte 9,0 /* no interrupts */
2767 .byte 10,0 /* NRZ */
2768 .byte 11,0x50 /* use baud rate generator */
2769 .byte 12,24,13,0 /* 9600 baud */
2770 .byte 14,2,14,3 /* use master clock for BRG, enable */
2771 .byte 3,0xc1 /* enable receiver */
2772 .byte 5,0xea /* enable transmitter */
2779 LPSG_SELECT = 0xff8800
2780 LPSG_READ = 0xff8800
2781 LPSG_WRITE = 0xff8802
2785 LSTMFP_GPIP = 0xfffa01
2786 LSTMFP_DDR = 0xfffa05
2787 LSTMFP_IERB = 0xfffa09
2789 #elif defined(USE_SCC_B)
2791 LSCC_CTRL = 0xff8c85
2792 LSCC_DATA = 0xff8c87
2794 #elif defined(USE_SCC_A)
2796 LSCC_CTRL = 0xff8c81
2797 LSCC_DATA = 0xff8c83
2799 #elif defined(USE_MFP)
2802 LMFP_TDCDR = 0xfffa1d
2803 LMFP_TDDR = 0xfffa25
2808 #endif /* CONFIG_ATARI */
2811 * Serial port output support.
2815 * Initialize serial port hardware for 9600/8/1
2817 func_start serial_init,%d0/%d1/%a0/%a1
2819 * Some of the register usage that follows
2821 * a0 = pointer to boot info record
2822 * d0 = boot info offset
2824 * a0 = address of SCC
2825 * a1 = Liobase address/address of scc_initable
2826 * d0 = init data for serial port
2828 * a0 = address of SCC
2829 * a1 = address of scc_initable_mac
2830 * d0 = init data for serial port
2834 #define SERIAL_DTR 7
2835 #define SERIAL_CNTRL CIABBASE+C_PRA
2838 lea %pc@(L(custom)),%a0
2839 movel #-ZTWOBASE,%a0@
2840 bclr #SERIAL_DTR,SERIAL_CNTRL-ZTWOBASE
2841 get_bi_record BI_AMIGA_SERPER
2842 movew %a0@,CUSTOMBASE+C_SERPER-ZTWOBASE
2843 | movew #61,CUSTOMBASE+C_SERPER-ZTWOBASE
2848 movel %pc@(L(iobase)),%a1
2849 #if defined(USE_PRINTER)
2850 bclr #0,%a1@(LSTMFP_IERB)
2851 bclr #0,%a1@(LSTMFP_DDR)
2852 moveb #LPSG_CONTROL,%a1@(LPSG_SELECT)
2853 moveb #0xff,%a1@(LPSG_WRITE)
2854 moveb #LPSG_IO_B,%a1@(LPSG_SELECT)
2855 clrb %a1@(LPSG_WRITE)
2856 moveb #LPSG_IO_A,%a1@(LPSG_SELECT)
2857 moveb %a1@(LPSG_READ),%d0
2859 moveb %d0,%a1@(LPSG_WRITE)
2860 #elif defined(USE_SCC)
2861 lea %a1@(LSCC_CTRL),%a0
2862 lea %pc@(L(scc_initable)),%a1
2869 #elif defined(USE_MFP)
2870 bclr #1,%a1@(LMFP_TSR)
2871 moveb #0x88,%a1@(LMFP_UCR)
2872 andb #0x70,%a1@(LMFP_TDCDR)
2873 moveb #2,%a1@(LMFP_TDDR)
2874 orb #1,%a1@(LMFP_TDCDR)
2875 bset #1,%a1@(LMFP_TSR)
2877 jra L(serial_init_done)
2881 is_not_mac(L(serial_init_not_mac))
2885 /* You may define either or both of these. */
2886 #define MAC_USE_SCC_A /* Modem port */
2887 #define MAC_USE_SCC_B /* Printer port */
2889 #define mac_scc_cha_b_ctrl_offset 0x0
2890 #define mac_scc_cha_a_ctrl_offset 0x2
2891 #define mac_scc_cha_b_data_offset 0x4
2892 #define mac_scc_cha_a_data_offset 0x6
2894 #if defined(MAC_USE_SCC_A) || defined(MAC_USE_SCC_B)
2895 movel %pc@(L(mac_sccbase)),%a0
2896 /* Reset SCC register pointer */
2897 moveb %a0@(mac_scc_cha_a_ctrl_offset),%d0
2898 /* Reset SCC device: write register pointer then register value */
2899 moveb #9,%a0@(mac_scc_cha_a_ctrl_offset)
2900 moveb #0xc0,%a0@(mac_scc_cha_a_ctrl_offset)
2901 /* Wait for 5 PCLK cycles, which is about 68 CPU cycles */
2902 /* 5 / 3.6864 MHz = approx. 1.36 us = 68 / 50 MHz */
2909 #ifdef MAC_USE_SCC_A
2910 /* Initialize channel A */
2911 lea %pc@(L(scc_initable_mac)),%a1
2914 moveb %d0,%a0@(mac_scc_cha_a_ctrl_offset)
2915 moveb %a1@+,%a0@(mac_scc_cha_a_ctrl_offset)
2918 #endif /* MAC_USE_SCC_A */
2920 #ifdef MAC_USE_SCC_B
2921 /* Initialize channel B */
2922 lea %pc@(L(scc_initable_mac)),%a1
2925 moveb %d0,%a0@(mac_scc_cha_b_ctrl_offset)
2926 moveb %a1@+,%a0@(mac_scc_cha_b_ctrl_offset)
2929 #endif /* MAC_USE_SCC_B */
2931 #endif /* SERIAL_DEBUG */
2933 jra L(serial_init_done)
2934 L(serial_init_not_mac):
2935 #endif /* CONFIG_MAC */
2939 /* debug output goes into SRAM, so we don't do it unless requested
2940 - check for '%LX$' signature in SRAM */
2941 lea %pc@(q40_mem_cptr),%a1
2942 move.l #0xff020010,%a1@ /* must be inited - also used by debug=mem */
2943 move.l #0xff020000,%a1
2956 lea %pc@(L(q40_do_debug)),%a1
2958 /*nodbg: q40_do_debug is 0 by default*/
2962 #ifdef CONFIG_APOLLO
2963 /* We count on the PROM initializing SIO1 */
2967 /* We count on the boot loader initialising the UART */
2970 L(serial_init_done):
2971 func_return serial_init
2974 * Output character on serial port.
2976 func_start serial_putc,%d0/%d1/%a0/%a1
2982 /* A little safe recursion is good for the soul */
2990 movel %pc@(L(custom)),%a0
2991 movew %d0,%a0@(CUSTOMBASE+C_SERDAT)
2992 1: movew %a0@(CUSTOMBASE+C_SERDATR),%d0
2995 jra L(serial_putc_done)
3004 #if defined(MAC_USE_SCC_A) || defined(MAC_USE_SCC_B)
3005 movel %pc@(L(mac_sccbase)),%a1
3008 #ifdef MAC_USE_SCC_A
3009 3: btst #2,%a1@(mac_scc_cha_a_ctrl_offset)
3011 moveb %d0,%a1@(mac_scc_cha_a_data_offset)
3012 #endif /* MAC_USE_SCC_A */
3014 #ifdef MAC_USE_SCC_B
3015 4: btst #2,%a1@(mac_scc_cha_b_ctrl_offset)
3017 moveb %d0,%a1@(mac_scc_cha_b_data_offset)
3018 #endif /* MAC_USE_SCC_B */
3020 #endif /* SERIAL_DEBUG */
3022 jra L(serial_putc_done)
3024 #endif /* CONFIG_MAC */
3028 movel %pc@(L(iobase)),%a1
3029 #if defined(USE_PRINTER)
3030 3: btst #0,%a1@(LSTMFP_GPIP)
3032 moveb #LPSG_IO_B,%a1@(LPSG_SELECT)
3033 moveb %d0,%a1@(LPSG_WRITE)
3034 moveb #LPSG_IO_A,%a1@(LPSG_SELECT)
3035 moveb %a1@(LPSG_READ),%d0
3037 moveb %d0,%a1@(LPSG_WRITE)
3041 moveb %d0,%a1@(LPSG_WRITE)
3042 #elif defined(USE_SCC)
3043 3: btst #2,%a1@(LSCC_CTRL)
3045 moveb %d0,%a1@(LSCC_DATA)
3046 #elif defined(USE_MFP)
3047 3: btst #7,%a1@(LMFP_TSR)
3049 moveb %d0,%a1@(LMFP_UDR)
3051 jra L(serial_putc_done)
3053 #endif /* CONFIG_ATARI */
3055 #ifdef CONFIG_MVME147
3057 1: btst #2,M147_SCC_CTRL_A
3059 moveb %d0,M147_SCC_DATA_A
3060 jbra L(serial_putc_done)
3064 #ifdef CONFIG_MVME16x
3067 * If the loader gave us a board type then we can use that to
3068 * select an appropriate output routine; otherwise we just use
3069 * the Bug code. If we have to use the Bug that means the Bug
3070 * workspace has to be valid, which means the Bug has to use
3071 * the SRAM, which is non-standard.
3073 moveml %d0-%d7/%a2-%a6,%sp@-
3074 movel vme_brdtype,%d1
3075 jeq 1f | No tag - use the Bug
3076 cmpi #VME_TYPE_MVME162,%d1
3078 cmpi #VME_TYPE_MVME172,%d1
3080 /* 162/172; it's an SCC */
3081 6: btst #2,M162_SCC_CTRL_A
3086 moveb #8,M162_SCC_CTRL_A
3090 moveb %d0,M162_SCC_CTRL_A
3093 /* 166/167/177; it's a CD2401 */
3095 moveb M167_CYIER,%d2
3096 moveb #0x02,M167_CYIER
3098 btst #5,M167_PCSCCTICR
3100 moveb M167_PCTPIACKR,%d1
3101 moveb M167_CYLICR,%d1
3103 moveb #0x08,M167_CYTEOIR
3106 moveb %d0,M167_CYTDR
3107 moveb #0,M167_CYTEOIR
3108 moveb %d2,M167_CYIER
3113 .word 0x0020 /* TRAP 0x020 */
3115 moveml %sp@+,%d0-%d7/%a2-%a6
3116 jbra L(serial_putc_done)
3118 #endif /* CONFIG_MVME16x */
3120 #ifdef CONFIG_BVME6000
3123 * The BVME6000 machine has a serial port ...
3125 1: btst #2,BVME_SCC_CTRL_A
3127 moveb %d0,BVME_SCC_DATA_A
3128 jbra L(serial_putc_done)
3135 movel 0xFEFE0018,%a1
3138 jbra L(serial_putc_done)
3144 tst.l %pc@(L(q40_do_debug)) /* only debug if requested */
3146 lea %pc@(q40_mem_cptr),%a1
3151 jbra L(serial_putc_done)
3155 #ifdef CONFIG_APOLLO
3157 movl %pc@(L(iobase)),%a1
3158 moveb %d0,%a1@(LTHRB0)
3159 1: moveb %a1@(LSRB0),%d0
3162 jbra L(serial_putc_done)
3168 movl %pc@(L(iobase)),%a1
3169 addl %pc@(L(uartbase)),%a1
3170 movel %pc@(L(uart_scode)),%d1 /* Check the scode */
3171 jmi 3f /* Unset? Exit */
3172 cmpi #256,%d1 /* APCI scode? */
3174 1: moveb %a1@(DCALSR),%d1 /* Output to DCA */
3177 moveb %d0,%a1@(DCADATA)
3178 jbra L(serial_putc_done)
3179 2: moveb %a1@(APCILSR),%d1 /* Output to APCI */
3182 moveb %d0,%a1@(APCIDATA)
3183 jbra L(serial_putc_done)
3187 L(serial_putc_done):
3188 func_return serial_putc
3193 func_start puts,%d0/%a0
3210 * Output number in hex notation.
3213 func_start putn,%d0-%d2
3225 addb #'A'-('9'+1),%d2
3241 * This routine takes its parameters on the stack. It then
3242 * turns around and calls the internal routines. This routine
3243 * is used by the boot console.
3245 * The calling parameters are:
3246 * void mac_early_print(const char *str, unsigned length);
3248 * This routine does NOT understand variable arguments only
3251 ENTRY(mac_early_print)
3252 moveml %d0/%d1/%a0,%sp@-
3255 movel %sp@(18),%a0 /* fetch parameter */
3256 movel %sp@(22),%d1 /* fetch parameter */
3271 moveml %sp@+,%d0/%d1/%a0
3273 #endif /* CONFIG_MAC */
3275 #if defined(CONFIG_HP300) || defined(CONFIG_APOLLO)
3276 func_start set_leds,%d0/%a0
3280 movel %pc@(L(iobase)),%a0
3281 moveb %d0,%a0@(0x1ffff)
3285 #ifdef CONFIG_APOLLO
3286 movel %pc@(L(iobase)),%a0
3289 moveb %d0,%a0@(LCPUCTRL)
3292 func_return set_leds
3297 * For continuity, see the data alignment
3298 * to which this structure is tied.
3300 #define Lconsole_struct_cur_column 0
3301 #define Lconsole_struct_cur_row 4
3302 #define Lconsole_struct_num_columns 8
3303 #define Lconsole_struct_num_rows 12
3304 #define Lconsole_struct_left_edge 16
3306 func_start console_init,%a0-%a4/%d0-%d7
3308 * Some of the register usage that follows
3309 * a0 = pointer to boot_info
3310 * a1 = pointer to screen
3311 * a2 = pointer to console_globals
3312 * d3 = pixel width of screen
3313 * d4 = pixel height of screen
3314 * (d3,d4) ~= (x,y) of a point just below
3315 * and to the right of the screen
3316 * NOT on the screen!
3317 * d5 = number of bytes per scan line
3318 * d6 = number of bytes on the entire screen
3321 lea %pc@(L(console_globals)),%a2
3322 movel %pc@(L(mac_videobase)),%a1
3323 movel %pc@(L(mac_rowbytes)),%d5
3324 movel %pc@(L(mac_dimensions)),%d3 /* -> low byte */
3326 swap %d4 /* -> high byte */
3327 andl #0xffff,%d3 /* d3 = screen width in pixels */
3328 andl #0xffff,%d4 /* d4 = screen height in pixels */
3332 mulul %d4,%d6 /* scan line bytes x num scan lines */
3333 divul #8,%d6 /* we'll clear 8 bytes at a time */
3334 moveq #-1,%d0 /* Mac_black */
3337 L(console_clear_loop):
3340 dbra %d6,L(console_clear_loop)
3342 /* Calculate font size */
3344 #if defined(FONT_8x8) && defined(CONFIG_FONT_8x8)
3345 lea %pc@(font_vga_8x8),%a0
3346 #elif defined(FONT_8x16) && defined(CONFIG_FONT_8x16)
3347 lea %pc@(font_vga_8x16),%a0
3348 #elif defined(FONT_6x11) && defined(CONFIG_FONT_6x11)
3349 lea %pc@(font_vga_6x11),%a0
3350 #elif defined(CONFIG_FONT_8x8) /* default */
3351 lea %pc@(font_vga_8x8),%a0
3352 #else /* no compiled-in font */
3357 * At this point we make a shift in register usage
3358 * a1 = address of console_font pointer
3360 lea %pc@(L(console_font)),%a1
3361 movel %a0,%a1@ /* store pointer to struct fbcon_font_desc in console_font */
3364 lea %pc@(L(console_font_data)),%a4
3365 movel %a0@(FONT_DESC_DATA),%d0
3366 subl #L(console_font),%a1
3371 * Calculate global maxs
3372 * Note - we can use either an
3373 * 8 x 16 or 8 x 8 character font
3374 * 6 x 11 also supported
3376 /* ASSERT: a0 = contents of Lconsole_font */
3377 movel %d3,%d0 /* screen width in pixels */
3378 divul %a0@(FONT_DESC_WIDTH),%d0 /* d0 = max num chars per row */
3380 movel %d4,%d1 /* screen height in pixels */
3381 divul %a0@(FONT_DESC_HEIGHT),%d1 /* d1 = max num rows */
3383 movel %d0,%a2@(Lconsole_struct_num_columns)
3384 movel %d1,%a2@(Lconsole_struct_num_rows)
3387 * Clear the current row and column
3389 clrl %a2@(Lconsole_struct_cur_column)
3390 clrl %a2@(Lconsole_struct_cur_row)
3391 clrl %a2@(Lconsole_struct_left_edge)
3394 * Initialization is complete
3397 func_return console_init
3399 func_start console_put_stats,%a0/%d7
3401 * Some of the register usage that follows
3402 * a0 = pointer to boot_info
3403 * d7 = value of boot_info fields
3409 putn %pc@(L(mac_videobase)) /* video addr. */
3412 lea %pc@(_stext),%a0
3420 putn %pc@(L(cputype))
3424 putn %pc@(L(mac_sccbase))
3428 jbsr mmu_print_machine_cpu_types
3430 #endif /* SERIAL_DEBUG */
3434 func_return console_put_stats
3437 func_start console_put_penguin,%a0-%a1/%d0-%d7
3439 * Get 'that_penguin' onto the screen in the upper right corner
3440 * penguin is 64 x 74 pixels, align against right edge of screen
3442 lea %pc@(L(mac_dimensions)),%a0
3445 subil #64,%d0 /* snug up against the right edge */
3446 clrl %d1 /* start at the top */
3448 lea %pc@(L(that_penguin)),%a1
3449 L(console_penguin_row):
3451 L(console_penguin_pixel_pair):
3454 console_plot_pixel %d0,%d1,%d2
3457 console_plot_pixel %d0,%d1,%d2
3459 dbra %d6,L(console_penguin_pixel_pair)
3463 dbra %d7,L(console_penguin_row)
3465 func_return console_put_penguin
3467 /* include penguin bitmap */
3469 #include "../mac/mac_penguin.S"
3473 * Calculate source and destination addresses
3478 func_start console_scroll,%a0-%a4/%d0-%d7
3479 lea %pc@(L(mac_videobase)),%a0
3482 lea %pc@(L(mac_rowbytes)),%a0
3484 movel %pc@(L(console_font)),%a0
3487 mulul %a0@(FONT_DESC_HEIGHT),%d5 /* account for # scan lines per character */
3493 lea %pc@(L(mac_dimensions)),%a0
3497 andl #0xffff,%d3 /* d3 = screen width in pixels */
3498 andl #0xffff,%d4 /* d4 = screen height in pixels */
3501 * Calculate number of bytes to move
3503 lea %pc@(L(mac_rowbytes)),%a0
3505 movel %pc@(L(console_font)),%a0
3506 subl %a0@(FONT_DESC_HEIGHT),%d4 /* we're not scrolling the top row! */
3507 mulul %d4,%d6 /* scan line bytes x num scan lines */
3508 divul #32,%d6 /* we'll move 8 longs at a time */
3511 L(console_scroll_loop):
3520 dbra %d6,L(console_scroll_loop)
3522 lea %pc@(L(mac_rowbytes)),%a0
3524 movel %pc@(L(console_font)),%a0
3525 mulul %a0@(FONT_DESC_HEIGHT),%d6 /* scan line bytes x font height */
3526 divul #32,%d6 /* we'll move 8 words at a time */
3530 L(console_scroll_clear_loop):
3539 dbra %d6,L(console_scroll_clear_loop)
3542 func_return console_scroll
3545 func_start console_putc,%a0/%a1/%d0-%d7
3547 is_not_mac(L(console_exit))
3548 tstl %pc@(L(console_font))
3551 /* Output character in d7 on console.
3557 /* A little safe recursion is good for the soul */
3560 lea %pc@(L(console_globals)),%a0
3563 jne L(console_not_lf)
3564 movel %a0@(Lconsole_struct_cur_row),%d0
3566 movel %d0,%a0@(Lconsole_struct_cur_row)
3567 movel %a0@(Lconsole_struct_num_rows),%d1
3571 movel %d0,%a0@(Lconsole_struct_cur_row)
3578 jne L(console_not_cr)
3579 clrl %a0@(Lconsole_struct_cur_column)
3584 jne L(console_not_home)
3585 clrl %a0@(Lconsole_struct_cur_row)
3586 clrl %a0@(Lconsole_struct_cur_column)
3590 * At this point we know that the %d7 character is going to be
3591 * rendered on the screen. Register usage is -
3592 * a0 = pointer to console globals
3594 * d0 = cursor column
3595 * d1 = cursor row to draw the character
3596 * d7 = character number
3598 L(console_not_home):
3599 movel %a0@(Lconsole_struct_cur_column),%d0
3600 addql #1,%a0@(Lconsole_struct_cur_column)
3601 movel %a0@(Lconsole_struct_num_columns),%d1
3604 console_putc #'\n' /* recursion is OK! */
3606 movel %a0@(Lconsole_struct_cur_row),%d1
3609 * At this point we make a shift in register usage
3610 * a0 = address of pointer to font data (fbcon_font_desc)
3612 movel %pc@(L(console_font)),%a0
3613 movel %pc@(L(console_font_data)),%a1 /* Load fbcon_font_desc.data into a1 */
3614 andl #0x000000ff,%d7
3615 /* ASSERT: a0 = contents of Lconsole_font */
3616 mulul %a0@(FONT_DESC_HEIGHT),%d7 /* d7 = index into font data */
3617 addl %d7,%a1 /* a1 = points to char image */
3620 * At this point we make a shift in register usage
3621 * d0 = pixel coordinate, x
3622 * d1 = pixel coordinate, y
3623 * d2 = (bit 0) 1/0 for white/black (!) pixel on screen
3624 * d3 = font scan line data (8 pixels)
3625 * d6 = count down for the font's pixel width (8)
3626 * d7 = count down for the font's pixel count in height
3628 /* ASSERT: a0 = contents of Lconsole_font */
3629 mulul %a0@(FONT_DESC_WIDTH),%d0
3630 mulul %a0@(FONT_DESC_HEIGHT),%d1
3631 movel %a0@(FONT_DESC_HEIGHT),%d7 /* Load fbcon_font_desc.height into d7 */
3633 L(console_read_char_scanline):
3636 /* ASSERT: a0 = contents of Lconsole_font */
3637 movel %a0@(FONT_DESC_WIDTH),%d6 /* Load fbcon_font_desc.width into d6 */
3640 L(console_do_font_scanline):
3642 scsb %d2 /* convert 1 bit into a byte */
3643 console_plot_pixel %d0,%d1,%d2
3645 dbra %d6,L(console_do_font_scanline)
3647 /* ASSERT: a0 = contents of Lconsole_font */
3648 subl %a0@(FONT_DESC_WIDTH),%d0
3650 dbra %d7,L(console_read_char_scanline)
3653 func_return console_putc
3659 * d2 = (bit 0) 1/0 for white/black (!)
3660 * All registers are preserved
3662 func_start console_plot_pixel,%a0-%a1/%d0-%d4
3664 movel %pc@(L(mac_videobase)),%a1
3665 movel %pc@(L(mac_videodepth)),%d3
3668 mulul %pc@(L(mac_rowbytes)),%d1
3673 * d0 = x coord becomes byte offset into frame buffer
3675 * d2 = black or white (0/1)
3677 * d4 = temp of x (d0) for many bit depths
3682 movel %d0,%d4 /* we need the low order 3 bits! */
3687 eorb #7,%d4 /* reverse the x-coordinate w/ screen-bit # */
3691 jbra L(console_plot_pixel_exit)
3694 jbra L(console_plot_pixel_exit)
3699 movel %d0,%d4 /* we need the low order 2 bits! */
3704 eorb #3,%d4 /* reverse the x-coordinate w/ screen-bit # */
3711 jbra L(console_plot_pixel_exit)
3716 jbra L(console_plot_pixel_exit)
3721 movel %d0,%d4 /* we need the low order bit! */
3737 jbra L(console_plot_pixel_exit)
3746 jbra L(console_plot_pixel_exit)
3756 jbra L(console_plot_pixel_exit)
3759 jbra L(console_plot_pixel_exit)
3763 jbne L(console_plot_pixel_exit)
3770 jbra L(console_plot_pixel_exit)
3773 jbra L(console_plot_pixel_exit)
3775 L(console_plot_pixel_exit):
3776 func_return console_plot_pixel
3777 #endif /* CONSOLE */
3783 #if defined(CONFIG_ATARI) || defined(CONFIG_AMIGA) || \
3784 defined(CONFIG_HP300) || defined(CONFIG_APOLLO)
3790 #if defined(CONSOLE)
3792 .long 0 /* cursor column */
3793 .long 0 /* cursor row */
3794 .long 0 /* max num columns */
3795 .long 0 /* max num rows */
3796 .long 0 /* left edge */
3798 .long 0 /* pointer to console font (struct font_desc) */
3799 L(console_font_data):
3800 .long 0 /* pointer to console font data */
3801 #endif /* CONSOLE */
3803 #if defined(MMU_PRINT)
3805 .long 0 /* valid flag */
3806 .long 0 /* start logical */
3807 .long 0 /* next logical */
3808 .long 0 /* start physical */
3809 .long 0 /* next physical */
3810 #endif /* MMU_PRINT */
3814 L(mmu_cached_pointer_tables):
3816 L(mmu_num_pointer_tables):
3818 L(phys_kernel_start):
3824 L(kernel_pgdir_ptr):
3829 #if defined (CONFIG_MVME147)
3830 M147_SCC_CTRL_A = 0xfffe3002
3831 M147_SCC_DATA_A = 0xfffe3003
3834 #if defined (CONFIG_MVME16x)
3835 M162_SCC_CTRL_A = 0xfff45005
3836 M167_CYCAR = 0xfff450ee
3837 M167_CYIER = 0xfff45011
3838 M167_CYLICR = 0xfff45026
3839 M167_CYTEOIR = 0xfff45085
3840 M167_CYTDR = 0xfff450f8
3841 M167_PCSCCTICR = 0xfff4201e
3842 M167_PCTPIACKR = 0xfff42025
3845 #if defined (CONFIG_BVME6000)
3846 BVME_SCC_CTRL_A = 0xffb0000b
3847 BVME_SCC_DATA_A = 0xffb0000f
3850 #if defined(CONFIG_MAC)
3863 #endif /* CONFIG_MAC */
3865 #if defined (CONFIG_APOLLO)
3871 #if defined(CONFIG_HP300)
3888 m68k_pgtable_cachemode:
3890 m68k_supervisor_cachemode:
3892 #if defined(CONFIG_MVME16x)
3894 .long 0,0,0,0,0,0,0,0
3896 #if defined(CONFIG_Q40)