3 ** head.S -- This file contains the initial boot code for the
6 ** Copyright 1993 by Hamish Macdonald
8 ** 68040 fixes by Michael Rausch
9 ** 68060 fixes by Roman Hodek
10 ** MMU cleanup by Randy Thelen
11 ** Final MMU cleanup by Roman Zippel
13 ** Atari support by Andreas Schwab, using ideas of Robert de Vries
15 ** VME Support by Richard Hirst
17 ** 94/11/14 Andreas Schwab: put kernel at PAGESIZE
18 ** 94/11/18 Andreas Schwab: remove identity mapping of STRAM for Atari
19 ** ++ Bjoern & Roman: ATARI-68040 support for the Medusa
20 ** 95/11/18 Richard Hirst: Added MVME166 support
21 ** 96/04/26 Guenther Kelleter: fixed identity mapping for Falcon with
22 ** Magnum- and FX-alternate ram
23 ** 98/04/25 Phil Blundell: added HP300 support
24 ** 1998/08/30 David Kilzer: Added support for font_desc structures
26 ** 1999/02/11 Richard Zidlicky: added Q40 support (initial version 99/01/01)
27 ** 2004/05/13 Kars de Jong: Finalised HP300 support
29 ** This file is subject to the terms and conditions of the GNU General Public
30 ** License. See the file README.legal in the main directory of this archive
38 * At this point, the boot loader has:
41 * Put us in supervisor state.
43 * The kernel setup code takes the following steps:
44 * . Raise interrupt level
45 * . Set up initial kernel memory mapping.
46 * . This sets up a mapping of the 4M of memory the kernel is located in.
47 * . It also does a mapping of any initial machine specific areas.
49 * . Enable cache memories
50 * . Jump to kernel startup
52 * Much of the file restructuring was to accomplish:
53 * 1) Remove register dependency through-out the file.
54 * 2) Increase use of subroutines to perform functions
55 * 3) Increase readability of the code
57 * Of course, readability is a subjective issue, so it will never be
58 * argued that that goal was accomplished. It was merely a goal.
59 * A key way to help make code more readable is to give good
60 * documentation. So, the first thing you will find is exaustive
61 * write-ups on the structure of the file, and the features of the
62 * functional subroutines.
66 * Without a doubt the single largest chunk of head.S is spent
67 * mapping the kernel and I/O physical space into the logical range
69 * There are new subroutines and data structures to make MMU
70 * support cleaner and easier to understand.
71 * First, you will find a routine call "mmu_map" which maps
72 * a logical to a physical region for some length given a cache
73 * type on behalf of the caller. This routine makes writing the
74 * actual per-machine specific code very simple.
75 * A central part of the code, but not a subroutine in itself,
76 * is the mmu_init code which is broken down into mapping the kernel
77 * (the same for all machines) and mapping machine-specific I/O
79 * Also, there will be a description of engaging the MMU and
81 * You will notice that there is a chunk of code which
82 * can emit the entire MMU mapping of the machine. This is present
83 * only in debug modes and can be very helpful.
84 * Further, there is a new console driver in head.S that is
85 * also only engaged in debug mode. Currently, it's only supported
86 * on the Macintosh class of machines. However, it is hoped that
87 * others will plug-in support for specific machines.
89 * ######################################################################
93 * mmu_map was written for two key reasons. First, it was clear
94 * that it was very difficult to read the previous code for mapping
95 * regions of memory. Second, the Macintosh required such extensive
96 * memory allocations that it didn't make sense to propagate the
97 * existing code any further.
98 * mmu_map requires some parameters:
100 * mmu_map (logical, physical, length, cache_type)
102 * While this essentially describes the function in the abstract, you'll
103 * find more indepth description of other parameters at the implementation site.
105 * mmu_get_root_table_entry
106 * ------------------------
107 * mmu_get_ptr_table_entry
108 * -----------------------
109 * mmu_get_page_table_entry
110 * ------------------------
112 * These routines are used by other mmu routines to get a pointer into
113 * a table, if necessary a new table is allocated. These routines are working
114 * basically like pmd_alloc() and pte_alloc() in <asm/pgtable.h>. The root
115 * table needs of course only to be allocated once in mmu_get_root_table_entry,
116 * so that here also some mmu specific initialization is done. The second page
117 * at the start of the kernel (the first page is unmapped later) is used for
118 * the kernel_pg_dir. It must be at a position known at link time (as it's used
119 * to initialize the init task struct) and since it needs special cache
120 * settings, it's the easiest to use this page, the rest of the page is used
121 * for further pointer tables.
122 * mmu_get_page_table_entry allocates always a whole page for page tables, this
123 * means 1024 pages and so 4MB of memory can be mapped. It doesn't make sense
124 * to manage page tables in smaller pieces as nearly all mappings have that
127 * ######################################################################
130 * ######################################################################
134 * Thanks to a small helping routine enabling the mmu got quite simple
135 * and there is only one way left. mmu_engage makes a complete a new mapping
136 * that only includes the absolute necessary to be able to jump to the final
137 * position and to restore the original mapping.
138 * As this code doesn't need a transparent translation register anymore this
139 * means all registers are free to be used by machines that needs them for
142 * ######################################################################
146 * This algorithm will print out the page tables of the system as
147 * appropriate for an 030 or an 040. This is useful for debugging purposes
148 * and as such is enclosed in #ifdef MMU_PRINT/#endif clauses.
150 * ######################################################################
154 * The console is also able to be turned off. The console in head.S
155 * is specifically for debugging and can be very useful. It is surrounded by
156 * #ifdef CONSOLE/#endif clauses so it doesn't have to ship in known-good
157 * kernels. It's basic algorithm is to determine the size of the screen
158 * (in height/width and bit depth) and then use that information for
159 * displaying an 8x8 font or an 8x16 (widthxheight). I prefer the 8x8 for
160 * debugging so I can see more good data. But it was trivial to add support
161 * for both fonts, so I included it.
162 * Also, the algorithm for plotting pixels is abstracted so that in
163 * theory other platforms could add support for different kinds of frame
164 * buffers. This could be very useful.
166 * console_put_penguin
167 * -------------------
168 * An important part of any Linux bring up is the penguin and there's
169 * nothing like getting the Penguin on the screen! This algorithm will work
170 * on any machine for which there is a console_plot_pixel.
174 * My hope is that the scroll algorithm does the right thing on the
175 * various platforms, but it wouldn't be hard to add the test conditions
176 * and new code if it doesn't.
181 * ######################################################################
183 * Register usage has greatly simplified within head.S. Every subroutine
184 * saves and restores all registers that it modifies (except it returns a
185 * value in there of course). So the only register that needs to be initialized
186 * is the stack pointer.
187 * All other init code and data is now placed in the init section, so it will
188 * be automatically freed at the end of the kernel initialization.
190 * ######################################################################
194 * There are many options available in a build of this file. I've
195 * taken the time to describe them here to save you the time of searching
196 * for them and trying to understand what they mean.
198 * CONFIG_xxx: These are the obvious machine configuration defines created
199 * during configuration. These are defined in autoconf.h.
201 * CONSOLE: There is support for head.S console in this file. This
202 * console can talk to a Mac frame buffer, but could easily be extrapolated
203 * to extend it to support other platforms.
205 * TEST_MMU: This is a test harness for running on any given machine but
206 * getting an MMU dump for another class of machine. The classes of machines
207 * that can be tested are any of the makes (Atari, Amiga, Mac, VME, etc.)
208 * and any of the models (030, 040, 060, etc.).
210 * NOTE: TEST_MMU is NOT permanent! It is scheduled to be removed
211 * When head.S boots on Atari, Amiga, Macintosh, and VME
212 * machines. At that point the underlying logic will be
213 * believed to be solid enough to be trusted, and TEST_MMU
214 * can be dropped. Do note that that will clean up the
215 * head.S code significantly as large blocks of #if/#else
216 * clauses can be removed.
218 * MMU_NOCACHE_KERNEL: On the Macintosh platform there was an inquiry into
219 * determing why devices don't appear to work. A test case was to remove
220 * the cacheability of the kernel bits.
222 * MMU_PRINT: There is a routine built into head.S that can display the
223 * MMU data structures. It outputs its result through the serial_putc
224 * interface. So where ever that winds up driving data, that's where the
225 * mmu struct will appear. On the Macintosh that's typically the console.
227 * SERIAL_DEBUG: There are a series of putc() macro statements
228 * scattered through out the code to give progress of status to the
229 * person sitting at the console. This constant determines whether those
232 * DEBUG: This is the standard DEBUG flag that can be set for building
233 * the kernel. It has the effect adding additional tests into
239 * In theory these could be determined at run time or handed
240 * over by the booter. But, let's be real, it's a fine hard
241 * coded value. (But, you will notice the code is run-time
242 * flexible!) A pointer to the font's struct font_desc
243 * is kept locally in Lconsole_font. It is used to determine
244 * font size information dynamically.
247 * USE_PRINTER: Use the printer port for serial debug.
248 * USE_SCC_B: Use the SCC port A (Serial2) for serial debug.
249 * USE_SCC_A: Use the SCC port B (Modem2) for serial debug.
250 * USE_MFP: Use the ST-MFP port (Modem1) for serial debug.
252 * Macintosh constants:
253 * MAC_USE_SCC_A: Use SCC port A (modem) for serial debug and early console.
254 * MAC_USE_SCC_B: Use SCC port B (printer) for serial debug and early console.
257 #include <linux/linkage.h>
258 #include <linux/init.h>
259 #include <asm/bootinfo.h>
260 #include <asm/bootinfo-amiga.h>
261 #include <asm/bootinfo-atari.h>
262 #include <asm/bootinfo-hp300.h>
263 #include <asm/bootinfo-mac.h>
264 #include <asm/bootinfo-q40.h>
265 #include <asm/bootinfo-vme.h>
266 #include <asm/setup.h>
267 #include <asm/entry.h>
268 #include <asm/pgtable.h>
269 #include <asm/page.h>
270 #include <asm/asm-offsets.h>
274 #include <asm/machw.h>
276 #ifdef CONFIG_FRAMEBUFFER_CONSOLE
280 #ifdef CONFIG_EARLY_PRINTK
286 #else /* !CONFIG_MAC */
290 #endif /* !CONFIG_MAC */
293 #undef MMU_NOCACHE_KERNEL
297 * For the head.S console, there are three supported fonts, 6x11, 8x16 and 8x8.
298 * The 8x8 font is harder to read but fits more on the screen.
300 #define FONT_8x8 /* default */
301 /* #define FONT_8x16 */ /* 2nd choice */
302 /* #define FONT_6x11 */ /* 3rd choice */
306 .globl m68k_pgtable_cachemode
307 .globl m68k_supervisor_cachemode
308 #ifdef CONFIG_MVME16x
315 CPUTYPE_040 = 1 /* indicates an 040 */
316 CPUTYPE_060 = 2 /* indicates an 060 */
317 CPUTYPE_0460 = 3 /* if either above are set, this is set */
318 CPUTYPE_020 = 4 /* indicates an 020 */
320 /* Translation control register */
325 /* Transparent translation registers */
326 TTR_ENABLE = 0x8000 /* enable transparent translation */
327 TTR_ANYMODE = 0x4000 /* user and kernel mode access */
328 TTR_KERNELMODE = 0x2000 /* only kernel mode access */
329 TTR_USERMODE = 0x0000 /* only user mode access */
330 TTR_CI = 0x0400 /* inhibit cache */
331 TTR_RW = 0x0200 /* read/write mode */
332 TTR_RWM = 0x0100 /* read/write mask */
333 TTR_FCB2 = 0x0040 /* function code base bit 2 */
334 TTR_FCB1 = 0x0020 /* function code base bit 1 */
335 TTR_FCB0 = 0x0010 /* function code base bit 0 */
336 TTR_FCM2 = 0x0004 /* function code mask bit 2 */
337 TTR_FCM1 = 0x0002 /* function code mask bit 1 */
338 TTR_FCM0 = 0x0001 /* function code mask bit 0 */
340 /* Cache Control registers */
341 CC6_ENABLE_D = 0x80000000 /* enable data cache (680[46]0) */
342 CC6_FREEZE_D = 0x40000000 /* freeze data cache (68060) */
343 CC6_ENABLE_SB = 0x20000000 /* enable store buffer (68060) */
344 CC6_PUSH_DPI = 0x10000000 /* disable CPUSH invalidation (68060) */
345 CC6_HALF_D = 0x08000000 /* half-cache mode for data cache (68060) */
346 CC6_ENABLE_B = 0x00800000 /* enable branch cache (68060) */
347 CC6_CLRA_B = 0x00400000 /* clear all entries in branch cache (68060) */
348 CC6_CLRU_B = 0x00200000 /* clear user entries in branch cache (68060) */
349 CC6_ENABLE_I = 0x00008000 /* enable instruction cache (680[46]0) */
350 CC6_FREEZE_I = 0x00004000 /* freeze instruction cache (68060) */
351 CC6_HALF_I = 0x00002000 /* half-cache mode for instruction cache (68060) */
352 CC3_ALLOC_WRITE = 0x00002000 /* write allocate mode(68030) */
353 CC3_ENABLE_DB = 0x00001000 /* enable data burst (68030) */
354 CC3_CLR_D = 0x00000800 /* clear data cache (68030) */
355 CC3_CLRE_D = 0x00000400 /* clear entry in data cache (68030) */
356 CC3_FREEZE_D = 0x00000200 /* freeze data cache (68030) */
357 CC3_ENABLE_D = 0x00000100 /* enable data cache (68030) */
358 CC3_ENABLE_IB = 0x00000010 /* enable instruction burst (68030) */
359 CC3_CLR_I = 0x00000008 /* clear instruction cache (68030) */
360 CC3_CLRE_I = 0x00000004 /* clear entry in instruction cache (68030) */
361 CC3_FREEZE_I = 0x00000002 /* freeze instruction cache (68030) */
362 CC3_ENABLE_I = 0x00000001 /* enable instruction cache (68030) */
364 /* Miscellaneous definitions */
368 ROOT_TABLE_SIZE = 128
371 ROOT_INDEX_SHIFT = 25
373 PAGE_INDEX_SHIFT = 12
376 /* When debugging use readable names for labels */
378 #define L(name) .head.S.##name
380 #define L(name) .head.S./**/name
384 #define L(name) .L##name
386 #define L(name) .L/**/name
390 /* The __INITDATA stuff is a no-op when ftrace or kgdb are turned on */
392 #define __INITDATA .data
393 #define __FINIT .previous
396 /* Several macros to make the writing of subroutines easier:
397 * - func_start marks the beginning of the routine which setups the frame
398 * register and saves the registers, it also defines another macro
399 * to automatically restore the registers again.
400 * - func_return marks the end of the routine and simply calls the prepared
401 * macro to restore registers and jump back to the caller.
402 * - func_define generates another macro to automatically put arguments
403 * onto the stack call the subroutine and cleanup the stack again.
406 /* Within subroutines these macros can be used to access the arguments
407 * on the stack. With STACK some allocated memory on the stack can be
408 * accessed and ARG0 points to the return address (used by mmu_engage).
410 #define STACK %a6@(stackstart)
413 #define ARG2 %a6@(12)
414 #define ARG3 %a6@(16)
415 #define ARG4 %a6@(20)
417 .macro func_start name,saveregs,stack=0
420 moveml \saveregs,%sp@-
421 .set stackstart,-\stack
423 .macro func_return_\name
424 moveml %sp@+,\saveregs
430 .macro func_return name
434 .macro func_call name
438 .macro move_stack nr,arg1,arg2,arg3,arg4
440 move_stack "(\nr-1)",\arg2,\arg3,\arg4
445 .macro func_define name,nr=0
446 .macro \name arg1,arg2,arg3,arg4
447 move_stack \nr,\arg1,\arg2,\arg3,\arg4
455 func_define mmu_map,4
456 func_define mmu_map_tt,4
457 func_define mmu_fixup_page_mmu_cache,1
458 func_define mmu_temp_map,2
459 func_define mmu_engage
460 func_define mmu_get_root_table_entry,1
461 func_define mmu_get_ptr_table_entry,2
462 func_define mmu_get_page_table_entry,2
463 func_define mmu_print
464 func_define get_new_page
465 #if defined(CONFIG_HP300) || defined(CONFIG_APOLLO)
469 .macro mmu_map_eq arg1,arg2,arg3
470 mmu_map \arg1,\arg1,\arg2,\arg3
473 .macro get_bi_record record
475 func_call get_bi_record
479 func_define serial_putc,1
480 func_define console_putc,1
482 func_define console_init
483 func_define console_put_stats
484 func_define console_put_penguin
485 func_define console_plot_pixel,3
486 func_define console_scroll
489 #if defined(CONSOLE) || defined(SERIAL_DEBUG)
493 func_call console_putc
496 func_call serial_putc
498 #if defined(CONSOLE) || defined(SERIAL_DEBUG)
518 #if defined(CONSOLE) || defined(SERIAL_DEBUG)
535 #define is_not_amiga(lab) cmpl &MACH_AMIGA,%pc@(m68k_machtype); jne lab
536 #define is_not_atari(lab) cmpl &MACH_ATARI,%pc@(m68k_machtype); jne lab
537 #define is_not_mac(lab) cmpl &MACH_MAC,%pc@(m68k_machtype); jne lab
538 #define is_not_mvme147(lab) cmpl &MACH_MVME147,%pc@(m68k_machtype); jne lab
539 #define is_not_mvme16x(lab) cmpl &MACH_MVME16x,%pc@(m68k_machtype); jne lab
540 #define is_not_bvme6000(lab) cmpl &MACH_BVME6000,%pc@(m68k_machtype); jne lab
541 #define is_mvme147(lab) cmpl &MACH_MVME147,%pc@(m68k_machtype); jeq lab
542 #define is_mvme16x(lab) cmpl &MACH_MVME16x,%pc@(m68k_machtype); jeq lab
543 #define is_bvme6000(lab) cmpl &MACH_BVME6000,%pc@(m68k_machtype); jeq lab
544 #define is_not_hp300(lab) cmpl &MACH_HP300,%pc@(m68k_machtype); jne lab
545 #define is_not_apollo(lab) cmpl &MACH_APOLLO,%pc@(m68k_machtype); jne lab
546 #define is_not_q40(lab) cmpl &MACH_Q40,%pc@(m68k_machtype); jne lab
547 #define is_not_sun3x(lab) cmpl &MACH_SUN3X,%pc@(m68k_machtype); jne lab
549 #define hasnt_leds(lab) cmpl &MACH_HP300,%pc@(m68k_machtype); \
551 cmpl &MACH_APOLLO,%pc@(m68k_machtype); \
555 #define is_040_or_060(lab) btst &CPUTYPE_0460,%pc@(L(cputype)+3); jne lab
556 #define is_not_040_or_060(lab) btst &CPUTYPE_0460,%pc@(L(cputype)+3); jeq lab
557 #define is_040(lab) btst &CPUTYPE_040,%pc@(L(cputype)+3); jne lab
558 #define is_060(lab) btst &CPUTYPE_060,%pc@(L(cputype)+3); jne lab
559 #define is_not_060(lab) btst &CPUTYPE_060,%pc@(L(cputype)+3); jeq lab
560 #define is_020(lab) btst &CPUTYPE_020,%pc@(L(cputype)+3); jne lab
561 #define is_not_020(lab) btst &CPUTYPE_020,%pc@(L(cputype)+3); jeq lab
563 /* On the HP300 we use the on-board LEDs for debug output before
564 the console is running. Writing a 1 bit turns the corresponding LED
565 _off_ - on the 340 bit 7 is towards the back panel of the machine. */
567 #if defined(CONFIG_HP300) || defined(CONFIG_APOLLO)
579 * Version numbers of the bootinfo interface
580 * The area from _stext to _start will later be used as kernel pointer table
582 bras 1f /* Jump over bootinfo version numbers */
584 .long BOOTINFOV_MAGIC
585 .long MACH_AMIGA, AMIGA_BOOTI_VERSION
586 .long MACH_ATARI, ATARI_BOOTI_VERSION
587 .long MACH_MVME147, MVME147_BOOTI_VERSION
588 .long MACH_MVME16x, MVME16x_BOOTI_VERSION
589 .long MACH_BVME6000, BVME6000_BOOTI_VERSION
590 .long MACH_MAC, MAC_BOOTI_VERSION
591 .long MACH_Q40, Q40_BOOTI_VERSION
592 .long MACH_HP300, HP300_BOOTI_VERSION
596 .equ kernel_pg_dir,_stext
598 .equ .,_stext+PAGESIZE
605 * Setup initial stack pointer
610 * Record the CPU and machine type.
612 get_bi_record BI_MACHTYPE
613 lea %pc@(m68k_machtype),%a1
616 get_bi_record BI_FPUTYPE
617 lea %pc@(m68k_fputype),%a1
620 get_bi_record BI_MMUTYPE
621 lea %pc@(m68k_mmutype),%a1
624 get_bi_record BI_CPUTYPE
625 lea %pc@(m68k_cputype),%a1
632 * For Macintosh, we need to determine the display parameters early (at least
633 * while debugging it).
636 is_not_mac(L(test_notmac))
638 get_bi_record BI_MAC_VADDR
639 lea %pc@(L(mac_videobase)),%a1
642 get_bi_record BI_MAC_VDEPTH
643 lea %pc@(L(mac_videodepth)),%a1
646 get_bi_record BI_MAC_VDIM
647 lea %pc@(L(mac_dimensions)),%a1
650 get_bi_record BI_MAC_VROW
651 lea %pc@(L(mac_rowbytes)),%a1
655 get_bi_record BI_MAC_SCCBASE
656 lea %pc@(L(mac_sccbase)),%a1
664 lea %pc@(L(mac_videobase)),%a0
666 lea %pc@(L(mac_dimensions)),%a0
668 swap %d1 /* #rows is high bytes */
669 andl #0xFFFF,%d1 /* rows */
671 lea %pc@(L(mac_rowbytes)),%a0
682 #endif /* CONFIG_MAC */
686 * There are ultimately two pieces of information we want for all kinds of
687 * processors CpuType and CacheBits. The CPUTYPE was passed in from booter
688 * and is converted here from a booter type definition to a separate bit
689 * number which allows for the standard is_0x0 macro tests.
691 movel %pc@(m68k_cputype),%d0
698 * Test the BootInfo cputype for 060
702 bset #CPUTYPE_060,%d1
703 bset #CPUTYPE_0460,%d1
707 * Test the BootInfo cputype for 040
711 bset #CPUTYPE_040,%d1
712 bset #CPUTYPE_0460,%d1
716 * Test the BootInfo cputype for 020
720 bset #CPUTYPE_020,%d1
724 * Record the cpu type
726 lea %pc@(L(cputype)),%a0
732 * Now the macros are valid:
741 * Determine the cache mode for pages holding MMU tables
742 * and for supervisor mode, unused for '020 and '030
747 is_not_040_or_060(L(save_cachetype))
751 * d1 := cacheable write-through
752 * NOTE: The 68040 manual strongly recommends non-cached for MMU tables,
753 * but we have been using write-through since at least 2.0.29 so I
756 #ifdef CONFIG_060_WRITETHROUGH
758 * If this is a 68060 board using drivers with cache coherency
759 * problems, then supervisor memory accesses need to be write-through
760 * also; otherwise, we want copyback.
764 movel #_PAGE_CACHE040W,%d0
765 jra L(save_cachetype)
766 #endif /* CONFIG_060_WRITETHROUGH */
768 movew #_PAGE_CACHE040,%d0
770 movel #_PAGE_CACHE040W,%d1
773 /* Save cache mode for supervisor mode and page tables
775 lea %pc@(m68k_supervisor_cachemode),%a0
777 lea %pc@(m68k_pgtable_cachemode),%a0
781 * raise interrupt level
786 If running on an Atari, determine the I/O base of the
787 serial port and test if we are running on a Medusa or Hades.
788 This test is necessary here, because on the Hades the serial
789 port is only accessible in the high I/O memory area.
791 The test whether it is a Medusa is done by writing to the byte at
792 phys. 0x0. This should result in a bus error on all other machines.
794 ...should, but doesn't. The Afterburner040 for the Falcon has the
795 same behaviour (0x0..0x7 are no ROM shadow). So we have to do
796 another test to distinguish Medusa and AB040. This is a
797 read attempt for 0x00ff82fe phys. that should bus error on a Falcon
798 (+AB040), but is in the range where the Medusa always asserts DTACK.
800 The test for the Hades is done by reading address 0xb0000000. This
801 should give a bus error on the Medusa.
805 is_not_atari(L(notypetest))
807 /* get special machine type (Medusa/Hades/AB40) */
808 moveq #0,%d3 /* default if tag doesn't exist */
809 get_bi_record BI_ATARI_MCH_TYPE
813 lea %pc@(atari_mch_type),%a0
816 /* On the Hades, the iobase must be set up before opening the
817 * serial port. There are no I/O regs at 0x00ffxxxx at all. */
819 cmpl #ATARI_MACH_HADES,%d3
821 movel #0xff000000,%d0 /* Hades I/O base addr: 0xff000000 */
822 1: lea %pc@(L(iobase)),%a0
829 is_mvme147(L(getvmetype))
830 is_bvme6000(L(getvmetype))
831 is_not_mvme16x(L(gvtdone))
833 /* See if the loader has specified the BI_VME_TYPE tag. Recent
834 * versions of VMELILO and TFTPLILO do this. We have to do this
835 * early so we know how to handle console output. If the tag
836 * doesn't exist then we use the Bug for output on MVME16x.
839 get_bi_record BI_VME_TYPE
843 lea %pc@(vme_brdtype),%a0
846 #ifdef CONFIG_MVME16x
847 is_not_mvme16x(L(gvtdone))
849 /* Need to get the BRD_ID info to differentiate between 162, 167,
850 * etc. This is available as a BI_VME_BRDINFO tag with later
851 * versions of VMELILO and TFTPLILO, otherwise we call the Bug.
853 get_bi_record BI_VME_BRDINFO
857 /* Get pointer to board ID data from Bug */
860 .word 0x70 /* trap 0x70 - .BRD_ID */
863 lea %pc@(mvme_bdid),%a1
864 /* Structure is 32 bytes long */
880 is_not_hp300(L(nothp))
882 /* Get the address of the UART for serial debugging */
883 get_bi_record BI_HP300_UART_ADDR
887 lea %pc@(L(uartbase)),%a0
889 get_bi_record BI_HP300_UART_SCODE
893 lea %pc@(L(uart_scode)),%a0
900 * Initialize serial port
913 # endif /* CONFIG_LOGO */
915 # endif /* CONSOLE */
917 #endif /* CONFIG_MAC */
923 dputn %pc@(L(cputype))
924 dputn %pc@(m68k_supervisor_cachemode)
925 dputn %pc@(m68k_pgtable_cachemode)
929 * Save physical start address of kernel
931 lea %pc@(L(phys_kernel_start)),%a0
934 addl #PAGE_OFFSET,%a1
944 * This block of code does what's necessary to map in the various kinds
945 * of machines for execution of Linux.
946 * First map the first 4 MB of kernel code & data
949 mmu_map #PAGE_OFFSET,%pc@(L(phys_kernel_start)),#4*1024*1024,\
950 %pc@(m68k_supervisor_cachemode)
958 is_not_amiga(L(mmu_init_not_amiga))
965 is_not_040_or_060(1f)
968 * 040: Map the 16Meg range physical 0x0 up to logical 0x8000.0000
970 mmu_map #0x80000000,#0,#0x01000000,#_PAGE_NOCACHE_S
972 * Map the Zorro III I/O space with transparent translation
973 * for frame buffer memory etc.
975 mmu_map_tt #1,#0x40000000,#0x20000000,#_PAGE_NOCACHE_S
977 jbra L(mmu_init_done)
981 * 030: Map the 32Meg range physical 0x0 up to logical 0x8000.0000
983 mmu_map #0x80000000,#0,#0x02000000,#_PAGE_NOCACHE030
984 mmu_map_tt #1,#0x40000000,#0x20000000,#_PAGE_NOCACHE030
986 jbra L(mmu_init_done)
988 L(mmu_init_not_amiga):
995 is_not_atari(L(mmu_init_not_atari))
999 /* On the Atari, we map the I/O region (phys. 0x00ffxxxx) by mapping
1000 the last 16 MB of virtual address space to the first 16 MB (i.e.
1001 0xffxxxxxx -> 0x00xxxxxx). For this, an additional pointer table is
1002 needed. I/O ranges are marked non-cachable.
1004 For the Medusa it is better to map the I/O region transparently
1005 (i.e. 0xffxxxxxx -> 0xffxxxxxx), because some I/O registers are
1006 accessible only in the high area.
1008 On the Hades all I/O registers are only accessible in the high
1012 /* I/O base addr for non-Medusa, non-Hades: 0x00000000 */
1014 movel %pc@(atari_mch_type),%d3
1015 cmpl #ATARI_MACH_MEDUSA,%d3
1017 cmpl #ATARI_MACH_HADES,%d3
1019 2: movel #0xff000000,%d0 /* Medusa/Hades base addr: 0xff000000 */
1022 is_040_or_060(L(spata68040))
1024 /* Map everything non-cacheable, though not all parts really
1025 * need to disable caches (crucial only for 0xff8000..0xffffff
1026 * (standard I/O) and 0xf00000..0xf3ffff (IDE)). The remainder
1027 * isn't really used, except for sometimes peeking into the
1028 * ROMs (mirror at phys. 0x0), so caching isn't necessary for
1030 mmu_map #0xff000000,%d3,#0x01000000,#_PAGE_NOCACHE030
1032 jbra L(mmu_init_done)
1036 mmu_map #0xff000000,%d3,#0x01000000,#_PAGE_NOCACHE_S
1038 jbra L(mmu_init_done)
1040 L(mmu_init_not_atari):
1044 is_not_q40(L(notq40))
1046 * add transparent mapping for 0xff00 0000 - 0xffff ffff
1047 * non-cached serialized etc..
1048 * this includes master chip, DAC, RTC and ISA ports
1049 * 0xfe000000-0xfeffffff is for screen and ROM
1054 mmu_map_tt #0,#0xfe000000,#0x01000000,#_PAGE_CACHE040W
1055 mmu_map_tt #1,#0xff000000,#0x01000000,#_PAGE_NOCACHE_S
1057 jbra L(mmu_init_done)
1063 is_not_hp300(L(nothp300))
1065 /* On the HP300, we map the ROM, INTIO and DIO regions (phys. 0x00xxxxxx)
1066 * by mapping 32MB (on 020/030) or 16 MB (on 040) from 0xf0xxxxxx -> 0x00xxxxxx).
1067 * The ROM mapping is needed because the LEDs are mapped there too.
1073 * 030: Map the 32Meg range physical 0x0 up to logical 0xf000.0000
1075 mmu_map #0xf0000000,#0,#0x02000000,#_PAGE_NOCACHE030
1077 jbra L(mmu_init_done)
1081 * 040: Map the 16Meg range physical 0x0 up to logical 0xf000.0000
1083 mmu_map #0xf0000000,#0,#0x01000000,#_PAGE_NOCACHE_S
1085 jbra L(mmu_init_done)
1088 #endif /* CONFIG_HP300 */
1090 #ifdef CONFIG_MVME147
1092 is_not_mvme147(L(not147))
1095 * On MVME147 we have already created kernel page tables for
1096 * 4MB of RAM at address 0, so now need to do a transparent
1097 * mapping of the top of memory space. Make it 0.5GByte for now,
1098 * so we can access on-board i/o areas.
1101 mmu_map_tt #1,#0xe0000000,#0x20000000,#_PAGE_NOCACHE030
1103 jbra L(mmu_init_done)
1106 #endif /* CONFIG_MVME147 */
1108 #ifdef CONFIG_MVME16x
1110 is_not_mvme16x(L(not16x))
1113 * On MVME16x we have already created kernel page tables for
1114 * 4MB of RAM at address 0, so now need to do a transparent
1115 * mapping of the top of memory space. Make it 0.5GByte for now.
1116 * Supervisor only access, so transparent mapping doesn't
1117 * clash with User code virtual address space.
1118 * this covers IO devices, PROM and SRAM. The PROM and SRAM
1119 * mapping is needed to allow 167Bug to run.
1120 * IO is in the range 0xfff00000 to 0xfffeffff.
1121 * PROM is 0xff800000->0xffbfffff and SRAM is
1122 * 0xffe00000->0xffe1ffff.
1125 mmu_map_tt #1,#0xe0000000,#0x20000000,#_PAGE_NOCACHE_S
1127 jbra L(mmu_init_done)
1130 #endif /* CONFIG_MVME162 | CONFIG_MVME167 */
1132 #ifdef CONFIG_BVME6000
1134 is_not_bvme6000(L(not6000))
1137 * On BVME6000 we have already created kernel page tables for
1138 * 4MB of RAM at address 0, so now need to do a transparent
1139 * mapping of the top of memory space. Make it 0.5GByte for now,
1140 * so we can access on-board i/o areas.
1141 * Supervisor only access, so transparent mapping doesn't
1142 * clash with User code virtual address space.
1145 mmu_map_tt #1,#0xe0000000,#0x20000000,#_PAGE_NOCACHE_S
1147 jbra L(mmu_init_done)
1150 #endif /* CONFIG_BVME6000 */
1155 * The Macintosh mappings are less clear.
1157 * Even as of this writing, it is unclear how the
1158 * Macintosh mappings will be done. However, as
1159 * the first author of this code I'm proposing the
1162 * Map the kernel (that's already done),
1163 * Map the I/O (on most machines that's the
1164 * 0x5000.0000 ... 0x5300.0000 range,
1165 * Map the video frame buffer using as few pages
1166 * as absolutely (this requirement mostly stems from
1167 * the fact that when the frame buffer is at
1168 * 0x0000.0000 then we know there is valid RAM just
1169 * above the screen that we don't want to waste!).
1171 * By the way, if the frame buffer is at 0x0000.0000
1172 * then the Macintosh is known as an RBV based Mac.
1174 * By the way 2, the code currently maps in a bunch of
1175 * regions. But I'd like to cut that out. (And move most
1176 * of the mappings up into the kernel proper ... or only
1177 * map what's necessary.)
1184 is_not_mac(L(mmu_init_not_mac))
1188 is_not_040_or_060(1f)
1190 moveq #_PAGE_NOCACHE_S,%d3
1193 moveq #_PAGE_NOCACHE030,%d3
1196 * Mac Note: screen address of logical 0xF000.0000 -> <screen physical>
1197 * we simply map the 4MB that contains the videomem
1200 movel #VIDEOMEMMASK,%d0
1201 andl %pc@(L(mac_videobase)),%d0
1203 mmu_map #VIDEOMEMBASE,%d0,#VIDEOMEMSIZE,%d3
1204 /* ROM from 4000 0000 to 4200 0000 (only for mac_reset()) */
1205 mmu_map_eq #0x40000000,#0x02000000,%d3
1206 /* IO devices (incl. serial port) from 5000 0000 to 5300 0000 */
1207 mmu_map_eq #0x50000000,#0x03000000,%d3
1208 /* Nubus slot space (video at 0xF0000000, rom at 0xF0F80000) */
1209 mmu_map_tt #1,#0xf8000000,#0x08000000,%d3
1211 jbra L(mmu_init_done)
1213 L(mmu_init_not_mac):
1217 is_not_sun3x(L(notsun3x))
1219 /* oh, the pain.. We're gonna want the prom code after
1220 * starting the MMU, so we copy the mappings, translating
1221 * from 8k -> 4k pages as we go.
1224 /* copy maps from 0xfee00000 to 0xff000000 */
1225 movel #0xfee00000, %d0
1226 moveq #ROOT_INDEX_SHIFT, %d1
1228 mmu_get_root_table_entry %d0
1230 movel #0xfee00000, %d0
1231 moveq #PTR_INDEX_SHIFT, %d1
1233 andl #PTR_TABLE_SIZE-1, %d0
1234 mmu_get_ptr_table_entry %a0,%d0
1236 movel #0xfee00000, %d0
1237 moveq #PAGE_INDEX_SHIFT, %d1
1239 andl #PAGE_TABLE_SIZE-1, %d0
1240 mmu_get_page_table_entry %a0,%d0
1242 /* this is where the prom page table lives */
1243 movel 0xfefe00d4, %a1
1246 movel #((0x200000 >> 13)-1), %d1
1256 /* setup tt1 for I/O */
1257 mmu_map_tt #1,#0x40000000,#0x40000000,#_PAGE_NOCACHE_S
1258 jbra L(mmu_init_done)
1263 #ifdef CONFIG_APOLLO
1264 is_not_apollo(L(notapollo))
1267 mmu_map #0x80000000,#0,#0x02000000,#_PAGE_NOCACHE030
1270 jbra L(mmu_init_done)
1281 * On the 040 class machines, all pages that are used for the
1282 * mmu have to be fixed up. According to Motorola, pages holding mmu
1283 * tables should be non-cacheable on a '040 and write-through on a
1284 * '060. But analysis of the reasons for this, and practical
1285 * experience, showed that write-through also works on a '040.
1287 * Allocated memory so far goes from kernel_end to memory_start that
1288 * is used for all kind of tables, for that the cache attributes
1293 is_not_040_or_060(L(mmu_fixup_done))
1295 #ifdef MMU_NOCACHE_KERNEL
1296 jbra L(mmu_fixup_done)
1299 /* first fix the page at the start of the kernel, that
1300 * contains also kernel_pg_dir.
1302 movel %pc@(L(phys_kernel_start)),%d0
1303 subl #PAGE_OFFSET,%d0
1304 lea %pc@(_stext),%a0
1306 mmu_fixup_page_mmu_cache %a0
1308 movel %pc@(L(kernel_end)),%a0
1310 movel %pc@(L(memory_start)),%a1
1314 mmu_fixup_page_mmu_cache %a0
1329 * This chunk of code performs the gruesome task of engaging the MMU.
1330 * The reason its gruesome is because when the MMU becomes engaged it
1331 * maps logical addresses to physical addresses. The Program Counter
1332 * register is then passed through the MMU before the next instruction
1333 * is fetched (the instruction following the engage MMU instruction).
1334 * This may mean one of two things:
1335 * 1. The Program Counter falls within the logical address space of
1336 * the kernel of which there are two sub-possibilities:
1337 * A. The PC maps to the correct instruction (logical PC == physical
1338 * code location), or
1339 * B. The PC does not map through and the processor will read some
1340 * data (or instruction) which is not the logically next instr.
1341 * As you can imagine, A is good and B is bad.
1343 * 2. The Program Counter does not map through the MMU. The processor
1344 * will take a Bus Error.
1345 * Clearly, 2 is bad.
1346 * It doesn't take a wiz kid to figure you want 1.A.
1347 * This code creates that possibility.
1348 * There are two possible 1.A. states (we now ignore the other above states):
1349 * A. The kernel is located at physical memory addressed the same as
1350 * the logical memory for the kernel, i.e., 0x01000.
1351 * B. The kernel is located some where else. e.g., 0x0400.0000
1353 * Under some conditions the Macintosh can look like A or B.
1354 * [A friend and I once noted that Apple hardware engineers should be
1355 * wacked twice each day: once when they show up at work (as in, Whack!,
1356 * "This is for the screwy hardware we know you're going to design today."),
1357 * and also at the end of the day (as in, Whack! "I don't know what
1358 * you designed today, but I'm sure it wasn't good."). -- rst]
1360 * This code works on the following premise:
1361 * If the kernel start (%d5) is within the first 16 Meg of RAM,
1362 * then create a mapping for the kernel at logical 0x8000.0000 to
1363 * the physical location of the pc. And, create a transparent
1364 * translation register for the first 16 Meg. Then, after the MMU
1365 * is engaged, the PC can be moved up into the 0x8000.0000 range
1366 * and then the transparent translation can be turned off and then
1367 * the PC can jump to the correct logical location and it will be
1368 * home (finally). This is essentially the code that the Amiga used
1369 * to use. Now, it's generalized for all processors. Which means
1370 * that a fresh (but temporary) mapping has to be created. The mapping
1371 * is made in page 0 (an as of yet unused location -- except for the
1372 * stack!). This temporary mapping will only require 1 pointer table
1373 * and a single page table (it can map 256K).
1375 * OK, alternatively, imagine that the Program Counter is not within
1376 * the first 16 Meg. Then, just use Transparent Translation registers
1377 * to do the right thing.
1379 * Last, if _start is already at 0x01000, then there's nothing special
1380 * to do (in other words, in a degenerate case of the first case above,
1393 * After this point no new memory is allocated and
1394 * the start of available memory is stored in availmem.
1395 * (The bootmem allocator requires now the physicall address.)
1398 movel L(memory_start),availmem
1402 /* fixup the Amiga custom register location before printing */
1409 /* fixup the Atari iobase register location before printing */
1410 movel #0xff000000,L(iobase)
1416 movel #~VIDEOMEMMASK,%d0
1417 andl L(mac_videobase),%d0
1418 addl #VIDEOMEMBASE,%d0
1419 movel %d0,L(mac_videobase)
1420 #if defined(CONSOLE)
1421 movel %pc@(L(phys_kernel_start)),%d0
1422 subl #PAGE_OFFSET,%d0
1423 subl %d0,L(console_font)
1424 subl %d0,L(console_font_data)
1427 orl #0x50000000,L(mac_sccbase)
1435 * Fix up the iobase register to point to the new location of the LEDs.
1437 movel #0xf0000000,L(iobase)
1440 * Energise the FPU and caches.
1443 movel #0x60,0xf05f400c
1447 * 040: slightly different, apparently.
1449 1: movew #0,0xf05f400e
1450 movew #0x64,0xf05f400e
1458 oriw #0x4000,0x61000000
1462 #ifdef CONFIG_APOLLO
1466 * Fix up the iobase before printing
1468 movel #0x80000000,L(iobase)
1479 is_not_040_or_060(L(cache_not_680460))
1487 is_060(L(cache68060))
1489 movel #CC6_ENABLE_D+CC6_ENABLE_I,%d0
1490 /* MMU stuff works in copyback mode now, so enable the cache */
1495 movel #CC6_ENABLE_D+CC6_ENABLE_I+CC6_ENABLE_SB+CC6_PUSH_DPI+CC6_ENABLE_B+CC6_CLRA_B,%d0
1496 /* MMU stuff works in copyback mode now, so enable the cache */
1498 /* enable superscalar dispatch in PCR */
1504 L(cache_not_680460):
1507 movel #CC3_ENABLE_DB+CC3_CLR_D+CC3_ENABLE_D+CC3_ENABLE_IB+CC3_CLR_I+CC3_ENABLE_I,%d0
1517 * Setup initial stack pointer
1519 lea init_task,%curptr
1520 lea init_thread_union+THREAD_SIZE,%sp
1524 subl %a6,%a6 /* clear a6 for gdb */
1527 * The new 64bit printf support requires an early exception initialization.
1531 /* jump to the kernel start */
1539 * Find a tag record in the bootinfo structure
1540 * The bootinfo structure is located right after the kernel
1541 * Returns: d0: size (-1 if not found)
1542 * a0: data pointer (end-of-records if not found)
1544 func_start get_bi_record,%d1
1548 1: tstw %a0@(BIR_TAG)
1550 cmpw %a0@(BIR_TAG),%d0
1552 addw %a0@(BIR_SIZE),%a0
1555 movew %a0@(BIR_SIZE),%d0
1556 lea %a0@(BIR_DATA),%a0
1559 lea %a0@(BIR_SIZE),%a0
1561 func_return get_bi_record
1565 * MMU Initialization Begins Here
1567 * The structure of the MMU tables on the 68k machines
1570 * Logical addresses are translated through
1571 * a hierarchical translation mechanism where the high-order
1572 * seven bits of the logical address (LA) are used as an
1573 * index into the "root table." Each entry in the root
1574 * table has a bit which specifies if it's a valid pointer to a
1575 * pointer table. Each entry defines a 32KMeg range of memory.
1576 * If an entry is invalid then that logical range of 32M is
1577 * invalid and references to that range of memory (when the MMU
1578 * is enabled) will fault. If the entry is valid, then it does
1579 * one of two things. On 040/060 class machines, it points to
1580 * a pointer table which then describes more finely the memory
1581 * within that 32M range. On 020/030 class machines, a technique
1582 * called "early terminating descriptors" are used. This technique
1583 * allows an entire 32Meg to be described by a single entry in the
1584 * root table. Thus, this entry in the root table, contains the
1585 * physical address of the memory or I/O at the logical address
1586 * which the entry represents and it also contains the necessary
1587 * cache bits for this region.
1590 * Per the Root Table, there will be one or more
1591 * pointer tables. Each pointer table defines a 32M range.
1592 * Not all of the 32M range need be defined. Again, the next
1593 * seven bits of the logical address are used an index into
1594 * the pointer table to point to page tables (if the pointer
1595 * is valid). There will undoubtedly be more than one
1596 * pointer table for the kernel because each pointer table
1597 * defines a range of only 32M. Valid pointer table entries
1598 * point to page tables, or are early terminating entries
1602 * Per the Pointer Tables, each page table entry points
1603 * to the physical page in memory that supports the logical
1604 * address that translates to the particular index.
1606 * In short, the Logical Address gets translated as follows:
1607 * bits 31..26 - index into the Root Table
1608 * bits 25..18 - index into the Pointer Table
1609 * bits 17..12 - index into the Page Table
1610 * bits 11..0 - offset into a particular 4K page
1612 * The algorithms which follows do one thing: they abstract
1613 * the MMU hardware. For example, there are three kinds of
1614 * cache settings that are relevant. Either, memory is
1615 * being mapped in which case it is either Kernel Code (or
1616 * the RamDisk) or it is MMU data. On the 030, the MMU data
1617 * option also describes the kernel. Or, I/O is being mapped
1618 * in which case it has its own kind of cache bits. There
1619 * are constants which abstract these notions from the code that
1620 * actually makes the call to map some range of memory.
1630 * This algorithm will print out the current MMU mappings.
1633 * %a5 points to the root table. Everything else is calculated
1637 #define mmu_next_valid 0
1638 #define mmu_start_logical 4
1639 #define mmu_next_logical 8
1640 #define mmu_start_physical 12
1641 #define mmu_next_physical 16
1643 #define MMU_PRINT_INVALID -1
1644 #define MMU_PRINT_VALID 1
1645 #define MMU_PRINT_UNINITED 0
1647 #define putZc(z,n) jbne 1f; putc z; jbra 2f; 1: putc n; 2:
1649 func_start mmu_print,%a0-%a6/%d0-%d7
1651 movel %pc@(L(kernel_pgdir_ptr)),%a5
1652 lea %pc@(L(mmu_print_data)),%a0
1653 movel #MMU_PRINT_UNINITED,%a0@(mmu_next_valid)
1655 is_not_040_or_060(mmu_030_print)
1664 * The following #if/#endif block is a tight algorithm for dumping the 040
1665 * MMU Map in gory detail. It really isn't that practical unless the
1666 * MMU Map algorithm appears to go awry and you need to debug it at the
1667 * entry per entry level.
1669 movel #ROOT_TABLE_SIZE,%d5
1671 movel %a5@+,%d7 | Burn an entry to skip the kernel mappings,
1672 subql #1,%d5 | they (might) work
1682 andil #0xFFFFFE00,%d7
1684 movel #PTR_TABLE_SIZE,%d4
1694 andil #0xFFFFFF00,%d7
1696 movel #PAGE_TABLE_SIZE,%d3
1710 movel #8+1+8+1+1,%d2
1725 #endif /* MMU 040 Dumping code that's gory and detailed */
1727 lea %pc@(kernel_pg_dir),%a5
1728 movel %a5,%a0 /* a0 has the address of the root table ptr */
1729 movel #0x00000000,%a4 /* logical address */
1732 /* Increment the logical address and preserve in d5 */
1734 addil #PAGESIZE<<13,%d5
1738 jbsr mmu_print_tuple_invalidate
1742 andil #0xfffffe00,%d6
1746 addil #PAGESIZE<<6,%d5
1750 jbsr mmu_print_tuple_invalidate
1754 andil #0xffffff00,%d6
1762 jbsr mmu_print_tuple_invalidate
1765 moveml %d0-%d1,%sp@-
1768 andil #0xfffff4e0,%d1
1769 lea %pc@(mmu_040_print_flags),%a6
1770 jbsr mmu_print_tuple
1771 moveml %sp@+,%d0-%d1
1783 movel %d5,%a4 /* move to the next logical address */
1791 andiw #0x8000,%d1 /* is it valid ? */
1792 jbeq 1f /* No, bail out */
1795 andil #0xff000000,%d1 /* Get the address */
1801 jbsr mmu_040_print_flags_tt
1805 andiw #0x8000,%d1 /* is it valid ? */
1806 jbeq 1f /* No, bail out */
1809 andil #0xff000000,%d1 /* Get the address */
1815 jbsr mmu_040_print_flags_tt
1821 mmu_040_print_flags:
1823 putZc(' ','G') /* global bit */
1825 putZc(' ','S') /* supervisor bit */
1826 mmu_040_print_flags_tt:
1831 putZc('w','c') /* write through or copy-back */
1836 putZc('s',' ') /* serialized non-cacheable, or non-cacheable */
1840 mmu_030_print_flags:
1842 putZc('C','I') /* write through or copy-back */
1851 andil #0xfffffff0,%d0
1853 movel #0x00000000,%a4 /* logical address */
1857 addil #PAGESIZE<<13,%d5
1859 btst #1,%d6 /* is it a table ptr? */
1861 btst #0,%d6 /* is it early terminating? */
1863 jbsr mmu_030_print_helper
1866 jbsr mmu_print_tuple_invalidate
1870 andil #0xfffffff0,%d6
1874 addil #PAGESIZE<<6,%d5
1876 btst #1,%d6 /* is it a table ptr? */
1878 btst #0,%d6 /* is it a page descriptor? */
1880 jbsr mmu_030_print_helper
1883 jbsr mmu_print_tuple_invalidate
1887 andil #0xfffffff0,%d6
1895 jbsr mmu_print_tuple_invalidate
1898 jbsr mmu_030_print_helper
1910 movel %d5,%a4 /* move to the next logical address */
1918 func_return mmu_print
1921 mmu_030_print_helper:
1922 moveml %d0-%d1,%sp@-
1925 lea %pc@(mmu_030_print_flags),%a6
1926 jbsr mmu_print_tuple
1927 moveml %sp@+,%d0-%d1
1930 mmu_print_tuple_invalidate:
1931 moveml %a0/%d7,%sp@-
1933 lea %pc@(L(mmu_print_data)),%a0
1934 tstl %a0@(mmu_next_valid)
1935 jbmi mmu_print_tuple_invalidate_exit
1937 movel #MMU_PRINT_INVALID,%a0@(mmu_next_valid)
1943 mmu_print_tuple_invalidate_exit:
1944 moveml %sp@+,%a0/%d7
1949 moveml %d0-%d7/%a0,%sp@-
1951 lea %pc@(L(mmu_print_data)),%a0
1953 tstl %a0@(mmu_next_valid)
1954 jble mmu_print_tuple_print
1956 cmpl %a0@(mmu_next_physical),%d1
1957 jbeq mmu_print_tuple_increment
1959 mmu_print_tuple_print:
1967 mmu_print_tuple_record:
1968 movel #MMU_PRINT_VALID,%a0@(mmu_next_valid)
1970 movel %d1,%a0@(mmu_next_physical)
1972 mmu_print_tuple_increment:
1975 addl %d7,%a0@(mmu_next_physical)
1977 mmu_print_tuple_exit:
1978 moveml %sp@+,%d0-%d7/%a0
1981 mmu_print_machine_cpu_types:
2003 is_not_040_or_060(2f)
2011 #endif /* MMU_PRINT */
2016 * This is a specific function which works on all 680x0 machines.
2017 * On 030, 040 & 060 it will attempt to use Transparent Translation
2019 * On 020 it will call the standard mmu_map which will use early
2020 * terminating descriptors.
2022 func_start mmu_map_tt,%d0/%d1/%a0,4
2033 /* Extract the highest bit set
2035 bfffo ARG3{#0,#32},%d1
2051 /* Generate the upper 16bit of the tt register
2057 is_040_or_060(L(mmu_map_tt_040))
2059 /* set 030 specific bits (read/write access for supervisor mode
2060 * (highest function code set, lower two bits masked))
2062 orw #TTR_ENABLE+TTR_RWM+TTR_FCB2+TTR_FCM1+TTR_FCM0,%d1
2078 jra L(mmu_map_tt_done)
2080 /* set 040 specific bits
2083 orw #TTR_ENABLE+TTR_KERNELMODE,%d1
2097 jra L(mmu_map_tt_done)
2100 mmu_map_eq ARG2,ARG3,ARG4
2104 func_return mmu_map_tt
2109 * This routine will map a range of memory using a pointer
2110 * table and allocating the pages on the fly from the kernel.
2111 * The pointer table does not have to be already linked into
2112 * the root table, this routine will do that if necessary.
2115 * This routine will assert failure and use the serial_putc
2116 * routines in the case of a run-time error. For example,
2117 * if the address is already mapped.
2120 * This routine will use early terminating descriptors
2121 * where possible for the 68020+68851 and 68030 type
2124 func_start mmu_map,%d0-%d4/%a0-%a4
2133 /* Get logical address and round it down to 256KB
2136 andl #-(PAGESIZE*PAGE_TABLE_SIZE),%d0
2139 /* Get the end address
2145 /* Get physical address and round it down to 256KB
2148 andl #-(PAGESIZE*PAGE_TABLE_SIZE),%d0
2151 /* Add page attributes to the physical address
2154 orw #_PAGE_PRESENT+_PAGE_ACCESSED+_PAGE_DIRTY,%d0
2161 is_not_040_or_060(L(mmu_map_030))
2163 addw #_PAGE_GLOBAL040,%a2
2165 * MMU 040 & 060 Support
2167 * The MMU usage for the 040 and 060 is different enough from
2168 * the 030 and 68851 that there is separate code. This comment
2169 * block describes the data structures and algorithms built by
2172 * The 040 does not support early terminating descriptors, as
2173 * the 030 does. Therefore, a third level of table is needed
2174 * for the 040, and that would be the page table. In Linux,
2175 * page tables are allocated directly from the memory above the
2181 /* Calculate the offset into the root table
2184 moveq #ROOT_INDEX_SHIFT,%d1
2186 mmu_get_root_table_entry %d0
2188 /* Calculate the offset into the pointer table
2191 moveq #PTR_INDEX_SHIFT,%d1
2193 andl #PTR_TABLE_SIZE-1,%d0
2194 mmu_get_ptr_table_entry %a0,%d0
2196 /* Calculate the offset into the page table
2199 moveq #PAGE_INDEX_SHIFT,%d1
2201 andl #PAGE_TABLE_SIZE-1,%d0
2202 mmu_get_page_table_entry %a0,%d0
2204 /* The page table entry must not no be busy
2207 jne L(mmu_map_error)
2209 /* Do the mapping and advance the pointers
2216 /* Ready with mapping?
2224 /* Calculate the offset into the root table
2227 moveq #ROOT_INDEX_SHIFT,%d1
2229 mmu_get_root_table_entry %d0
2231 /* Check if logical address 32MB aligned,
2232 * so we can try to map it once
2235 andl #(PTR_TABLE_SIZE*PAGE_TABLE_SIZE*PAGESIZE-1)&(-ROOT_TABLE_SIZE),%d0
2238 /* Is there enough to map for 32MB at once
2240 lea %a3@(PTR_TABLE_SIZE*PAGE_TABLE_SIZE*PAGESIZE-1),%a1
2246 /* The root table entry must not no be busy
2249 jne L(mmu_map_error)
2251 /* Do the mapping and advance the pointers
2261 lea %a2@(PTR_TABLE_SIZE*PAGE_TABLE_SIZE*PAGESIZE),%a2
2262 jra L(mmu_mapnext_030)
2264 /* Calculate the offset into the pointer table
2267 moveq #PTR_INDEX_SHIFT,%d1
2269 andl #PTR_TABLE_SIZE-1,%d0
2270 mmu_get_ptr_table_entry %a0,%d0
2272 /* The pointer table entry must not no be busy
2275 jne L(mmu_map_error)
2277 /* Do the mapping and advance the pointers
2285 addl #PAGE_TABLE_SIZE*PAGESIZE,%a2
2286 addl #PAGE_TABLE_SIZE*PAGESIZE,%a3
2289 /* Ready with mapping?
2298 dputs "mmu_map error:"
2310 * On the 040 class machines, all pages that are used for the
2311 * mmu have to be fixed up.
2314 func_start mmu_fixup_page_mmu_cache,%d0/%a0
2316 dputs "mmu_fixup_page_mmu_cache"
2319 /* Calculate the offset into the root table
2322 moveq #ROOT_INDEX_SHIFT,%d1
2324 mmu_get_root_table_entry %d0
2326 /* Calculate the offset into the pointer table
2329 moveq #PTR_INDEX_SHIFT,%d1
2331 andl #PTR_TABLE_SIZE-1,%d0
2332 mmu_get_ptr_table_entry %a0,%d0
2334 /* Calculate the offset into the page table
2337 moveq #PAGE_INDEX_SHIFT,%d1
2339 andl #PAGE_TABLE_SIZE-1,%d0
2340 mmu_get_page_table_entry %a0,%d0
2343 andil #_CACHEMASK040,%d0
2344 orl %pc@(m68k_pgtable_cachemode),%d0
2349 func_return mmu_fixup_page_mmu_cache
2354 * create a temporary mapping to enable the mmu,
2355 * this we don't need any transparation translation tricks.
2358 func_start mmu_temp_map,%d0/%d1/%a0/%a1
2360 dputs "mmu_temp_map"
2365 lea %pc@(L(temp_mmap_mem)),%a1
2367 /* Calculate the offset in the root table
2370 moveq #ROOT_INDEX_SHIFT,%d1
2372 mmu_get_root_table_entry %d0
2374 /* Check if the table is temporary allocated, so we have to reuse it
2377 cmpl %pc@(L(memory_start)),%d0
2380 /* Temporary allocate a ptr table and insert it into the root table
2383 addl #PTR_TABLE_SIZE*4,%a1@
2384 orw #_PAGE_TABLE+_PAGE_ACCESSED,%d0
2389 /* Mask the root table entry for the ptr table
2391 andw #-ROOT_TABLE_SIZE,%d0
2394 /* Calculate the offset into the pointer table
2397 moveq #PTR_INDEX_SHIFT,%d1
2399 andl #PTR_TABLE_SIZE-1,%d0
2403 /* Check if a temporary page table is already allocated
2408 /* Temporary allocate a page table and insert it into the ptr table
2411 /* The 512 should be PAGE_TABLE_SIZE*4, but that violates the
2412 alignment restriction for pointer tables on the '0[46]0. */
2414 orw #_PAGE_TABLE+_PAGE_ACCESSED,%d0
2419 /* Mask the ptr table entry for the page table
2421 andw #-PTR_TABLE_SIZE,%d0
2424 /* Calculate the offset into the page table
2427 moveq #PAGE_INDEX_SHIFT,%d1
2429 andl #PAGE_TABLE_SIZE-1,%d0
2433 /* Insert the address into the page table
2437 orw #_PAGE_PRESENT+_PAGE_ACCESSED+_PAGE_DIRTY,%d0
2443 func_return mmu_temp_map
2445 func_start mmu_engage,%d0-%d2/%a0-%a3
2447 moveq #ROOT_TABLE_SIZE-1,%d0
2448 /* Temporarily use a different root table. */
2449 lea %pc@(L(kernel_pgdir_ptr)),%a0
2451 movel %pc@(L(memory_start)),%a1
2458 lea %pc@(L(temp_mmap_mem)),%a0
2461 movew #PAGESIZE-1,%d0
2468 /* Skip temp mappings if phys == virt */
2472 mmu_temp_map %a0,%a0
2473 mmu_temp_map %a0,%a1
2477 mmu_temp_map %a0,%a0
2478 mmu_temp_map %a0,%a1
2480 movel %pc@(L(memory_start)),%a3
2481 movel %pc@(L(phys_kernel_start)),%d2
2483 is_not_040_or_060(L(mmu_engage_030))
2493 movel #TC_ENABLE+TC_PAGE4K,%d0
2494 movec %d0,%tc /* enable the MMU */
2503 jra L(mmu_engage_cleanup)
2505 L(mmu_engage_030_temp):
2509 lea %pc@(L(mmu_engage_030_temp)),%a0
2510 movel #0x80000002,%a0@
2517 * enable,super root enable,4096 byte pages,7 bit root index,
2518 * 7 bit pointer index, 6 bit page table index.
2520 movel #0x82c07760,%a0@(8)
2521 pmove %a0@(8),%tc /* enable the MMU */
2523 1: movel %a2,%a0@(4)
2530 L(mmu_engage_cleanup):
2531 subl #PAGE_OFFSET,%d2
2533 movel %a2,L(kernel_pgdir_ptr)
2538 func_return mmu_engage
2540 func_start mmu_get_root_table_entry,%d0/%a1
2543 dputs "mmu_get_root_table_entry:"
2548 movel %pc@(L(kernel_pgdir_ptr)),%a0
2554 /* Find the start of free memory, get_bi_record does this for us,
2555 * as the bootinfo structure is located directly behind the kernel
2556 * and and we simply search for the last entry.
2558 get_bi_record BI_LAST
2559 addw #PAGESIZE-1,%a0
2565 lea %pc@(L(memory_start)),%a0
2567 lea %pc@(L(kernel_end)),%a0
2570 /* we have to return the first page at _stext since the init code
2571 * in mm/init.c simply expects kernel_pg_dir there, the rest of
2572 * page is used for further ptr tables in get_ptr_table.
2574 lea %pc@(_stext),%a0
2575 lea %pc@(L(mmu_cached_pointer_tables)),%a1
2577 addl #ROOT_TABLE_SIZE*4,%a1@
2579 lea %pc@(L(mmu_num_pointer_tables)),%a1
2585 movew #PAGESIZE/4-1,%d0
2590 lea %pc@(L(kernel_pgdir_ptr)),%a1
2604 func_return mmu_get_root_table_entry
2608 func_start mmu_get_ptr_table_entry,%d0/%a1
2611 dputs "mmu_get_ptr_table_entry:"
2621 /* Keep track of the number of pointer tables we use
2623 dputs "\nmmu_get_new_ptr_table:"
2624 lea %pc@(L(mmu_num_pointer_tables)),%a0
2628 /* See if there is a free pointer table in our cache of pointer tables
2630 lea %pc@(L(mmu_cached_pointer_tables)),%a1
2634 /* Get a new pointer table page from above the kernel memory
2639 /* There is an unused pointer table in our cache... use it
2642 addl #PTR_TABLE_SIZE*4,%a1@
2647 /* Insert the new pointer table into the root table
2650 orw #_PAGE_TABLE+_PAGE_ACCESSED,%d0
2653 /* Extract the pointer table entry
2655 andw #-PTR_TABLE_SIZE,%d0
2665 func_return mmu_get_ptr_table_entry
2668 func_start mmu_get_page_table_entry,%d0/%a1
2671 dputs "mmu_get_page_table_entry:"
2681 /* If the page table entry doesn't exist, we allocate a complete new
2682 * page and use it as one continues big page table which can cover
2683 * 4MB of memory, nearly almost all mappings have that alignment.
2686 addw #_PAGE_TABLE+_PAGE_ACCESSED,%a0
2688 /* align pointer table entry for a page of page tables
2691 andw #-(PAGESIZE/PAGE_TABLE_SIZE),%d0
2694 /* Insert the page tables into the pointer entries
2696 moveq #PAGESIZE/PAGE_TABLE_SIZE/4-1,%d0
2699 lea %a0@(PAGE_TABLE_SIZE*4),%a0
2702 /* Now we can get the initialized pointer table entry
2707 /* Extract the page table entry
2709 andw #-PAGE_TABLE_SIZE,%d0
2719 func_return mmu_get_page_table_entry
2724 * Return a new page from the memory start and clear it.
2726 func_start get_new_page,%d0/%a1
2728 dputs "\nget_new_page:"
2730 /* allocate the page and adjust memory_start
2732 lea %pc@(L(memory_start)),%a0
2736 /* clear the new page
2739 movew #PAGESIZE/4-1,%d0
2747 func_return get_new_page
2752 * Debug output support
2753 * Atarians have a choice between the parallel port, the serial port
2754 * from the MFP or a serial port of the SCC
2759 L(scc_initable_mac):
2760 .byte 4,0x44 /* x16, 1 stopbit, no parity */
2761 .byte 3,0xc0 /* receiver: 8 bpc */
2762 .byte 5,0xe2 /* transmitter: 8 bpc, assert dtr/rts */
2763 .byte 10,0 /* NRZ */
2764 .byte 11,0x50 /* use baud rate generator */
2765 .byte 12,1,13,0 /* 38400 baud */
2766 .byte 14,1 /* Baud rate generator enable */
2767 .byte 3,0xc1 /* enable receiver */
2768 .byte 5,0xea /* enable transmitter */
2774 /* #define USE_PRINTER */
2775 /* #define USE_SCC_B */
2776 /* #define USE_SCC_A */
2779 #if defined(USE_SCC_A) || defined(USE_SCC_B)
2781 /* Initialisation table for SCC */
2783 .byte 9,12 /* Reset */
2784 .byte 4,0x44 /* x16, 1 stopbit, no parity */
2785 .byte 3,0xc0 /* receiver: 8 bpc */
2786 .byte 5,0xe2 /* transmitter: 8 bpc, assert dtr/rts */
2787 .byte 9,0 /* no interrupts */
2788 .byte 10,0 /* NRZ */
2789 .byte 11,0x50 /* use baud rate generator */
2790 .byte 12,24,13,0 /* 9600 baud */
2791 .byte 14,2,14,3 /* use master clock for BRG, enable */
2792 .byte 3,0xc1 /* enable receiver */
2793 .byte 5,0xea /* enable transmitter */
2800 LPSG_SELECT = 0xff8800
2801 LPSG_READ = 0xff8800
2802 LPSG_WRITE = 0xff8802
2806 LSTMFP_GPIP = 0xfffa01
2807 LSTMFP_DDR = 0xfffa05
2808 LSTMFP_IERB = 0xfffa09
2810 #elif defined(USE_SCC_B)
2812 LSCC_CTRL = 0xff8c85
2813 LSCC_DATA = 0xff8c87
2815 #elif defined(USE_SCC_A)
2817 LSCC_CTRL = 0xff8c81
2818 LSCC_DATA = 0xff8c83
2820 #elif defined(USE_MFP)
2823 LMFP_TDCDR = 0xfffa1d
2824 LMFP_TDDR = 0xfffa25
2829 #endif /* CONFIG_ATARI */
2832 * Serial port output support.
2836 * Initialize serial port hardware for 9600/8/1
2838 func_start serial_init,%d0/%d1/%a0/%a1
2840 * Some of the register usage that follows
2842 * a0 = pointer to boot info record
2843 * d0 = boot info offset
2845 * a0 = address of SCC
2846 * a1 = Liobase address/address of scc_initable
2847 * d0 = init data for serial port
2849 * a0 = address of SCC
2850 * a1 = address of scc_initable_mac
2851 * d0 = init data for serial port
2855 #define SERIAL_DTR 7
2856 #define SERIAL_CNTRL CIABBASE+C_PRA
2859 lea %pc@(L(custom)),%a0
2860 movel #-ZTWOBASE,%a0@
2861 bclr #SERIAL_DTR,SERIAL_CNTRL-ZTWOBASE
2862 get_bi_record BI_AMIGA_SERPER
2863 movew %a0@,CUSTOMBASE+C_SERPER-ZTWOBASE
2864 | movew #61,CUSTOMBASE+C_SERPER-ZTWOBASE
2869 movel %pc@(L(iobase)),%a1
2870 #if defined(USE_PRINTER)
2871 bclr #0,%a1@(LSTMFP_IERB)
2872 bclr #0,%a1@(LSTMFP_DDR)
2873 moveb #LPSG_CONTROL,%a1@(LPSG_SELECT)
2874 moveb #0xff,%a1@(LPSG_WRITE)
2875 moveb #LPSG_IO_B,%a1@(LPSG_SELECT)
2876 clrb %a1@(LPSG_WRITE)
2877 moveb #LPSG_IO_A,%a1@(LPSG_SELECT)
2878 moveb %a1@(LPSG_READ),%d0
2880 moveb %d0,%a1@(LPSG_WRITE)
2881 #elif defined(USE_SCC)
2882 lea %a1@(LSCC_CTRL),%a0
2883 lea %pc@(L(scc_initable)),%a1
2890 #elif defined(USE_MFP)
2891 bclr #1,%a1@(LMFP_TSR)
2892 moveb #0x88,%a1@(LMFP_UCR)
2893 andb #0x70,%a1@(LMFP_TDCDR)
2894 moveb #2,%a1@(LMFP_TDDR)
2895 orb #1,%a1@(LMFP_TDCDR)
2896 bset #1,%a1@(LMFP_TSR)
2898 jra L(serial_init_done)
2902 is_not_mac(L(serial_init_not_mac))
2906 /* You may define either or both of these. */
2907 #define MAC_USE_SCC_A /* Modem port */
2908 #define MAC_USE_SCC_B /* Printer port */
2910 #define mac_scc_cha_b_ctrl_offset 0x0
2911 #define mac_scc_cha_a_ctrl_offset 0x2
2912 #define mac_scc_cha_b_data_offset 0x4
2913 #define mac_scc_cha_a_data_offset 0x6
2915 #if defined(MAC_USE_SCC_A) || defined(MAC_USE_SCC_B)
2916 movel %pc@(L(mac_sccbase)),%a0
2917 /* Reset SCC register pointer */
2918 moveb %a0@(mac_scc_cha_a_ctrl_offset),%d0
2919 /* Reset SCC device: write register pointer then register value */
2920 moveb #9,%a0@(mac_scc_cha_a_ctrl_offset)
2921 moveb #0xc0,%a0@(mac_scc_cha_a_ctrl_offset)
2922 /* Wait for 5 PCLK cycles, which is about 68 CPU cycles */
2923 /* 5 / 3.6864 MHz = approx. 1.36 us = 68 / 50 MHz */
2930 #ifdef MAC_USE_SCC_A
2931 /* Initialize channel A */
2932 lea %pc@(L(scc_initable_mac)),%a1
2935 moveb %d0,%a0@(mac_scc_cha_a_ctrl_offset)
2936 moveb %a1@+,%a0@(mac_scc_cha_a_ctrl_offset)
2939 #endif /* MAC_USE_SCC_A */
2941 #ifdef MAC_USE_SCC_B
2942 /* Initialize channel B */
2943 lea %pc@(L(scc_initable_mac)),%a1
2946 moveb %d0,%a0@(mac_scc_cha_b_ctrl_offset)
2947 moveb %a1@+,%a0@(mac_scc_cha_b_ctrl_offset)
2950 #endif /* MAC_USE_SCC_B */
2952 #endif /* SERIAL_DEBUG */
2954 jra L(serial_init_done)
2955 L(serial_init_not_mac):
2956 #endif /* CONFIG_MAC */
2960 /* debug output goes into SRAM, so we don't do it unless requested
2961 - check for '%LX$' signature in SRAM */
2962 lea %pc@(q40_mem_cptr),%a1
2963 move.l #0xff020010,%a1@ /* must be inited - also used by debug=mem */
2964 move.l #0xff020000,%a1
2977 lea %pc@(L(q40_do_debug)),%a1
2979 /*nodbg: q40_do_debug is 0 by default*/
2983 #ifdef CONFIG_APOLLO
2984 /* We count on the PROM initializing SIO1 */
2988 /* We count on the boot loader initialising the UART */
2991 L(serial_init_done):
2992 func_return serial_init
2995 * Output character on serial port.
2997 func_start serial_putc,%d0/%d1/%a0/%a1
3003 /* A little safe recursion is good for the soul */
3011 movel %pc@(L(custom)),%a0
3012 movew %d0,%a0@(CUSTOMBASE+C_SERDAT)
3013 1: movew %a0@(CUSTOMBASE+C_SERDATR),%d0
3016 jra L(serial_putc_done)
3025 #if defined(MAC_USE_SCC_A) || defined(MAC_USE_SCC_B)
3026 movel %pc@(L(mac_sccbase)),%a1
3029 #ifdef MAC_USE_SCC_A
3030 3: btst #2,%a1@(mac_scc_cha_a_ctrl_offset)
3032 moveb %d0,%a1@(mac_scc_cha_a_data_offset)
3033 #endif /* MAC_USE_SCC_A */
3035 #ifdef MAC_USE_SCC_B
3036 4: btst #2,%a1@(mac_scc_cha_b_ctrl_offset)
3038 moveb %d0,%a1@(mac_scc_cha_b_data_offset)
3039 #endif /* MAC_USE_SCC_B */
3041 #endif /* SERIAL_DEBUG */
3043 jra L(serial_putc_done)
3045 #endif /* CONFIG_MAC */
3049 movel %pc@(L(iobase)),%a1
3050 #if defined(USE_PRINTER)
3051 3: btst #0,%a1@(LSTMFP_GPIP)
3053 moveb #LPSG_IO_B,%a1@(LPSG_SELECT)
3054 moveb %d0,%a1@(LPSG_WRITE)
3055 moveb #LPSG_IO_A,%a1@(LPSG_SELECT)
3056 moveb %a1@(LPSG_READ),%d0
3058 moveb %d0,%a1@(LPSG_WRITE)
3062 moveb %d0,%a1@(LPSG_WRITE)
3063 #elif defined(USE_SCC)
3064 3: btst #2,%a1@(LSCC_CTRL)
3066 moveb %d0,%a1@(LSCC_DATA)
3067 #elif defined(USE_MFP)
3068 3: btst #7,%a1@(LMFP_TSR)
3070 moveb %d0,%a1@(LMFP_UDR)
3072 jra L(serial_putc_done)
3074 #endif /* CONFIG_ATARI */
3076 #ifdef CONFIG_MVME147
3078 1: btst #2,M147_SCC_CTRL_A
3080 moveb %d0,M147_SCC_DATA_A
3081 jbra L(serial_putc_done)
3085 #ifdef CONFIG_MVME16x
3088 * If the loader gave us a board type then we can use that to
3089 * select an appropriate output routine; otherwise we just use
3090 * the Bug code. If we have to use the Bug that means the Bug
3091 * workspace has to be valid, which means the Bug has to use
3092 * the SRAM, which is non-standard.
3094 moveml %d0-%d7/%a2-%a6,%sp@-
3095 movel vme_brdtype,%d1
3096 jeq 1f | No tag - use the Bug
3097 cmpi #VME_TYPE_MVME162,%d1
3099 cmpi #VME_TYPE_MVME172,%d1
3101 /* 162/172; it's an SCC */
3102 6: btst #2,M162_SCC_CTRL_A
3107 moveb #8,M162_SCC_CTRL_A
3111 moveb %d0,M162_SCC_CTRL_A
3114 /* 166/167/177; it's a CD2401 */
3116 moveb M167_CYIER,%d2
3117 moveb #0x02,M167_CYIER
3119 btst #5,M167_PCSCCTICR
3121 moveb M167_PCTPIACKR,%d1
3122 moveb M167_CYLICR,%d1
3124 moveb #0x08,M167_CYTEOIR
3127 moveb %d0,M167_CYTDR
3128 moveb #0,M167_CYTEOIR
3129 moveb %d2,M167_CYIER
3134 .word 0x0020 /* TRAP 0x020 */
3136 moveml %sp@+,%d0-%d7/%a2-%a6
3137 jbra L(serial_putc_done)
3139 #endif /* CONFIG_MVME16x */
3141 #ifdef CONFIG_BVME6000
3144 * The BVME6000 machine has a serial port ...
3146 1: btst #2,BVME_SCC_CTRL_A
3148 moveb %d0,BVME_SCC_DATA_A
3149 jbra L(serial_putc_done)
3156 movel 0xFEFE0018,%a1
3159 jbra L(serial_putc_done)
3165 tst.l %pc@(L(q40_do_debug)) /* only debug if requested */
3167 lea %pc@(q40_mem_cptr),%a1
3172 jbra L(serial_putc_done)
3176 #ifdef CONFIG_APOLLO
3178 movl %pc@(L(iobase)),%a1
3179 moveb %d0,%a1@(LTHRB0)
3180 1: moveb %a1@(LSRB0),%d0
3183 jbra L(serial_putc_done)
3189 movl %pc@(L(iobase)),%a1
3190 addl %pc@(L(uartbase)),%a1
3191 movel %pc@(L(uart_scode)),%d1 /* Check the scode */
3192 jmi 3f /* Unset? Exit */
3193 cmpi #256,%d1 /* APCI scode? */
3195 1: moveb %a1@(DCALSR),%d1 /* Output to DCA */
3198 moveb %d0,%a1@(DCADATA)
3199 jbra L(serial_putc_done)
3200 2: moveb %a1@(APCILSR),%d1 /* Output to APCI */
3203 moveb %d0,%a1@(APCIDATA)
3204 jbra L(serial_putc_done)
3208 L(serial_putc_done):
3209 func_return serial_putc
3214 func_start puts,%d0/%a0
3231 * Output number in hex notation.
3234 func_start putn,%d0-%d2
3246 addb #'A'-('9'+1),%d2
3262 * This routine takes its parameters on the stack. It then
3263 * turns around and calls the internal routines. This routine
3264 * is used by the boot console.
3266 * The calling parameters are:
3267 * void mac_early_print(const char *str, unsigned length);
3269 * This routine does NOT understand variable arguments only
3272 ENTRY(mac_early_print)
3273 moveml %d0/%d1/%a0,%sp@-
3276 movel %sp@(18),%a0 /* fetch parameter */
3277 movel %sp@(22),%d1 /* fetch parameter */
3292 moveml %sp@+,%d0/%d1/%a0
3294 #endif /* CONFIG_MAC */
3296 #if defined(CONFIG_HP300) || defined(CONFIG_APOLLO)
3297 func_start set_leds,%d0/%a0
3301 movel %pc@(L(iobase)),%a0
3302 moveb %d0,%a0@(0x1ffff)
3306 #ifdef CONFIG_APOLLO
3307 movel %pc@(L(iobase)),%a0
3310 moveb %d0,%a0@(LCPUCTRL)
3313 func_return set_leds
3318 * For continuity, see the data alignment
3319 * to which this structure is tied.
3321 #define Lconsole_struct_cur_column 0
3322 #define Lconsole_struct_cur_row 4
3323 #define Lconsole_struct_num_columns 8
3324 #define Lconsole_struct_num_rows 12
3325 #define Lconsole_struct_left_edge 16
3326 #define Lconsole_struct_penguin_putc 20
3328 func_start console_init,%a0-%a4/%d0-%d7
3330 * Some of the register usage that follows
3331 * a0 = pointer to boot_info
3332 * a1 = pointer to screen
3333 * a2 = pointer to Lconsole_globals
3334 * d3 = pixel width of screen
3335 * d4 = pixel height of screen
3336 * (d3,d4) ~= (x,y) of a point just below
3337 * and to the right of the screen
3338 * NOT on the screen!
3339 * d5 = number of bytes per scan line
3340 * d6 = number of bytes on the entire screen
3343 lea %pc@(L(console_globals)),%a2
3344 movel %pc@(L(mac_videobase)),%a1
3345 movel %pc@(L(mac_rowbytes)),%d5
3346 movel %pc@(L(mac_dimensions)),%d3 /* -> low byte */
3348 swap %d4 /* -> high byte */
3349 andl #0xffff,%d3 /* d3 = screen width in pixels */
3350 andl #0xffff,%d4 /* d4 = screen height in pixels */
3354 mulul %d4,%d6 /* scan line bytes x num scan lines */
3355 divul #8,%d6 /* we'll clear 8 bytes at a time */
3356 moveq #-1,%d0 /* Mac_black */
3359 L(console_clear_loop):
3362 dbra %d6,L(console_clear_loop)
3364 /* Calculate font size */
3366 #if defined(FONT_8x8) && defined(CONFIG_FONT_8x8)
3367 lea %pc@(font_vga_8x8),%a0
3368 #elif defined(FONT_8x16) && defined(CONFIG_FONT_8x16)
3369 lea %pc@(font_vga_8x16),%a0
3370 #elif defined(FONT_6x11) && defined(CONFIG_FONT_6x11)
3371 lea %pc@(font_vga_6x11),%a0
3372 #elif defined(CONFIG_FONT_8x8) /* default */
3373 lea %pc@(font_vga_8x8),%a0
3374 #else /* no compiled-in font */
3379 * At this point we make a shift in register usage
3380 * a1 = address of console_font pointer
3382 lea %pc@(L(console_font)),%a1
3383 movel %a0,%a1@ /* store pointer to struct fbcon_font_desc in console_font */
3386 lea %pc@(L(console_font_data)),%a4
3387 movel %a0@(FONT_DESC_DATA),%d0
3388 subl #L(console_font),%a1
3393 * Calculate global maxs
3394 * Note - we can use either an
3395 * 8 x 16 or 8 x 8 character font
3396 * 6 x 11 also supported
3398 /* ASSERT: a0 = contents of Lconsole_font */
3399 movel %d3,%d0 /* screen width in pixels */
3400 divul %a0@(FONT_DESC_WIDTH),%d0 /* d0 = max num chars per row */
3402 movel %d4,%d1 /* screen height in pixels */
3403 divul %a0@(FONT_DESC_HEIGHT),%d1 /* d1 = max num rows */
3405 movel %d0,%a2@(Lconsole_struct_num_columns)
3406 movel %d1,%a2@(Lconsole_struct_num_rows)
3409 * Clear the current row and column
3411 clrl %a2@(Lconsole_struct_cur_column)
3412 clrl %a2@(Lconsole_struct_cur_row)
3413 clrl %a2@(Lconsole_struct_left_edge)
3416 * Initialization is complete
3419 func_return console_init
3421 func_start console_put_stats,%a0/%d7
3423 * Some of the register usage that follows
3424 * a0 = pointer to boot_info
3425 * d7 = value of boot_info fields
3431 putn %pc@(L(mac_videobase)) /* video addr. */
3434 lea %pc@(_stext),%a0
3442 putn %pc@(L(cputype))
3446 putn %pc@(L(mac_sccbase))
3450 jbsr mmu_print_machine_cpu_types
3452 #endif /* SERIAL_DEBUG */
3456 func_return console_put_stats
3459 func_start console_put_penguin,%a0-%a1/%d0-%d7
3461 * Get 'that_penguin' onto the screen in the upper right corner
3462 * penguin is 64 x 74 pixels, align against right edge of screen
3464 lea %pc@(L(mac_dimensions)),%a0
3467 subil #64,%d0 /* snug up against the right edge */
3468 clrl %d1 /* start at the top */
3470 lea %pc@(L(that_penguin)),%a1
3471 L(console_penguin_row):
3473 L(console_penguin_pixel_pair):
3476 console_plot_pixel %d0,%d1,%d2
3479 console_plot_pixel %d0,%d1,%d2
3481 dbra %d6,L(console_penguin_pixel_pair)
3485 dbra %d7,L(console_penguin_row)
3487 func_return console_put_penguin
3489 /* include penguin bitmap */
3491 #include "../mac/mac_penguin.S"
3495 * Calculate source and destination addresses
3500 func_start console_scroll,%a0-%a4/%d0-%d7
3501 lea %pc@(L(mac_videobase)),%a0
3504 lea %pc@(L(mac_rowbytes)),%a0
3506 movel %pc@(L(console_font)),%a0
3509 mulul %a0@(FONT_DESC_HEIGHT),%d5 /* account for # scan lines per character */
3515 lea %pc@(L(mac_dimensions)),%a0
3519 andl #0xffff,%d3 /* d3 = screen width in pixels */
3520 andl #0xffff,%d4 /* d4 = screen height in pixels */
3523 * Calculate number of bytes to move
3525 lea %pc@(L(mac_rowbytes)),%a0
3527 movel %pc@(L(console_font)),%a0
3528 subl %a0@(FONT_DESC_HEIGHT),%d4 /* we're not scrolling the top row! */
3529 mulul %d4,%d6 /* scan line bytes x num scan lines */
3530 divul #32,%d6 /* we'll move 8 longs at a time */
3533 L(console_scroll_loop):
3542 dbra %d6,L(console_scroll_loop)
3544 lea %pc@(L(mac_rowbytes)),%a0
3546 movel %pc@(L(console_font)),%a0
3547 mulul %a0@(FONT_DESC_HEIGHT),%d6 /* scan line bytes x font height */
3548 divul #32,%d6 /* we'll move 8 words at a time */
3552 L(console_scroll_clear_loop):
3561 dbra %d6,L(console_scroll_clear_loop)
3564 func_return console_scroll
3567 func_start console_putc,%a0/%a1/%d0-%d7
3569 is_not_mac(L(console_exit))
3570 tstl %pc@(L(console_font))
3573 /* Output character in d7 on console.
3579 /* A little safe recursion is good for the soul */
3582 lea %pc@(L(console_globals)),%a0
3585 jne L(console_not_lf)
3586 movel %a0@(Lconsole_struct_cur_row),%d0
3588 movel %d0,%a0@(Lconsole_struct_cur_row)
3589 movel %a0@(Lconsole_struct_num_rows),%d1
3593 movel %d0,%a0@(Lconsole_struct_cur_row)
3600 jne L(console_not_cr)
3601 clrl %a0@(Lconsole_struct_cur_column)
3606 jne L(console_not_home)
3607 clrl %a0@(Lconsole_struct_cur_row)
3608 clrl %a0@(Lconsole_struct_cur_column)
3612 * At this point we know that the %d7 character is going to be
3613 * rendered on the screen. Register usage is -
3614 * a0 = pointer to console globals
3616 * d0 = cursor column
3617 * d1 = cursor row to draw the character
3618 * d7 = character number
3620 L(console_not_home):
3621 movel %a0@(Lconsole_struct_cur_column),%d0
3622 addql #1,%a0@(Lconsole_struct_cur_column)
3623 movel %a0@(Lconsole_struct_num_columns),%d1
3626 console_putc #'\n' /* recursion is OK! */
3628 movel %a0@(Lconsole_struct_cur_row),%d1
3631 * At this point we make a shift in register usage
3632 * a0 = address of pointer to font data (fbcon_font_desc)
3634 movel %pc@(L(console_font)),%a0
3635 movel %pc@(L(console_font_data)),%a1 /* Load fbcon_font_desc.data into a1 */
3636 andl #0x000000ff,%d7
3637 /* ASSERT: a0 = contents of Lconsole_font */
3638 mulul %a0@(FONT_DESC_HEIGHT),%d7 /* d7 = index into font data */
3639 addl %d7,%a1 /* a1 = points to char image */
3642 * At this point we make a shift in register usage
3643 * d0 = pixel coordinate, x
3644 * d1 = pixel coordinate, y
3645 * d2 = (bit 0) 1/0 for white/black (!) pixel on screen
3646 * d3 = font scan line data (8 pixels)
3647 * d6 = count down for the font's pixel width (8)
3648 * d7 = count down for the font's pixel count in height
3650 /* ASSERT: a0 = contents of Lconsole_font */
3651 mulul %a0@(FONT_DESC_WIDTH),%d0
3652 mulul %a0@(FONT_DESC_HEIGHT),%d1
3653 movel %a0@(FONT_DESC_HEIGHT),%d7 /* Load fbcon_font_desc.height into d7 */
3655 L(console_read_char_scanline):
3658 /* ASSERT: a0 = contents of Lconsole_font */
3659 movel %a0@(FONT_DESC_WIDTH),%d6 /* Load fbcon_font_desc.width into d6 */
3662 L(console_do_font_scanline):
3664 scsb %d2 /* convert 1 bit into a byte */
3665 console_plot_pixel %d0,%d1,%d2
3667 dbra %d6,L(console_do_font_scanline)
3669 /* ASSERT: a0 = contents of Lconsole_font */
3670 subl %a0@(FONT_DESC_WIDTH),%d0
3672 dbra %d7,L(console_read_char_scanline)
3675 func_return console_putc
3681 * d2 = (bit 0) 1/0 for white/black (!)
3682 * All registers are preserved
3684 func_start console_plot_pixel,%a0-%a1/%d0-%d4
3686 movel %pc@(L(mac_videobase)),%a1
3687 movel %pc@(L(mac_videodepth)),%d3
3690 mulul %pc@(L(mac_rowbytes)),%d1
3695 * d0 = x coord becomes byte offset into frame buffer
3697 * d2 = black or white (0/1)
3699 * d4 = temp of x (d0) for many bit depths
3704 movel %d0,%d4 /* we need the low order 3 bits! */
3709 eorb #7,%d4 /* reverse the x-coordinate w/ screen-bit # */
3713 jbra L(console_plot_pixel_exit)
3716 jbra L(console_plot_pixel_exit)
3721 movel %d0,%d4 /* we need the low order 2 bits! */
3726 eorb #3,%d4 /* reverse the x-coordinate w/ screen-bit # */
3733 jbra L(console_plot_pixel_exit)
3738 jbra L(console_plot_pixel_exit)
3743 movel %d0,%d4 /* we need the low order bit! */
3759 jbra L(console_plot_pixel_exit)
3768 jbra L(console_plot_pixel_exit)
3778 jbra L(console_plot_pixel_exit)
3781 jbra L(console_plot_pixel_exit)
3785 jbne L(console_plot_pixel_exit)
3792 jbra L(console_plot_pixel_exit)
3795 jbra L(console_plot_pixel_exit)
3797 L(console_plot_pixel_exit):
3798 func_return console_plot_pixel
3799 #endif /* CONSOLE */
3803 * This is some old code lying around. I don't believe
3804 * it's used or important anymore. My guess is it contributed
3805 * to getting to this point, but it's done for now.
3806 * It was still in the 2.1.77 head.S, so it's still here.
3807 * (And still not used!)
3810 moveml %a0/%d7,%sp@-
3814 .long 0xf0119f15 | ptestr #5,%a1@,#7,%a0
3823 lea %pc@(L(mmu)),%a0
3824 .long 0xf0106200 | pmove %psr,%a0@
3830 moveml %sp@+,%a0/%d7
3837 #if defined(CONFIG_ATARI) || defined(CONFIG_AMIGA) || \
3838 defined(CONFIG_HP300) || defined(CONFIG_APOLLO)
3844 #if defined(CONSOLE)
3846 .long 0 /* cursor column */
3847 .long 0 /* cursor row */
3848 .long 0 /* max num columns */
3849 .long 0 /* max num rows */
3850 .long 0 /* left edge */
3851 .long 0 /* mac putc */
3853 .long 0 /* pointer to console font (struct font_desc) */
3854 L(console_font_data):
3855 .long 0 /* pointer to console font data */
3856 #endif /* CONSOLE */
3858 #if defined(MMU_PRINT)
3860 .long 0 /* valid flag */
3861 .long 0 /* start logical */
3862 .long 0 /* next logical */
3863 .long 0 /* start physical */
3864 .long 0 /* next physical */
3865 #endif /* MMU_PRINT */
3869 L(mmu_cached_pointer_tables):
3871 L(mmu_num_pointer_tables):
3873 L(phys_kernel_start):
3879 L(kernel_pgdir_ptr):
3884 #if defined (CONFIG_MVME147)
3885 M147_SCC_CTRL_A = 0xfffe3002
3886 M147_SCC_DATA_A = 0xfffe3003
3889 #if defined (CONFIG_MVME16x)
3890 M162_SCC_CTRL_A = 0xfff45005
3891 M167_CYCAR = 0xfff450ee
3892 M167_CYIER = 0xfff45011
3893 M167_CYLICR = 0xfff45026
3894 M167_CYTEOIR = 0xfff45085
3895 M167_CYTDR = 0xfff450f8
3896 M167_PCSCCTICR = 0xfff4201e
3897 M167_PCTPIACKR = 0xfff42025
3900 #if defined (CONFIG_BVME6000)
3901 BVME_SCC_CTRL_A = 0xffb0000b
3902 BVME_SCC_DATA_A = 0xffb0000f
3905 #if defined(CONFIG_MAC)
3918 #endif /* CONFIG_MAC */
3920 #if defined (CONFIG_APOLLO)
3926 #if defined(CONFIG_HP300)
3943 m68k_pgtable_cachemode:
3945 m68k_supervisor_cachemode:
3947 #if defined(CONFIG_MVME16x)
3949 .long 0,0,0,0,0,0,0,0
3951 #if defined(CONFIG_Q40)