3 ** head.S -- This file contains the initial boot code for the
6 ** Copyright 1993 by Hamish Macdonald
8 ** 68040 fixes by Michael Rausch
9 ** 68060 fixes by Roman Hodek
10 ** MMU cleanup by Randy Thelen
11 ** Final MMU cleanup by Roman Zippel
13 ** Atari support by Andreas Schwab, using ideas of Robert de Vries
15 ** VME Support by Richard Hirst
17 ** 94/11/14 Andreas Schwab: put kernel at PAGESIZE
18 ** 94/11/18 Andreas Schwab: remove identity mapping of STRAM for Atari
19 ** ++ Bjoern & Roman: ATARI-68040 support for the Medusa
20 ** 95/11/18 Richard Hirst: Added MVME166 support
21 ** 96/04/26 Guenther Kelleter: fixed identity mapping for Falcon with
22 ** Magnum- and FX-alternate ram
23 ** 98/04/25 Phil Blundell: added HP300 support
24 ** 1998/08/30 David Kilzer: Added support for font_desc structures
26 ** 1999/02/11 Richard Zidlicky: added Q40 support (initial version 99/01/01)
27 ** 2004/05/13 Kars de Jong: Finalised HP300 support
29 ** This file is subject to the terms and conditions of the GNU General Public
30 ** License. See the file README.legal in the main directory of this archive
38 * At this point, the boot loader has:
41 * Put us in supervisor state.
43 * The kernel setup code takes the following steps:
44 * . Raise interrupt level
45 * . Set up initial kernel memory mapping.
46 * . This sets up a mapping of the 4M of memory the kernel is located in.
47 * . It also does a mapping of any initial machine specific areas.
49 * . Enable cache memories
50 * . Jump to kernel startup
52 * Much of the file restructuring was to accomplish:
53 * 1) Remove register dependency through-out the file.
54 * 2) Increase use of subroutines to perform functions
55 * 3) Increase readability of the code
57 * Of course, readability is a subjective issue, so it will never be
58 * argued that that goal was accomplished. It was merely a goal.
59 * A key way to help make code more readable is to give good
60 * documentation. So, the first thing you will find is exaustive
61 * write-ups on the structure of the file, and the features of the
62 * functional subroutines.
66 * Without a doubt the single largest chunk of head.S is spent
67 * mapping the kernel and I/O physical space into the logical range
69 * There are new subroutines and data structures to make MMU
70 * support cleaner and easier to understand.
71 * First, you will find a routine call "mmu_map" which maps
72 * a logical to a physical region for some length given a cache
73 * type on behalf of the caller. This routine makes writing the
74 * actual per-machine specific code very simple.
75 * A central part of the code, but not a subroutine in itself,
76 * is the mmu_init code which is broken down into mapping the kernel
77 * (the same for all machines) and mapping machine-specific I/O
79 * Also, there will be a description of engaging the MMU and
81 * You will notice that there is a chunk of code which
82 * can emit the entire MMU mapping of the machine. This is present
83 * only in debug modes and can be very helpful.
84 * Further, there is a new console driver in head.S that is
85 * also only engaged in debug mode. Currently, it's only supported
86 * on the Macintosh class of machines. However, it is hoped that
87 * others will plug-in support for specific machines.
89 * ######################################################################
93 * mmu_map was written for two key reasons. First, it was clear
94 * that it was very difficult to read the previous code for mapping
95 * regions of memory. Second, the Macintosh required such extensive
96 * memory allocations that it didn't make sense to propagate the
97 * existing code any further.
98 * mmu_map requires some parameters:
100 * mmu_map (logical, physical, length, cache_type)
102 * While this essentially describes the function in the abstract, you'll
103 * find more indepth description of other parameters at the implementation site.
105 * mmu_get_root_table_entry
106 * ------------------------
107 * mmu_get_ptr_table_entry
108 * -----------------------
109 * mmu_get_page_table_entry
110 * ------------------------
112 * These routines are used by other mmu routines to get a pointer into
113 * a table, if necessary a new table is allocated. These routines are working
114 * basically like pmd_alloc() and pte_alloc() in <asm/pgtable.h>. The root
115 * table needs of course only to be allocated once in mmu_get_root_table_entry,
116 * so that here also some mmu specific initialization is done. The second page
117 * at the start of the kernel (the first page is unmapped later) is used for
118 * the kernel_pg_dir. It must be at a position known at link time (as it's used
119 * to initialize the init task struct) and since it needs special cache
120 * settings, it's the easiest to use this page, the rest of the page is used
121 * for further pointer tables.
122 * mmu_get_page_table_entry allocates always a whole page for page tables, this
123 * means 1024 pages and so 4MB of memory can be mapped. It doesn't make sense
124 * to manage page tables in smaller pieces as nearly all mappings have that
127 * ######################################################################
130 * ######################################################################
134 * Thanks to a small helping routine enabling the mmu got quite simple
135 * and there is only one way left. mmu_engage makes a complete a new mapping
136 * that only includes the absolute necessary to be able to jump to the final
137 * position and to restore the original mapping.
138 * As this code doesn't need a transparent translation register anymore this
139 * means all registers are free to be used by machines that needs them for
142 * ######################################################################
146 * This algorithm will print out the page tables of the system as
147 * appropriate for an 030 or an 040. This is useful for debugging purposes
148 * and as such is enclosed in #ifdef MMU_PRINT/#endif clauses.
150 * ######################################################################
154 * The console is also able to be turned off. The console in head.S
155 * is specifically for debugging and can be very useful. It is surrounded by
156 * #ifdef CONSOLE/#endif clauses so it doesn't have to ship in known-good
157 * kernels. It's basic algorithm is to determine the size of the screen
158 * (in height/width and bit depth) and then use that information for
159 * displaying an 8x8 font or an 8x16 (widthxheight). I prefer the 8x8 for
160 * debugging so I can see more good data. But it was trivial to add support
161 * for both fonts, so I included it.
162 * Also, the algorithm for plotting pixels is abstracted so that in
163 * theory other platforms could add support for different kinds of frame
164 * buffers. This could be very useful.
166 * console_put_penguin
167 * -------------------
168 * An important part of any Linux bring up is the penguin and there's
169 * nothing like getting the Penguin on the screen! This algorithm will work
170 * on any machine for which there is a console_plot_pixel.
174 * My hope is that the scroll algorithm does the right thing on the
175 * various platforms, but it wouldn't be hard to add the test conditions
176 * and new code if it doesn't.
181 * ######################################################################
183 * Register usage has greatly simplified within head.S. Every subroutine
184 * saves and restores all registers that it modifies (except it returns a
185 * value in there of course). So the only register that needs to be initialized
186 * is the stack pointer.
187 * All other init code and data is now placed in the init section, so it will
188 * be automatically freed at the end of the kernel initialization.
190 * ######################################################################
194 * There are many options available in a build of this file. I've
195 * taken the time to describe them here to save you the time of searching
196 * for them and trying to understand what they mean.
198 * CONFIG_xxx: These are the obvious machine configuration defines created
199 * during configuration. These are defined in autoconf.h.
201 * CONSOLE: There is support for head.S console in this file. This
202 * console can talk to a Mac frame buffer, but could easily be extrapolated
203 * to extend it to support other platforms.
205 * TEST_MMU: This is a test harness for running on any given machine but
206 * getting an MMU dump for another class of machine. The classes of machines
207 * that can be tested are any of the makes (Atari, Amiga, Mac, VME, etc.)
208 * and any of the models (030, 040, 060, etc.).
210 * NOTE: TEST_MMU is NOT permanent! It is scheduled to be removed
211 * When head.S boots on Atari, Amiga, Macintosh, and VME
212 * machines. At that point the underlying logic will be
213 * believed to be solid enough to be trusted, and TEST_MMU
214 * can be dropped. Do note that that will clean up the
215 * head.S code significantly as large blocks of #if/#else
216 * clauses can be removed.
218 * MMU_NOCACHE_KERNEL: On the Macintosh platform there was an inquiry into
219 * determing why devices don't appear to work. A test case was to remove
220 * the cacheability of the kernel bits.
222 * MMU_PRINT: There is a routine built into head.S that can display the
223 * MMU data structures. It outputs its result through the serial_putc
224 * interface. So where ever that winds up driving data, that's where the
225 * mmu struct will appear. On the Macintosh that's typically the console.
227 * SERIAL_DEBUG: There are a series of putc() macro statements
228 * scattered through out the code to give progress of status to the
229 * person sitting at the console. This constant determines whether those
232 * DEBUG: This is the standard DEBUG flag that can be set for building
233 * the kernel. It has the effect adding additional tests into
239 * In theory these could be determined at run time or handed
240 * over by the booter. But, let's be real, it's a fine hard
241 * coded value. (But, you will notice the code is run-time
242 * flexible!) A pointer to the font's struct font_desc
243 * is kept locally in Lconsole_font. It is used to determine
244 * font size information dynamically.
247 * USE_PRINTER: Use the printer port for serial debug.
248 * USE_SCC_B: Use the SCC port A (Serial2) for serial debug.
249 * USE_SCC_A: Use the SCC port B (Modem2) for serial debug.
250 * USE_MFP: Use the ST-MFP port (Modem1) for serial debug.
252 * Macintosh constants:
253 * MAC_USE_SCC_A: Use SCC port A (modem) for serial debug and early console.
254 * MAC_USE_SCC_B: Use SCC port B (printer) for serial debug and early console.
257 #include <linux/linkage.h>
258 #include <linux/init.h>
259 #include <asm/bootinfo.h>
260 #include <asm/bootinfo-amiga.h>
261 #include <asm/bootinfo-atari.h>
262 #include <asm/bootinfo-hp300.h>
263 #include <asm/bootinfo-mac.h>
264 #include <asm/bootinfo-q40.h>
265 #include <asm/bootinfo-vme.h>
266 #include <asm/setup.h>
267 #include <asm/entry.h>
268 #include <asm/pgtable.h>
269 #include <asm/page.h>
270 #include <asm/asm-offsets.h>
274 #include <asm/machw.h>
276 #ifdef CONFIG_FRAMEBUFFER_CONSOLE
278 #define CONSOLE_PENGUIN
281 #ifdef CONFIG_EARLY_PRINTK
287 #else /* !CONFIG_MAC */
291 #endif /* !CONFIG_MAC */
294 #undef MMU_NOCACHE_KERNEL
298 * For the head.S console, there are three supported fonts, 6x11, 8x16 and 8x8.
299 * The 8x8 font is harder to read but fits more on the screen.
301 #define FONT_8x8 /* default */
302 /* #define FONT_8x16 */ /* 2nd choice */
303 /* #define FONT_6x11 */ /* 3rd choice */
307 .globl m68k_pgtable_cachemode
308 .globl m68k_supervisor_cachemode
309 #ifdef CONFIG_MVME16x
316 CPUTYPE_040 = 1 /* indicates an 040 */
317 CPUTYPE_060 = 2 /* indicates an 060 */
318 CPUTYPE_0460 = 3 /* if either above are set, this is set */
319 CPUTYPE_020 = 4 /* indicates an 020 */
321 /* Translation control register */
326 /* Transparent translation registers */
327 TTR_ENABLE = 0x8000 /* enable transparent translation */
328 TTR_ANYMODE = 0x4000 /* user and kernel mode access */
329 TTR_KERNELMODE = 0x2000 /* only kernel mode access */
330 TTR_USERMODE = 0x0000 /* only user mode access */
331 TTR_CI = 0x0400 /* inhibit cache */
332 TTR_RW = 0x0200 /* read/write mode */
333 TTR_RWM = 0x0100 /* read/write mask */
334 TTR_FCB2 = 0x0040 /* function code base bit 2 */
335 TTR_FCB1 = 0x0020 /* function code base bit 1 */
336 TTR_FCB0 = 0x0010 /* function code base bit 0 */
337 TTR_FCM2 = 0x0004 /* function code mask bit 2 */
338 TTR_FCM1 = 0x0002 /* function code mask bit 1 */
339 TTR_FCM0 = 0x0001 /* function code mask bit 0 */
341 /* Cache Control registers */
342 CC6_ENABLE_D = 0x80000000 /* enable data cache (680[46]0) */
343 CC6_FREEZE_D = 0x40000000 /* freeze data cache (68060) */
344 CC6_ENABLE_SB = 0x20000000 /* enable store buffer (68060) */
345 CC6_PUSH_DPI = 0x10000000 /* disable CPUSH invalidation (68060) */
346 CC6_HALF_D = 0x08000000 /* half-cache mode for data cache (68060) */
347 CC6_ENABLE_B = 0x00800000 /* enable branch cache (68060) */
348 CC6_CLRA_B = 0x00400000 /* clear all entries in branch cache (68060) */
349 CC6_CLRU_B = 0x00200000 /* clear user entries in branch cache (68060) */
350 CC6_ENABLE_I = 0x00008000 /* enable instruction cache (680[46]0) */
351 CC6_FREEZE_I = 0x00004000 /* freeze instruction cache (68060) */
352 CC6_HALF_I = 0x00002000 /* half-cache mode for instruction cache (68060) */
353 CC3_ALLOC_WRITE = 0x00002000 /* write allocate mode(68030) */
354 CC3_ENABLE_DB = 0x00001000 /* enable data burst (68030) */
355 CC3_CLR_D = 0x00000800 /* clear data cache (68030) */
356 CC3_CLRE_D = 0x00000400 /* clear entry in data cache (68030) */
357 CC3_FREEZE_D = 0x00000200 /* freeze data cache (68030) */
358 CC3_ENABLE_D = 0x00000100 /* enable data cache (68030) */
359 CC3_ENABLE_IB = 0x00000010 /* enable instruction burst (68030) */
360 CC3_CLR_I = 0x00000008 /* clear instruction cache (68030) */
361 CC3_CLRE_I = 0x00000004 /* clear entry in instruction cache (68030) */
362 CC3_FREEZE_I = 0x00000002 /* freeze instruction cache (68030) */
363 CC3_ENABLE_I = 0x00000001 /* enable instruction cache (68030) */
365 /* Miscellaneous definitions */
369 ROOT_TABLE_SIZE = 128
372 ROOT_INDEX_SHIFT = 25
374 PAGE_INDEX_SHIFT = 12
377 /* When debugging use readable names for labels */
379 #define L(name) .head.S.##name
381 #define L(name) .head.S./**/name
385 #define L(name) .L##name
387 #define L(name) .L/**/name
391 /* The __INITDATA stuff is a no-op when ftrace or kgdb are turned on */
393 #define __INITDATA .data
394 #define __FINIT .previous
397 /* Several macros to make the writing of subroutines easier:
398 * - func_start marks the beginning of the routine which setups the frame
399 * register and saves the registers, it also defines another macro
400 * to automatically restore the registers again.
401 * - func_return marks the end of the routine and simply calls the prepared
402 * macro to restore registers and jump back to the caller.
403 * - func_define generates another macro to automatically put arguments
404 * onto the stack call the subroutine and cleanup the stack again.
407 /* Within subroutines these macros can be used to access the arguments
408 * on the stack. With STACK some allocated memory on the stack can be
409 * accessed and ARG0 points to the return address (used by mmu_engage).
411 #define STACK %a6@(stackstart)
414 #define ARG2 %a6@(12)
415 #define ARG3 %a6@(16)
416 #define ARG4 %a6@(20)
418 .macro func_start name,saveregs,stack=0
421 moveml \saveregs,%sp@-
422 .set stackstart,-\stack
424 .macro func_return_\name
425 moveml %sp@+,\saveregs
431 .macro func_return name
435 .macro func_call name
439 .macro move_stack nr,arg1,arg2,arg3,arg4
441 move_stack "(\nr-1)",\arg2,\arg3,\arg4
446 .macro func_define name,nr=0
447 .macro \name arg1,arg2,arg3,arg4
448 move_stack \nr,\arg1,\arg2,\arg3,\arg4
456 func_define mmu_map,4
457 func_define mmu_map_tt,4
458 func_define mmu_fixup_page_mmu_cache,1
459 func_define mmu_temp_map,2
460 func_define mmu_engage
461 func_define mmu_get_root_table_entry,1
462 func_define mmu_get_ptr_table_entry,2
463 func_define mmu_get_page_table_entry,2
464 func_define mmu_print
465 func_define get_new_page
466 #if defined(CONFIG_HP300) || defined(CONFIG_APOLLO)
470 .macro mmu_map_eq arg1,arg2,arg3
471 mmu_map \arg1,\arg1,\arg2,\arg3
474 .macro get_bi_record record
476 func_call get_bi_record
480 func_define serial_putc,1
481 func_define console_putc,1
483 func_define console_init
484 func_define console_put_stats
485 func_define console_put_penguin
486 func_define console_plot_pixel,3
487 func_define console_scroll
490 #if defined(CONSOLE) || defined(SERIAL_DEBUG)
494 func_call console_putc
497 func_call serial_putc
499 #if defined(CONSOLE) || defined(SERIAL_DEBUG)
519 #if defined(CONSOLE) || defined(SERIAL_DEBUG)
536 #define is_not_amiga(lab) cmpl &MACH_AMIGA,%pc@(m68k_machtype); jne lab
537 #define is_not_atari(lab) cmpl &MACH_ATARI,%pc@(m68k_machtype); jne lab
538 #define is_not_mac(lab) cmpl &MACH_MAC,%pc@(m68k_machtype); jne lab
539 #define is_not_mvme147(lab) cmpl &MACH_MVME147,%pc@(m68k_machtype); jne lab
540 #define is_not_mvme16x(lab) cmpl &MACH_MVME16x,%pc@(m68k_machtype); jne lab
541 #define is_not_bvme6000(lab) cmpl &MACH_BVME6000,%pc@(m68k_machtype); jne lab
542 #define is_mvme147(lab) cmpl &MACH_MVME147,%pc@(m68k_machtype); jeq lab
543 #define is_mvme16x(lab) cmpl &MACH_MVME16x,%pc@(m68k_machtype); jeq lab
544 #define is_bvme6000(lab) cmpl &MACH_BVME6000,%pc@(m68k_machtype); jeq lab
545 #define is_not_hp300(lab) cmpl &MACH_HP300,%pc@(m68k_machtype); jne lab
546 #define is_not_apollo(lab) cmpl &MACH_APOLLO,%pc@(m68k_machtype); jne lab
547 #define is_not_q40(lab) cmpl &MACH_Q40,%pc@(m68k_machtype); jne lab
548 #define is_not_sun3x(lab) cmpl &MACH_SUN3X,%pc@(m68k_machtype); jne lab
550 #define hasnt_leds(lab) cmpl &MACH_HP300,%pc@(m68k_machtype); \
552 cmpl &MACH_APOLLO,%pc@(m68k_machtype); \
556 #define is_040_or_060(lab) btst &CPUTYPE_0460,%pc@(L(cputype)+3); jne lab
557 #define is_not_040_or_060(lab) btst &CPUTYPE_0460,%pc@(L(cputype)+3); jeq lab
558 #define is_040(lab) btst &CPUTYPE_040,%pc@(L(cputype)+3); jne lab
559 #define is_060(lab) btst &CPUTYPE_060,%pc@(L(cputype)+3); jne lab
560 #define is_not_060(lab) btst &CPUTYPE_060,%pc@(L(cputype)+3); jeq lab
561 #define is_020(lab) btst &CPUTYPE_020,%pc@(L(cputype)+3); jne lab
562 #define is_not_020(lab) btst &CPUTYPE_020,%pc@(L(cputype)+3); jeq lab
564 /* On the HP300 we use the on-board LEDs for debug output before
565 the console is running. Writing a 1 bit turns the corresponding LED
566 _off_ - on the 340 bit 7 is towards the back panel of the machine. */
568 #if defined(CONFIG_HP300) || defined(CONFIG_APOLLO)
580 * Version numbers of the bootinfo interface
581 * The area from _stext to _start will later be used as kernel pointer table
583 bras 1f /* Jump over bootinfo version numbers */
585 .long BOOTINFOV_MAGIC
586 .long MACH_AMIGA, AMIGA_BOOTI_VERSION
587 .long MACH_ATARI, ATARI_BOOTI_VERSION
588 .long MACH_MVME147, MVME147_BOOTI_VERSION
589 .long MACH_MVME16x, MVME16x_BOOTI_VERSION
590 .long MACH_BVME6000, BVME6000_BOOTI_VERSION
591 .long MACH_MAC, MAC_BOOTI_VERSION
592 .long MACH_Q40, Q40_BOOTI_VERSION
593 .long MACH_HP300, HP300_BOOTI_VERSION
597 .equ kernel_pg_dir,_stext
599 .equ .,_stext+PAGESIZE
606 * Setup initial stack pointer
611 * Record the CPU and machine type.
613 get_bi_record BI_MACHTYPE
614 lea %pc@(m68k_machtype),%a1
617 get_bi_record BI_FPUTYPE
618 lea %pc@(m68k_fputype),%a1
621 get_bi_record BI_MMUTYPE
622 lea %pc@(m68k_mmutype),%a1
625 get_bi_record BI_CPUTYPE
626 lea %pc@(m68k_cputype),%a1
633 * For Macintosh, we need to determine the display parameters early (at least
634 * while debugging it).
637 is_not_mac(L(test_notmac))
639 get_bi_record BI_MAC_VADDR
640 lea %pc@(L(mac_videobase)),%a1
643 get_bi_record BI_MAC_VDEPTH
644 lea %pc@(L(mac_videodepth)),%a1
647 get_bi_record BI_MAC_VDIM
648 lea %pc@(L(mac_dimensions)),%a1
651 get_bi_record BI_MAC_VROW
652 lea %pc@(L(mac_rowbytes)),%a1
656 get_bi_record BI_MAC_SCCBASE
657 lea %pc@(L(mac_sccbase)),%a1
665 lea %pc@(L(mac_videobase)),%a0
667 lea %pc@(L(mac_dimensions)),%a0
669 swap %d1 /* #rows is high bytes */
670 andl #0xFFFF,%d1 /* rows */
672 lea %pc@(L(mac_rowbytes)),%a0
683 #endif /* CONFIG_MAC */
687 * There are ultimately two pieces of information we want for all kinds of
688 * processors CpuType and CacheBits. The CPUTYPE was passed in from booter
689 * and is converted here from a booter type definition to a separate bit
690 * number which allows for the standard is_0x0 macro tests.
692 movel %pc@(m68k_cputype),%d0
699 * Test the BootInfo cputype for 060
703 bset #CPUTYPE_060,%d1
704 bset #CPUTYPE_0460,%d1
708 * Test the BootInfo cputype for 040
712 bset #CPUTYPE_040,%d1
713 bset #CPUTYPE_0460,%d1
717 * Test the BootInfo cputype for 020
721 bset #CPUTYPE_020,%d1
725 * Record the cpu type
727 lea %pc@(L(cputype)),%a0
733 * Now the macros are valid:
742 * Determine the cache mode for pages holding MMU tables
743 * and for supervisor mode, unused for '020 and '030
748 is_not_040_or_060(L(save_cachetype))
752 * d1 := cacheable write-through
753 * NOTE: The 68040 manual strongly recommends non-cached for MMU tables,
754 * but we have been using write-through since at least 2.0.29 so I
757 #ifdef CONFIG_060_WRITETHROUGH
759 * If this is a 68060 board using drivers with cache coherency
760 * problems, then supervisor memory accesses need to be write-through
761 * also; otherwise, we want copyback.
765 movel #_PAGE_CACHE040W,%d0
766 jra L(save_cachetype)
767 #endif /* CONFIG_060_WRITETHROUGH */
769 movew #_PAGE_CACHE040,%d0
771 movel #_PAGE_CACHE040W,%d1
774 /* Save cache mode for supervisor mode and page tables
776 lea %pc@(m68k_supervisor_cachemode),%a0
778 lea %pc@(m68k_pgtable_cachemode),%a0
782 * raise interrupt level
787 If running on an Atari, determine the I/O base of the
788 serial port and test if we are running on a Medusa or Hades.
789 This test is necessary here, because on the Hades the serial
790 port is only accessible in the high I/O memory area.
792 The test whether it is a Medusa is done by writing to the byte at
793 phys. 0x0. This should result in a bus error on all other machines.
795 ...should, but doesn't. The Afterburner040 for the Falcon has the
796 same behaviour (0x0..0x7 are no ROM shadow). So we have to do
797 another test to distinguish Medusa and AB040. This is a
798 read attempt for 0x00ff82fe phys. that should bus error on a Falcon
799 (+AB040), but is in the range where the Medusa always asserts DTACK.
801 The test for the Hades is done by reading address 0xb0000000. This
802 should give a bus error on the Medusa.
806 is_not_atari(L(notypetest))
808 /* get special machine type (Medusa/Hades/AB40) */
809 moveq #0,%d3 /* default if tag doesn't exist */
810 get_bi_record BI_ATARI_MCH_TYPE
814 lea %pc@(atari_mch_type),%a0
817 /* On the Hades, the iobase must be set up before opening the
818 * serial port. There are no I/O regs at 0x00ffxxxx at all. */
820 cmpl #ATARI_MACH_HADES,%d3
822 movel #0xff000000,%d0 /* Hades I/O base addr: 0xff000000 */
823 1: lea %pc@(L(iobase)),%a0
830 is_mvme147(L(getvmetype))
831 is_bvme6000(L(getvmetype))
832 is_not_mvme16x(L(gvtdone))
834 /* See if the loader has specified the BI_VME_TYPE tag. Recent
835 * versions of VMELILO and TFTPLILO do this. We have to do this
836 * early so we know how to handle console output. If the tag
837 * doesn't exist then we use the Bug for output on MVME16x.
840 get_bi_record BI_VME_TYPE
844 lea %pc@(vme_brdtype),%a0
847 #ifdef CONFIG_MVME16x
848 is_not_mvme16x(L(gvtdone))
850 /* Need to get the BRD_ID info to differentiate between 162, 167,
851 * etc. This is available as a BI_VME_BRDINFO tag with later
852 * versions of VMELILO and TFTPLILO, otherwise we call the Bug.
854 get_bi_record BI_VME_BRDINFO
858 /* Get pointer to board ID data from Bug */
861 .word 0x70 /* trap 0x70 - .BRD_ID */
864 lea %pc@(mvme_bdid),%a1
865 /* Structure is 32 bytes long */
881 is_not_hp300(L(nothp))
883 /* Get the address of the UART for serial debugging */
884 get_bi_record BI_HP300_UART_ADDR
888 lea %pc@(L(uartbase)),%a0
890 get_bi_record BI_HP300_UART_SCODE
894 lea %pc@(L(uart_scode)),%a0
901 * Initialize serial port
912 #ifdef CONSOLE_PENGUIN
914 #endif /* CONSOLE_PENGUIN */
918 #endif /* CONFIG_MAC */
924 dputn %pc@(L(cputype))
925 dputn %pc@(m68k_supervisor_cachemode)
926 dputn %pc@(m68k_pgtable_cachemode)
930 * Save physical start address of kernel
932 lea %pc@(L(phys_kernel_start)),%a0
935 addl #PAGE_OFFSET,%a1
945 * This block of code does what's necessary to map in the various kinds
946 * of machines for execution of Linux.
947 * First map the first 4 MB of kernel code & data
950 mmu_map #PAGE_OFFSET,%pc@(L(phys_kernel_start)),#4*1024*1024,\
951 %pc@(m68k_supervisor_cachemode)
959 is_not_amiga(L(mmu_init_not_amiga))
966 is_not_040_or_060(1f)
969 * 040: Map the 16Meg range physical 0x0 up to logical 0x8000.0000
971 mmu_map #0x80000000,#0,#0x01000000,#_PAGE_NOCACHE_S
973 * Map the Zorro III I/O space with transparent translation
974 * for frame buffer memory etc.
976 mmu_map_tt #1,#0x40000000,#0x20000000,#_PAGE_NOCACHE_S
978 jbra L(mmu_init_done)
982 * 030: Map the 32Meg range physical 0x0 up to logical 0x8000.0000
984 mmu_map #0x80000000,#0,#0x02000000,#_PAGE_NOCACHE030
985 mmu_map_tt #1,#0x40000000,#0x20000000,#_PAGE_NOCACHE030
987 jbra L(mmu_init_done)
989 L(mmu_init_not_amiga):
996 is_not_atari(L(mmu_init_not_atari))
1000 /* On the Atari, we map the I/O region (phys. 0x00ffxxxx) by mapping
1001 the last 16 MB of virtual address space to the first 16 MB (i.e.
1002 0xffxxxxxx -> 0x00xxxxxx). For this, an additional pointer table is
1003 needed. I/O ranges are marked non-cachable.
1005 For the Medusa it is better to map the I/O region transparently
1006 (i.e. 0xffxxxxxx -> 0xffxxxxxx), because some I/O registers are
1007 accessible only in the high area.
1009 On the Hades all I/O registers are only accessible in the high
1013 /* I/O base addr for non-Medusa, non-Hades: 0x00000000 */
1015 movel %pc@(atari_mch_type),%d3
1016 cmpl #ATARI_MACH_MEDUSA,%d3
1018 cmpl #ATARI_MACH_HADES,%d3
1020 2: movel #0xff000000,%d0 /* Medusa/Hades base addr: 0xff000000 */
1023 is_040_or_060(L(spata68040))
1025 /* Map everything non-cacheable, though not all parts really
1026 * need to disable caches (crucial only for 0xff8000..0xffffff
1027 * (standard I/O) and 0xf00000..0xf3ffff (IDE)). The remainder
1028 * isn't really used, except for sometimes peeking into the
1029 * ROMs (mirror at phys. 0x0), so caching isn't necessary for
1031 mmu_map #0xff000000,%d3,#0x01000000,#_PAGE_NOCACHE030
1033 jbra L(mmu_init_done)
1037 mmu_map #0xff000000,%d3,#0x01000000,#_PAGE_NOCACHE_S
1039 jbra L(mmu_init_done)
1041 L(mmu_init_not_atari):
1045 is_not_q40(L(notq40))
1047 * add transparent mapping for 0xff00 0000 - 0xffff ffff
1048 * non-cached serialized etc..
1049 * this includes master chip, DAC, RTC and ISA ports
1050 * 0xfe000000-0xfeffffff is for screen and ROM
1055 mmu_map_tt #0,#0xfe000000,#0x01000000,#_PAGE_CACHE040W
1056 mmu_map_tt #1,#0xff000000,#0x01000000,#_PAGE_NOCACHE_S
1058 jbra L(mmu_init_done)
1064 is_not_hp300(L(nothp300))
1066 /* On the HP300, we map the ROM, INTIO and DIO regions (phys. 0x00xxxxxx)
1067 * by mapping 32MB (on 020/030) or 16 MB (on 040) from 0xf0xxxxxx -> 0x00xxxxxx).
1068 * The ROM mapping is needed because the LEDs are mapped there too.
1074 * 030: Map the 32Meg range physical 0x0 up to logical 0xf000.0000
1076 mmu_map #0xf0000000,#0,#0x02000000,#_PAGE_NOCACHE030
1078 jbra L(mmu_init_done)
1082 * 040: Map the 16Meg range physical 0x0 up to logical 0xf000.0000
1084 mmu_map #0xf0000000,#0,#0x01000000,#_PAGE_NOCACHE_S
1086 jbra L(mmu_init_done)
1089 #endif /* CONFIG_HP300 */
1091 #ifdef CONFIG_MVME147
1093 is_not_mvme147(L(not147))
1096 * On MVME147 we have already created kernel page tables for
1097 * 4MB of RAM at address 0, so now need to do a transparent
1098 * mapping of the top of memory space. Make it 0.5GByte for now,
1099 * so we can access on-board i/o areas.
1102 mmu_map_tt #1,#0xe0000000,#0x20000000,#_PAGE_NOCACHE030
1104 jbra L(mmu_init_done)
1107 #endif /* CONFIG_MVME147 */
1109 #ifdef CONFIG_MVME16x
1111 is_not_mvme16x(L(not16x))
1114 * On MVME16x we have already created kernel page tables for
1115 * 4MB of RAM at address 0, so now need to do a transparent
1116 * mapping of the top of memory space. Make it 0.5GByte for now.
1117 * Supervisor only access, so transparent mapping doesn't
1118 * clash with User code virtual address space.
1119 * this covers IO devices, PROM and SRAM. The PROM and SRAM
1120 * mapping is needed to allow 167Bug to run.
1121 * IO is in the range 0xfff00000 to 0xfffeffff.
1122 * PROM is 0xff800000->0xffbfffff and SRAM is
1123 * 0xffe00000->0xffe1ffff.
1126 mmu_map_tt #1,#0xe0000000,#0x20000000,#_PAGE_NOCACHE_S
1128 jbra L(mmu_init_done)
1131 #endif /* CONFIG_MVME162 | CONFIG_MVME167 */
1133 #ifdef CONFIG_BVME6000
1135 is_not_bvme6000(L(not6000))
1138 * On BVME6000 we have already created kernel page tables for
1139 * 4MB of RAM at address 0, so now need to do a transparent
1140 * mapping of the top of memory space. Make it 0.5GByte for now,
1141 * so we can access on-board i/o areas.
1142 * Supervisor only access, so transparent mapping doesn't
1143 * clash with User code virtual address space.
1146 mmu_map_tt #1,#0xe0000000,#0x20000000,#_PAGE_NOCACHE_S
1148 jbra L(mmu_init_done)
1151 #endif /* CONFIG_BVME6000 */
1156 * The Macintosh mappings are less clear.
1158 * Even as of this writing, it is unclear how the
1159 * Macintosh mappings will be done. However, as
1160 * the first author of this code I'm proposing the
1163 * Map the kernel (that's already done),
1164 * Map the I/O (on most machines that's the
1165 * 0x5000.0000 ... 0x5300.0000 range,
1166 * Map the video frame buffer using as few pages
1167 * as absolutely (this requirement mostly stems from
1168 * the fact that when the frame buffer is at
1169 * 0x0000.0000 then we know there is valid RAM just
1170 * above the screen that we don't want to waste!).
1172 * By the way, if the frame buffer is at 0x0000.0000
1173 * then the Macintosh is known as an RBV based Mac.
1175 * By the way 2, the code currently maps in a bunch of
1176 * regions. But I'd like to cut that out. (And move most
1177 * of the mappings up into the kernel proper ... or only
1178 * map what's necessary.)
1185 is_not_mac(L(mmu_init_not_mac))
1189 is_not_040_or_060(1f)
1191 moveq #_PAGE_NOCACHE_S,%d3
1194 moveq #_PAGE_NOCACHE030,%d3
1197 * Mac Note: screen address of logical 0xF000.0000 -> <screen physical>
1198 * we simply map the 4MB that contains the videomem
1201 movel #VIDEOMEMMASK,%d0
1202 andl %pc@(L(mac_videobase)),%d0
1204 mmu_map #VIDEOMEMBASE,%d0,#VIDEOMEMSIZE,%d3
1205 /* ROM from 4000 0000 to 4200 0000 (only for mac_reset()) */
1206 mmu_map_eq #0x40000000,#0x02000000,%d3
1207 /* IO devices (incl. serial port) from 5000 0000 to 5300 0000 */
1208 mmu_map_eq #0x50000000,#0x03000000,%d3
1209 /* Nubus slot space (video at 0xF0000000, rom at 0xF0F80000) */
1210 mmu_map_tt #1,#0xf8000000,#0x08000000,%d3
1212 jbra L(mmu_init_done)
1214 L(mmu_init_not_mac):
1218 is_not_sun3x(L(notsun3x))
1220 /* oh, the pain.. We're gonna want the prom code after
1221 * starting the MMU, so we copy the mappings, translating
1222 * from 8k -> 4k pages as we go.
1225 /* copy maps from 0xfee00000 to 0xff000000 */
1226 movel #0xfee00000, %d0
1227 moveq #ROOT_INDEX_SHIFT, %d1
1229 mmu_get_root_table_entry %d0
1231 movel #0xfee00000, %d0
1232 moveq #PTR_INDEX_SHIFT, %d1
1234 andl #PTR_TABLE_SIZE-1, %d0
1235 mmu_get_ptr_table_entry %a0,%d0
1237 movel #0xfee00000, %d0
1238 moveq #PAGE_INDEX_SHIFT, %d1
1240 andl #PAGE_TABLE_SIZE-1, %d0
1241 mmu_get_page_table_entry %a0,%d0
1243 /* this is where the prom page table lives */
1244 movel 0xfefe00d4, %a1
1247 movel #((0x200000 >> 13)-1), %d1
1257 /* setup tt1 for I/O */
1258 mmu_map_tt #1,#0x40000000,#0x40000000,#_PAGE_NOCACHE_S
1259 jbra L(mmu_init_done)
1264 #ifdef CONFIG_APOLLO
1265 is_not_apollo(L(notapollo))
1268 mmu_map #0x80000000,#0,#0x02000000,#_PAGE_NOCACHE030
1271 jbra L(mmu_init_done)
1282 * On the 040 class machines, all pages that are used for the
1283 * mmu have to be fixed up. According to Motorola, pages holding mmu
1284 * tables should be non-cacheable on a '040 and write-through on a
1285 * '060. But analysis of the reasons for this, and practical
1286 * experience, showed that write-through also works on a '040.
1288 * Allocated memory so far goes from kernel_end to memory_start that
1289 * is used for all kind of tables, for that the cache attributes
1294 is_not_040_or_060(L(mmu_fixup_done))
1296 #ifdef MMU_NOCACHE_KERNEL
1297 jbra L(mmu_fixup_done)
1300 /* first fix the page at the start of the kernel, that
1301 * contains also kernel_pg_dir.
1303 movel %pc@(L(phys_kernel_start)),%d0
1304 subl #PAGE_OFFSET,%d0
1305 lea %pc@(_stext),%a0
1307 mmu_fixup_page_mmu_cache %a0
1309 movel %pc@(L(kernel_end)),%a0
1311 movel %pc@(L(memory_start)),%a1
1315 mmu_fixup_page_mmu_cache %a0
1330 * This chunk of code performs the gruesome task of engaging the MMU.
1331 * The reason its gruesome is because when the MMU becomes engaged it
1332 * maps logical addresses to physical addresses. The Program Counter
1333 * register is then passed through the MMU before the next instruction
1334 * is fetched (the instruction following the engage MMU instruction).
1335 * This may mean one of two things:
1336 * 1. The Program Counter falls within the logical address space of
1337 * the kernel of which there are two sub-possibilities:
1338 * A. The PC maps to the correct instruction (logical PC == physical
1339 * code location), or
1340 * B. The PC does not map through and the processor will read some
1341 * data (or instruction) which is not the logically next instr.
1342 * As you can imagine, A is good and B is bad.
1344 * 2. The Program Counter does not map through the MMU. The processor
1345 * will take a Bus Error.
1346 * Clearly, 2 is bad.
1347 * It doesn't take a wiz kid to figure you want 1.A.
1348 * This code creates that possibility.
1349 * There are two possible 1.A. states (we now ignore the other above states):
1350 * A. The kernel is located at physical memory addressed the same as
1351 * the logical memory for the kernel, i.e., 0x01000.
1352 * B. The kernel is located some where else. e.g., 0x0400.0000
1354 * Under some conditions the Macintosh can look like A or B.
1355 * [A friend and I once noted that Apple hardware engineers should be
1356 * wacked twice each day: once when they show up at work (as in, Whack!,
1357 * "This is for the screwy hardware we know you're going to design today."),
1358 * and also at the end of the day (as in, Whack! "I don't know what
1359 * you designed today, but I'm sure it wasn't good."). -- rst]
1361 * This code works on the following premise:
1362 * If the kernel start (%d5) is within the first 16 Meg of RAM,
1363 * then create a mapping for the kernel at logical 0x8000.0000 to
1364 * the physical location of the pc. And, create a transparent
1365 * translation register for the first 16 Meg. Then, after the MMU
1366 * is engaged, the PC can be moved up into the 0x8000.0000 range
1367 * and then the transparent translation can be turned off and then
1368 * the PC can jump to the correct logical location and it will be
1369 * home (finally). This is essentially the code that the Amiga used
1370 * to use. Now, it's generalized for all processors. Which means
1371 * that a fresh (but temporary) mapping has to be created. The mapping
1372 * is made in page 0 (an as of yet unused location -- except for the
1373 * stack!). This temporary mapping will only require 1 pointer table
1374 * and a single page table (it can map 256K).
1376 * OK, alternatively, imagine that the Program Counter is not within
1377 * the first 16 Meg. Then, just use Transparent Translation registers
1378 * to do the right thing.
1380 * Last, if _start is already at 0x01000, then there's nothing special
1381 * to do (in other words, in a degenerate case of the first case above,
1394 * After this point no new memory is allocated and
1395 * the start of available memory is stored in availmem.
1396 * (The bootmem allocator requires now the physicall address.)
1399 movel L(memory_start),availmem
1403 /* fixup the Amiga custom register location before printing */
1410 /* fixup the Atari iobase register location before printing */
1411 movel #0xff000000,L(iobase)
1417 movel #~VIDEOMEMMASK,%d0
1418 andl L(mac_videobase),%d0
1419 addl #VIDEOMEMBASE,%d0
1420 movel %d0,L(mac_videobase)
1421 #if defined(CONSOLE)
1422 movel %pc@(L(phys_kernel_start)),%d0
1423 subl #PAGE_OFFSET,%d0
1424 subl %d0,L(console_font)
1425 subl %d0,L(console_font_data)
1428 orl #0x50000000,L(mac_sccbase)
1436 * Fix up the iobase register to point to the new location of the LEDs.
1438 movel #0xf0000000,L(iobase)
1441 * Energise the FPU and caches.
1444 movel #0x60,0xf05f400c
1448 * 040: slightly different, apparently.
1450 1: movew #0,0xf05f400e
1451 movew #0x64,0xf05f400e
1459 oriw #0x4000,0x61000000
1463 #ifdef CONFIG_APOLLO
1467 * Fix up the iobase before printing
1469 movel #0x80000000,L(iobase)
1480 is_not_040_or_060(L(cache_not_680460))
1488 is_060(L(cache68060))
1490 movel #CC6_ENABLE_D+CC6_ENABLE_I,%d0
1491 /* MMU stuff works in copyback mode now, so enable the cache */
1496 movel #CC6_ENABLE_D+CC6_ENABLE_I+CC6_ENABLE_SB+CC6_PUSH_DPI+CC6_ENABLE_B+CC6_CLRA_B,%d0
1497 /* MMU stuff works in copyback mode now, so enable the cache */
1499 /* enable superscalar dispatch in PCR */
1505 L(cache_not_680460):
1508 movel #CC3_ENABLE_DB+CC3_CLR_D+CC3_ENABLE_D+CC3_ENABLE_IB+CC3_CLR_I+CC3_ENABLE_I,%d0
1518 * Setup initial stack pointer
1520 lea init_task,%curptr
1521 lea init_thread_union+THREAD_SIZE,%sp
1525 subl %a6,%a6 /* clear a6 for gdb */
1528 * The new 64bit printf support requires an early exception initialization.
1532 /* jump to the kernel start */
1540 * Find a tag record in the bootinfo structure
1541 * The bootinfo structure is located right after the kernel
1542 * Returns: d0: size (-1 if not found)
1543 * a0: data pointer (end-of-records if not found)
1545 func_start get_bi_record,%d1
1549 1: tstw %a0@(BIR_TAG)
1551 cmpw %a0@(BIR_TAG),%d0
1553 addw %a0@(BIR_SIZE),%a0
1556 movew %a0@(BIR_SIZE),%d0
1557 lea %a0@(BIR_DATA),%a0
1560 lea %a0@(BIR_SIZE),%a0
1562 func_return get_bi_record
1566 * MMU Initialization Begins Here
1568 * The structure of the MMU tables on the 68k machines
1571 * Logical addresses are translated through
1572 * a hierarchical translation mechanism where the high-order
1573 * seven bits of the logical address (LA) are used as an
1574 * index into the "root table." Each entry in the root
1575 * table has a bit which specifies if it's a valid pointer to a
1576 * pointer table. Each entry defines a 32KMeg range of memory.
1577 * If an entry is invalid then that logical range of 32M is
1578 * invalid and references to that range of memory (when the MMU
1579 * is enabled) will fault. If the entry is valid, then it does
1580 * one of two things. On 040/060 class machines, it points to
1581 * a pointer table which then describes more finely the memory
1582 * within that 32M range. On 020/030 class machines, a technique
1583 * called "early terminating descriptors" are used. This technique
1584 * allows an entire 32Meg to be described by a single entry in the
1585 * root table. Thus, this entry in the root table, contains the
1586 * physical address of the memory or I/O at the logical address
1587 * which the entry represents and it also contains the necessary
1588 * cache bits for this region.
1591 * Per the Root Table, there will be one or more
1592 * pointer tables. Each pointer table defines a 32M range.
1593 * Not all of the 32M range need be defined. Again, the next
1594 * seven bits of the logical address are used an index into
1595 * the pointer table to point to page tables (if the pointer
1596 * is valid). There will undoubtedly be more than one
1597 * pointer table for the kernel because each pointer table
1598 * defines a range of only 32M. Valid pointer table entries
1599 * point to page tables, or are early terminating entries
1603 * Per the Pointer Tables, each page table entry points
1604 * to the physical page in memory that supports the logical
1605 * address that translates to the particular index.
1607 * In short, the Logical Address gets translated as follows:
1608 * bits 31..26 - index into the Root Table
1609 * bits 25..18 - index into the Pointer Table
1610 * bits 17..12 - index into the Page Table
1611 * bits 11..0 - offset into a particular 4K page
1613 * The algorithms which follows do one thing: they abstract
1614 * the MMU hardware. For example, there are three kinds of
1615 * cache settings that are relevant. Either, memory is
1616 * being mapped in which case it is either Kernel Code (or
1617 * the RamDisk) or it is MMU data. On the 030, the MMU data
1618 * option also describes the kernel. Or, I/O is being mapped
1619 * in which case it has its own kind of cache bits. There
1620 * are constants which abstract these notions from the code that
1621 * actually makes the call to map some range of memory.
1631 * This algorithm will print out the current MMU mappings.
1634 * %a5 points to the root table. Everything else is calculated
1638 #define mmu_next_valid 0
1639 #define mmu_start_logical 4
1640 #define mmu_next_logical 8
1641 #define mmu_start_physical 12
1642 #define mmu_next_physical 16
1644 #define MMU_PRINT_INVALID -1
1645 #define MMU_PRINT_VALID 1
1646 #define MMU_PRINT_UNINITED 0
1648 #define putZc(z,n) jbne 1f; putc z; jbra 2f; 1: putc n; 2:
1650 func_start mmu_print,%a0-%a6/%d0-%d7
1652 movel %pc@(L(kernel_pgdir_ptr)),%a5
1653 lea %pc@(L(mmu_print_data)),%a0
1654 movel #MMU_PRINT_UNINITED,%a0@(mmu_next_valid)
1656 is_not_040_or_060(mmu_030_print)
1665 * The following #if/#endif block is a tight algorithm for dumping the 040
1666 * MMU Map in gory detail. It really isn't that practical unless the
1667 * MMU Map algorithm appears to go awry and you need to debug it at the
1668 * entry per entry level.
1670 movel #ROOT_TABLE_SIZE,%d5
1672 movel %a5@+,%d7 | Burn an entry to skip the kernel mappings,
1673 subql #1,%d5 | they (might) work
1683 andil #0xFFFFFE00,%d7
1685 movel #PTR_TABLE_SIZE,%d4
1695 andil #0xFFFFFF00,%d7
1697 movel #PAGE_TABLE_SIZE,%d3
1711 movel #8+1+8+1+1,%d2
1726 #endif /* MMU 040 Dumping code that's gory and detailed */
1728 lea %pc@(kernel_pg_dir),%a5
1729 movel %a5,%a0 /* a0 has the address of the root table ptr */
1730 movel #0x00000000,%a4 /* logical address */
1733 /* Increment the logical address and preserve in d5 */
1735 addil #PAGESIZE<<13,%d5
1739 jbsr mmu_print_tuple_invalidate
1743 andil #0xfffffe00,%d6
1747 addil #PAGESIZE<<6,%d5
1751 jbsr mmu_print_tuple_invalidate
1755 andil #0xffffff00,%d6
1763 jbsr mmu_print_tuple_invalidate
1766 moveml %d0-%d1,%sp@-
1769 andil #0xfffff4e0,%d1
1770 lea %pc@(mmu_040_print_flags),%a6
1771 jbsr mmu_print_tuple
1772 moveml %sp@+,%d0-%d1
1784 movel %d5,%a4 /* move to the next logical address */
1792 andiw #0x8000,%d1 /* is it valid ? */
1793 jbeq 1f /* No, bail out */
1796 andil #0xff000000,%d1 /* Get the address */
1802 jbsr mmu_040_print_flags_tt
1806 andiw #0x8000,%d1 /* is it valid ? */
1807 jbeq 1f /* No, bail out */
1810 andil #0xff000000,%d1 /* Get the address */
1816 jbsr mmu_040_print_flags_tt
1822 mmu_040_print_flags:
1824 putZc(' ','G') /* global bit */
1826 putZc(' ','S') /* supervisor bit */
1827 mmu_040_print_flags_tt:
1832 putZc('w','c') /* write through or copy-back */
1837 putZc('s',' ') /* serialized non-cacheable, or non-cacheable */
1841 mmu_030_print_flags:
1843 putZc('C','I') /* write through or copy-back */
1852 andil #0xfffffff0,%d0
1854 movel #0x00000000,%a4 /* logical address */
1858 addil #PAGESIZE<<13,%d5
1860 btst #1,%d6 /* is it a table ptr? */
1862 btst #0,%d6 /* is it early terminating? */
1864 jbsr mmu_030_print_helper
1867 jbsr mmu_print_tuple_invalidate
1871 andil #0xfffffff0,%d6
1875 addil #PAGESIZE<<6,%d5
1877 btst #1,%d6 /* is it a table ptr? */
1879 btst #0,%d6 /* is it a page descriptor? */
1881 jbsr mmu_030_print_helper
1884 jbsr mmu_print_tuple_invalidate
1888 andil #0xfffffff0,%d6
1896 jbsr mmu_print_tuple_invalidate
1899 jbsr mmu_030_print_helper
1911 movel %d5,%a4 /* move to the next logical address */
1919 func_return mmu_print
1922 mmu_030_print_helper:
1923 moveml %d0-%d1,%sp@-
1926 lea %pc@(mmu_030_print_flags),%a6
1927 jbsr mmu_print_tuple
1928 moveml %sp@+,%d0-%d1
1931 mmu_print_tuple_invalidate:
1932 moveml %a0/%d7,%sp@-
1934 lea %pc@(L(mmu_print_data)),%a0
1935 tstl %a0@(mmu_next_valid)
1936 jbmi mmu_print_tuple_invalidate_exit
1938 movel #MMU_PRINT_INVALID,%a0@(mmu_next_valid)
1944 mmu_print_tuple_invalidate_exit:
1945 moveml %sp@+,%a0/%d7
1950 moveml %d0-%d7/%a0,%sp@-
1952 lea %pc@(L(mmu_print_data)),%a0
1954 tstl %a0@(mmu_next_valid)
1955 jble mmu_print_tuple_print
1957 cmpl %a0@(mmu_next_physical),%d1
1958 jbeq mmu_print_tuple_increment
1960 mmu_print_tuple_print:
1968 mmu_print_tuple_record:
1969 movel #MMU_PRINT_VALID,%a0@(mmu_next_valid)
1971 movel %d1,%a0@(mmu_next_physical)
1973 mmu_print_tuple_increment:
1976 addl %d7,%a0@(mmu_next_physical)
1978 mmu_print_tuple_exit:
1979 moveml %sp@+,%d0-%d7/%a0
1982 mmu_print_machine_cpu_types:
2004 is_not_040_or_060(2f)
2012 #endif /* MMU_PRINT */
2017 * This is a specific function which works on all 680x0 machines.
2018 * On 030, 040 & 060 it will attempt to use Transparent Translation
2020 * On 020 it will call the standard mmu_map which will use early
2021 * terminating descriptors.
2023 func_start mmu_map_tt,%d0/%d1/%a0,4
2034 /* Extract the highest bit set
2036 bfffo ARG3{#0,#32},%d1
2052 /* Generate the upper 16bit of the tt register
2058 is_040_or_060(L(mmu_map_tt_040))
2060 /* set 030 specific bits (read/write access for supervisor mode
2061 * (highest function code set, lower two bits masked))
2063 orw #TTR_ENABLE+TTR_RWM+TTR_FCB2+TTR_FCM1+TTR_FCM0,%d1
2079 jra L(mmu_map_tt_done)
2081 /* set 040 specific bits
2084 orw #TTR_ENABLE+TTR_KERNELMODE,%d1
2098 jra L(mmu_map_tt_done)
2101 mmu_map_eq ARG2,ARG3,ARG4
2105 func_return mmu_map_tt
2110 * This routine will map a range of memory using a pointer
2111 * table and allocating the pages on the fly from the kernel.
2112 * The pointer table does not have to be already linked into
2113 * the root table, this routine will do that if necessary.
2116 * This routine will assert failure and use the serial_putc
2117 * routines in the case of a run-time error. For example,
2118 * if the address is already mapped.
2121 * This routine will use early terminating descriptors
2122 * where possible for the 68020+68851 and 68030 type
2125 func_start mmu_map,%d0-%d4/%a0-%a4
2134 /* Get logical address and round it down to 256KB
2137 andl #-(PAGESIZE*PAGE_TABLE_SIZE),%d0
2140 /* Get the end address
2146 /* Get physical address and round it down to 256KB
2149 andl #-(PAGESIZE*PAGE_TABLE_SIZE),%d0
2152 /* Add page attributes to the physical address
2155 orw #_PAGE_PRESENT+_PAGE_ACCESSED+_PAGE_DIRTY,%d0
2162 is_not_040_or_060(L(mmu_map_030))
2164 addw #_PAGE_GLOBAL040,%a2
2166 * MMU 040 & 060 Support
2168 * The MMU usage for the 040 and 060 is different enough from
2169 * the 030 and 68851 that there is separate code. This comment
2170 * block describes the data structures and algorithms built by
2173 * The 040 does not support early terminating descriptors, as
2174 * the 030 does. Therefore, a third level of table is needed
2175 * for the 040, and that would be the page table. In Linux,
2176 * page tables are allocated directly from the memory above the
2182 /* Calculate the offset into the root table
2185 moveq #ROOT_INDEX_SHIFT,%d1
2187 mmu_get_root_table_entry %d0
2189 /* Calculate the offset into the pointer table
2192 moveq #PTR_INDEX_SHIFT,%d1
2194 andl #PTR_TABLE_SIZE-1,%d0
2195 mmu_get_ptr_table_entry %a0,%d0
2197 /* Calculate the offset into the page table
2200 moveq #PAGE_INDEX_SHIFT,%d1
2202 andl #PAGE_TABLE_SIZE-1,%d0
2203 mmu_get_page_table_entry %a0,%d0
2205 /* The page table entry must not no be busy
2208 jne L(mmu_map_error)
2210 /* Do the mapping and advance the pointers
2217 /* Ready with mapping?
2225 /* Calculate the offset into the root table
2228 moveq #ROOT_INDEX_SHIFT,%d1
2230 mmu_get_root_table_entry %d0
2232 /* Check if logical address 32MB aligned,
2233 * so we can try to map it once
2236 andl #(PTR_TABLE_SIZE*PAGE_TABLE_SIZE*PAGESIZE-1)&(-ROOT_TABLE_SIZE),%d0
2239 /* Is there enough to map for 32MB at once
2241 lea %a3@(PTR_TABLE_SIZE*PAGE_TABLE_SIZE*PAGESIZE-1),%a1
2247 /* The root table entry must not no be busy
2250 jne L(mmu_map_error)
2252 /* Do the mapping and advance the pointers
2262 lea %a2@(PTR_TABLE_SIZE*PAGE_TABLE_SIZE*PAGESIZE),%a2
2263 jra L(mmu_mapnext_030)
2265 /* Calculate the offset into the pointer table
2268 moveq #PTR_INDEX_SHIFT,%d1
2270 andl #PTR_TABLE_SIZE-1,%d0
2271 mmu_get_ptr_table_entry %a0,%d0
2273 /* The pointer table entry must not no be busy
2276 jne L(mmu_map_error)
2278 /* Do the mapping and advance the pointers
2286 addl #PAGE_TABLE_SIZE*PAGESIZE,%a2
2287 addl #PAGE_TABLE_SIZE*PAGESIZE,%a3
2290 /* Ready with mapping?
2299 dputs "mmu_map error:"
2311 * On the 040 class machines, all pages that are used for the
2312 * mmu have to be fixed up.
2315 func_start mmu_fixup_page_mmu_cache,%d0/%a0
2317 dputs "mmu_fixup_page_mmu_cache"
2320 /* Calculate the offset into the root table
2323 moveq #ROOT_INDEX_SHIFT,%d1
2325 mmu_get_root_table_entry %d0
2327 /* Calculate the offset into the pointer table
2330 moveq #PTR_INDEX_SHIFT,%d1
2332 andl #PTR_TABLE_SIZE-1,%d0
2333 mmu_get_ptr_table_entry %a0,%d0
2335 /* Calculate the offset into the page table
2338 moveq #PAGE_INDEX_SHIFT,%d1
2340 andl #PAGE_TABLE_SIZE-1,%d0
2341 mmu_get_page_table_entry %a0,%d0
2344 andil #_CACHEMASK040,%d0
2345 orl %pc@(m68k_pgtable_cachemode),%d0
2350 func_return mmu_fixup_page_mmu_cache
2355 * create a temporary mapping to enable the mmu,
2356 * this we don't need any transparation translation tricks.
2359 func_start mmu_temp_map,%d0/%d1/%a0/%a1
2361 dputs "mmu_temp_map"
2366 lea %pc@(L(temp_mmap_mem)),%a1
2368 /* Calculate the offset in the root table
2371 moveq #ROOT_INDEX_SHIFT,%d1
2373 mmu_get_root_table_entry %d0
2375 /* Check if the table is temporary allocated, so we have to reuse it
2378 cmpl %pc@(L(memory_start)),%d0
2381 /* Temporary allocate a ptr table and insert it into the root table
2384 addl #PTR_TABLE_SIZE*4,%a1@
2385 orw #_PAGE_TABLE+_PAGE_ACCESSED,%d0
2390 /* Mask the root table entry for the ptr table
2392 andw #-ROOT_TABLE_SIZE,%d0
2395 /* Calculate the offset into the pointer table
2398 moveq #PTR_INDEX_SHIFT,%d1
2400 andl #PTR_TABLE_SIZE-1,%d0
2404 /* Check if a temporary page table is already allocated
2409 /* Temporary allocate a page table and insert it into the ptr table
2412 /* The 512 should be PAGE_TABLE_SIZE*4, but that violates the
2413 alignment restriction for pointer tables on the '0[46]0. */
2415 orw #_PAGE_TABLE+_PAGE_ACCESSED,%d0
2420 /* Mask the ptr table entry for the page table
2422 andw #-PTR_TABLE_SIZE,%d0
2425 /* Calculate the offset into the page table
2428 moveq #PAGE_INDEX_SHIFT,%d1
2430 andl #PAGE_TABLE_SIZE-1,%d0
2434 /* Insert the address into the page table
2438 orw #_PAGE_PRESENT+_PAGE_ACCESSED+_PAGE_DIRTY,%d0
2444 func_return mmu_temp_map
2446 func_start mmu_engage,%d0-%d2/%a0-%a3
2448 moveq #ROOT_TABLE_SIZE-1,%d0
2449 /* Temporarily use a different root table. */
2450 lea %pc@(L(kernel_pgdir_ptr)),%a0
2452 movel %pc@(L(memory_start)),%a1
2459 lea %pc@(L(temp_mmap_mem)),%a0
2462 movew #PAGESIZE-1,%d0
2469 /* Skip temp mappings if phys == virt */
2473 mmu_temp_map %a0,%a0
2474 mmu_temp_map %a0,%a1
2478 mmu_temp_map %a0,%a0
2479 mmu_temp_map %a0,%a1
2481 movel %pc@(L(memory_start)),%a3
2482 movel %pc@(L(phys_kernel_start)),%d2
2484 is_not_040_or_060(L(mmu_engage_030))
2494 movel #TC_ENABLE+TC_PAGE4K,%d0
2495 movec %d0,%tc /* enable the MMU */
2504 jra L(mmu_engage_cleanup)
2506 L(mmu_engage_030_temp):
2510 lea %pc@(L(mmu_engage_030_temp)),%a0
2511 movel #0x80000002,%a0@
2518 * enable,super root enable,4096 byte pages,7 bit root index,
2519 * 7 bit pointer index, 6 bit page table index.
2521 movel #0x82c07760,%a0@(8)
2522 pmove %a0@(8),%tc /* enable the MMU */
2524 1: movel %a2,%a0@(4)
2531 L(mmu_engage_cleanup):
2532 subl #PAGE_OFFSET,%d2
2534 movel %a2,L(kernel_pgdir_ptr)
2539 func_return mmu_engage
2541 func_start mmu_get_root_table_entry,%d0/%a1
2544 dputs "mmu_get_root_table_entry:"
2549 movel %pc@(L(kernel_pgdir_ptr)),%a0
2555 /* Find the start of free memory, get_bi_record does this for us,
2556 * as the bootinfo structure is located directly behind the kernel
2557 * and and we simply search for the last entry.
2559 get_bi_record BI_LAST
2560 addw #PAGESIZE-1,%a0
2566 lea %pc@(L(memory_start)),%a0
2568 lea %pc@(L(kernel_end)),%a0
2571 /* we have to return the first page at _stext since the init code
2572 * in mm/init.c simply expects kernel_pg_dir there, the rest of
2573 * page is used for further ptr tables in get_ptr_table.
2575 lea %pc@(_stext),%a0
2576 lea %pc@(L(mmu_cached_pointer_tables)),%a1
2578 addl #ROOT_TABLE_SIZE*4,%a1@
2580 lea %pc@(L(mmu_num_pointer_tables)),%a1
2586 movew #PAGESIZE/4-1,%d0
2591 lea %pc@(L(kernel_pgdir_ptr)),%a1
2605 func_return mmu_get_root_table_entry
2609 func_start mmu_get_ptr_table_entry,%d0/%a1
2612 dputs "mmu_get_ptr_table_entry:"
2622 /* Keep track of the number of pointer tables we use
2624 dputs "\nmmu_get_new_ptr_table:"
2625 lea %pc@(L(mmu_num_pointer_tables)),%a0
2629 /* See if there is a free pointer table in our cache of pointer tables
2631 lea %pc@(L(mmu_cached_pointer_tables)),%a1
2635 /* Get a new pointer table page from above the kernel memory
2640 /* There is an unused pointer table in our cache... use it
2643 addl #PTR_TABLE_SIZE*4,%a1@
2648 /* Insert the new pointer table into the root table
2651 orw #_PAGE_TABLE+_PAGE_ACCESSED,%d0
2654 /* Extract the pointer table entry
2656 andw #-PTR_TABLE_SIZE,%d0
2666 func_return mmu_get_ptr_table_entry
2669 func_start mmu_get_page_table_entry,%d0/%a1
2672 dputs "mmu_get_page_table_entry:"
2682 /* If the page table entry doesn't exist, we allocate a complete new
2683 * page and use it as one continues big page table which can cover
2684 * 4MB of memory, nearly almost all mappings have that alignment.
2687 addw #_PAGE_TABLE+_PAGE_ACCESSED,%a0
2689 /* align pointer table entry for a page of page tables
2692 andw #-(PAGESIZE/PAGE_TABLE_SIZE),%d0
2695 /* Insert the page tables into the pointer entries
2697 moveq #PAGESIZE/PAGE_TABLE_SIZE/4-1,%d0
2700 lea %a0@(PAGE_TABLE_SIZE*4),%a0
2703 /* Now we can get the initialized pointer table entry
2708 /* Extract the page table entry
2710 andw #-PAGE_TABLE_SIZE,%d0
2720 func_return mmu_get_page_table_entry
2725 * Return a new page from the memory start and clear it.
2727 func_start get_new_page,%d0/%a1
2729 dputs "\nget_new_page:"
2731 /* allocate the page and adjust memory_start
2733 lea %pc@(L(memory_start)),%a0
2737 /* clear the new page
2740 movew #PAGESIZE/4-1,%d0
2748 func_return get_new_page
2753 * Debug output support
2754 * Atarians have a choice between the parallel port, the serial port
2755 * from the MFP or a serial port of the SCC
2760 L(scc_initable_mac):
2761 .byte 4,0x44 /* x16, 1 stopbit, no parity */
2762 .byte 3,0xc0 /* receiver: 8 bpc */
2763 .byte 5,0xe2 /* transmitter: 8 bpc, assert dtr/rts */
2764 .byte 10,0 /* NRZ */
2765 .byte 11,0x50 /* use baud rate generator */
2766 .byte 12,1,13,0 /* 38400 baud */
2767 .byte 14,1 /* Baud rate generator enable */
2768 .byte 3,0xc1 /* enable receiver */
2769 .byte 5,0xea /* enable transmitter */
2775 /* #define USE_PRINTER */
2776 /* #define USE_SCC_B */
2777 /* #define USE_SCC_A */
2780 #if defined(USE_SCC_A) || defined(USE_SCC_B)
2782 /* Initialisation table for SCC */
2784 .byte 9,12 /* Reset */
2785 .byte 4,0x44 /* x16, 1 stopbit, no parity */
2786 .byte 3,0xc0 /* receiver: 8 bpc */
2787 .byte 5,0xe2 /* transmitter: 8 bpc, assert dtr/rts */
2788 .byte 9,0 /* no interrupts */
2789 .byte 10,0 /* NRZ */
2790 .byte 11,0x50 /* use baud rate generator */
2791 .byte 12,24,13,0 /* 9600 baud */
2792 .byte 14,2,14,3 /* use master clock for BRG, enable */
2793 .byte 3,0xc1 /* enable receiver */
2794 .byte 5,0xea /* enable transmitter */
2801 LPSG_SELECT = 0xff8800
2802 LPSG_READ = 0xff8800
2803 LPSG_WRITE = 0xff8802
2807 LSTMFP_GPIP = 0xfffa01
2808 LSTMFP_DDR = 0xfffa05
2809 LSTMFP_IERB = 0xfffa09
2811 #elif defined(USE_SCC_B)
2813 LSCC_CTRL = 0xff8c85
2814 LSCC_DATA = 0xff8c87
2816 #elif defined(USE_SCC_A)
2818 LSCC_CTRL = 0xff8c81
2819 LSCC_DATA = 0xff8c83
2821 #elif defined(USE_MFP)
2824 LMFP_TDCDR = 0xfffa1d
2825 LMFP_TDDR = 0xfffa25
2830 #endif /* CONFIG_ATARI */
2833 * Serial port output support.
2837 * Initialize serial port hardware for 9600/8/1
2839 func_start serial_init,%d0/%d1/%a0/%a1
2841 * Some of the register usage that follows
2843 * a0 = pointer to boot info record
2844 * d0 = boot info offset
2846 * a0 = address of SCC
2847 * a1 = Liobase address/address of scc_initable
2848 * d0 = init data for serial port
2850 * a0 = address of SCC
2851 * a1 = address of scc_initable_mac
2852 * d0 = init data for serial port
2856 #define SERIAL_DTR 7
2857 #define SERIAL_CNTRL CIABBASE+C_PRA
2860 lea %pc@(L(custom)),%a0
2861 movel #-ZTWOBASE,%a0@
2862 bclr #SERIAL_DTR,SERIAL_CNTRL-ZTWOBASE
2863 get_bi_record BI_AMIGA_SERPER
2864 movew %a0@,CUSTOMBASE+C_SERPER-ZTWOBASE
2865 | movew #61,CUSTOMBASE+C_SERPER-ZTWOBASE
2870 movel %pc@(L(iobase)),%a1
2871 #if defined(USE_PRINTER)
2872 bclr #0,%a1@(LSTMFP_IERB)
2873 bclr #0,%a1@(LSTMFP_DDR)
2874 moveb #LPSG_CONTROL,%a1@(LPSG_SELECT)
2875 moveb #0xff,%a1@(LPSG_WRITE)
2876 moveb #LPSG_IO_B,%a1@(LPSG_SELECT)
2877 clrb %a1@(LPSG_WRITE)
2878 moveb #LPSG_IO_A,%a1@(LPSG_SELECT)
2879 moveb %a1@(LPSG_READ),%d0
2881 moveb %d0,%a1@(LPSG_WRITE)
2882 #elif defined(USE_SCC)
2883 lea %a1@(LSCC_CTRL),%a0
2884 lea %pc@(L(scc_initable)),%a1
2891 #elif defined(USE_MFP)
2892 bclr #1,%a1@(LMFP_TSR)
2893 moveb #0x88,%a1@(LMFP_UCR)
2894 andb #0x70,%a1@(LMFP_TDCDR)
2895 moveb #2,%a1@(LMFP_TDDR)
2896 orb #1,%a1@(LMFP_TDCDR)
2897 bset #1,%a1@(LMFP_TSR)
2899 jra L(serial_init_done)
2903 is_not_mac(L(serial_init_not_mac))
2907 /* You may define either or both of these. */
2908 #define MAC_USE_SCC_A /* Modem port */
2909 #define MAC_USE_SCC_B /* Printer port */
2911 #define mac_scc_cha_b_ctrl_offset 0x0
2912 #define mac_scc_cha_a_ctrl_offset 0x2
2913 #define mac_scc_cha_b_data_offset 0x4
2914 #define mac_scc_cha_a_data_offset 0x6
2916 #if defined(MAC_USE_SCC_A) || defined(MAC_USE_SCC_B)
2917 movel %pc@(L(mac_sccbase)),%a0
2918 /* Reset SCC register pointer */
2919 moveb %a0@(mac_scc_cha_a_ctrl_offset),%d0
2920 /* Reset SCC device: write register pointer then register value */
2921 moveb #9,%a0@(mac_scc_cha_a_ctrl_offset)
2922 moveb #0xc0,%a0@(mac_scc_cha_a_ctrl_offset)
2923 /* Wait for 5 PCLK cycles, which is about 68 CPU cycles */
2924 /* 5 / 3.6864 MHz = approx. 1.36 us = 68 / 50 MHz */
2931 #ifdef MAC_USE_SCC_A
2932 /* Initialize channel A */
2933 lea %pc@(L(scc_initable_mac)),%a1
2936 moveb %d0,%a0@(mac_scc_cha_a_ctrl_offset)
2937 moveb %a1@+,%a0@(mac_scc_cha_a_ctrl_offset)
2940 #endif /* MAC_USE_SCC_A */
2942 #ifdef MAC_USE_SCC_B
2943 /* Initialize channel B */
2944 lea %pc@(L(scc_initable_mac)),%a1
2947 moveb %d0,%a0@(mac_scc_cha_b_ctrl_offset)
2948 moveb %a1@+,%a0@(mac_scc_cha_b_ctrl_offset)
2951 #endif /* MAC_USE_SCC_B */
2953 #endif /* SERIAL_DEBUG */
2955 jra L(serial_init_done)
2956 L(serial_init_not_mac):
2957 #endif /* CONFIG_MAC */
2961 /* debug output goes into SRAM, so we don't do it unless requested
2962 - check for '%LX$' signature in SRAM */
2963 lea %pc@(q40_mem_cptr),%a1
2964 move.l #0xff020010,%a1@ /* must be inited - also used by debug=mem */
2965 move.l #0xff020000,%a1
2978 lea %pc@(L(q40_do_debug)),%a1
2980 /*nodbg: q40_do_debug is 0 by default*/
2984 #ifdef CONFIG_APOLLO
2985 /* We count on the PROM initializing SIO1 */
2989 /* We count on the boot loader initialising the UART */
2992 L(serial_init_done):
2993 func_return serial_init
2996 * Output character on serial port.
2998 func_start serial_putc,%d0/%d1/%a0/%a1
3004 /* A little safe recursion is good for the soul */
3012 movel %pc@(L(custom)),%a0
3013 movew %d0,%a0@(CUSTOMBASE+C_SERDAT)
3014 1: movew %a0@(CUSTOMBASE+C_SERDATR),%d0
3017 jra L(serial_putc_done)
3026 #if defined(MAC_USE_SCC_A) || defined(MAC_USE_SCC_B)
3027 movel %pc@(L(mac_sccbase)),%a1
3030 #ifdef MAC_USE_SCC_A
3031 3: btst #2,%a1@(mac_scc_cha_a_ctrl_offset)
3033 moveb %d0,%a1@(mac_scc_cha_a_data_offset)
3034 #endif /* MAC_USE_SCC_A */
3036 #ifdef MAC_USE_SCC_B
3037 4: btst #2,%a1@(mac_scc_cha_b_ctrl_offset)
3039 moveb %d0,%a1@(mac_scc_cha_b_data_offset)
3040 #endif /* MAC_USE_SCC_B */
3042 #endif /* SERIAL_DEBUG */
3044 jra L(serial_putc_done)
3046 #endif /* CONFIG_MAC */
3050 movel %pc@(L(iobase)),%a1
3051 #if defined(USE_PRINTER)
3052 3: btst #0,%a1@(LSTMFP_GPIP)
3054 moveb #LPSG_IO_B,%a1@(LPSG_SELECT)
3055 moveb %d0,%a1@(LPSG_WRITE)
3056 moveb #LPSG_IO_A,%a1@(LPSG_SELECT)
3057 moveb %a1@(LPSG_READ),%d0
3059 moveb %d0,%a1@(LPSG_WRITE)
3063 moveb %d0,%a1@(LPSG_WRITE)
3064 #elif defined(USE_SCC)
3065 3: btst #2,%a1@(LSCC_CTRL)
3067 moveb %d0,%a1@(LSCC_DATA)
3068 #elif defined(USE_MFP)
3069 3: btst #7,%a1@(LMFP_TSR)
3071 moveb %d0,%a1@(LMFP_UDR)
3073 jra L(serial_putc_done)
3075 #endif /* CONFIG_ATARI */
3077 #ifdef CONFIG_MVME147
3079 1: btst #2,M147_SCC_CTRL_A
3081 moveb %d0,M147_SCC_DATA_A
3082 jbra L(serial_putc_done)
3086 #ifdef CONFIG_MVME16x
3089 * If the loader gave us a board type then we can use that to
3090 * select an appropriate output routine; otherwise we just use
3091 * the Bug code. If we have to use the Bug that means the Bug
3092 * workspace has to be valid, which means the Bug has to use
3093 * the SRAM, which is non-standard.
3095 moveml %d0-%d7/%a2-%a6,%sp@-
3096 movel vme_brdtype,%d1
3097 jeq 1f | No tag - use the Bug
3098 cmpi #VME_TYPE_MVME162,%d1
3100 cmpi #VME_TYPE_MVME172,%d1
3102 /* 162/172; it's an SCC */
3103 6: btst #2,M162_SCC_CTRL_A
3108 moveb #8,M162_SCC_CTRL_A
3112 moveb %d0,M162_SCC_CTRL_A
3115 /* 166/167/177; it's a CD2401 */
3117 moveb M167_CYIER,%d2
3118 moveb #0x02,M167_CYIER
3120 btst #5,M167_PCSCCTICR
3122 moveb M167_PCTPIACKR,%d1
3123 moveb M167_CYLICR,%d1
3125 moveb #0x08,M167_CYTEOIR
3128 moveb %d0,M167_CYTDR
3129 moveb #0,M167_CYTEOIR
3130 moveb %d2,M167_CYIER
3135 .word 0x0020 /* TRAP 0x020 */
3137 moveml %sp@+,%d0-%d7/%a2-%a6
3138 jbra L(serial_putc_done)
3140 #endif /* CONFIG_MVME16x */
3142 #ifdef CONFIG_BVME6000
3145 * The BVME6000 machine has a serial port ...
3147 1: btst #2,BVME_SCC_CTRL_A
3149 moveb %d0,BVME_SCC_DATA_A
3150 jbra L(serial_putc_done)
3157 movel 0xFEFE0018,%a1
3160 jbra L(serial_putc_done)
3166 tst.l %pc@(L(q40_do_debug)) /* only debug if requested */
3168 lea %pc@(q40_mem_cptr),%a1
3173 jbra L(serial_putc_done)
3177 #ifdef CONFIG_APOLLO
3179 movl %pc@(L(iobase)),%a1
3180 moveb %d0,%a1@(LTHRB0)
3181 1: moveb %a1@(LSRB0),%d0
3184 jbra L(serial_putc_done)
3190 movl %pc@(L(iobase)),%a1
3191 addl %pc@(L(uartbase)),%a1
3192 movel %pc@(L(uart_scode)),%d1 /* Check the scode */
3193 jmi 3f /* Unset? Exit */
3194 cmpi #256,%d1 /* APCI scode? */
3196 1: moveb %a1@(DCALSR),%d1 /* Output to DCA */
3199 moveb %d0,%a1@(DCADATA)
3200 jbra L(serial_putc_done)
3201 2: moveb %a1@(APCILSR),%d1 /* Output to APCI */
3204 moveb %d0,%a1@(APCIDATA)
3205 jbra L(serial_putc_done)
3209 L(serial_putc_done):
3210 func_return serial_putc
3215 func_start puts,%d0/%a0
3232 * Output number in hex notation.
3235 func_start putn,%d0-%d2
3247 addb #'A'-('9'+1),%d2
3263 * This routine takes its parameters on the stack. It then
3264 * turns around and calls the internal routines. This routine
3265 * is used by the boot console.
3267 * The calling parameters are:
3268 * void mac_early_print(const char *str, unsigned length);
3270 * This routine does NOT understand variable arguments only
3273 ENTRY(mac_early_print)
3274 moveml %d0/%d1/%a0,%sp@-
3277 movel %sp@(18),%a0 /* fetch parameter */
3278 movel %sp@(22),%d1 /* fetch parameter */
3293 moveml %sp@+,%d0/%d1/%a0
3295 #endif /* CONFIG_MAC */
3297 #if defined(CONFIG_HP300) || defined(CONFIG_APOLLO)
3298 func_start set_leds,%d0/%a0
3302 movel %pc@(L(iobase)),%a0
3303 moveb %d0,%a0@(0x1ffff)
3307 #ifdef CONFIG_APOLLO
3308 movel %pc@(L(iobase)),%a0
3311 moveb %d0,%a0@(LCPUCTRL)
3314 func_return set_leds
3319 * For continuity, see the data alignment
3320 * to which this structure is tied.
3322 #define Lconsole_struct_cur_column 0
3323 #define Lconsole_struct_cur_row 4
3324 #define Lconsole_struct_num_columns 8
3325 #define Lconsole_struct_num_rows 12
3326 #define Lconsole_struct_left_edge 16
3327 #define Lconsole_struct_penguin_putc 20
3329 func_start console_init,%a0-%a4/%d0-%d7
3331 * Some of the register usage that follows
3332 * a0 = pointer to boot_info
3333 * a1 = pointer to screen
3334 * a2 = pointer to Lconsole_globals
3335 * d3 = pixel width of screen
3336 * d4 = pixel height of screen
3337 * (d3,d4) ~= (x,y) of a point just below
3338 * and to the right of the screen
3339 * NOT on the screen!
3340 * d5 = number of bytes per scan line
3341 * d6 = number of bytes on the entire screen
3344 lea %pc@(L(console_globals)),%a2
3345 movel %pc@(L(mac_videobase)),%a1
3346 movel %pc@(L(mac_rowbytes)),%d5
3347 movel %pc@(L(mac_dimensions)),%d3 /* -> low byte */
3349 swap %d4 /* -> high byte */
3350 andl #0xffff,%d3 /* d3 = screen width in pixels */
3351 andl #0xffff,%d4 /* d4 = screen height in pixels */
3355 mulul %d4,%d6 /* scan line bytes x num scan lines */
3356 divul #8,%d6 /* we'll clear 8 bytes at a time */
3357 moveq #-1,%d0 /* Mac_black */
3360 L(console_clear_loop):
3363 dbra %d6,L(console_clear_loop)
3365 /* Calculate font size */
3367 #if defined(FONT_8x8) && defined(CONFIG_FONT_8x8)
3368 lea %pc@(font_vga_8x8),%a0
3369 #elif defined(FONT_8x16) && defined(CONFIG_FONT_8x16)
3370 lea %pc@(font_vga_8x16),%a0
3371 #elif defined(FONT_6x11) && defined(CONFIG_FONT_6x11)
3372 lea %pc@(font_vga_6x11),%a0
3373 #elif defined(CONFIG_FONT_8x8) /* default */
3374 lea %pc@(font_vga_8x8),%a0
3375 #else /* no compiled-in font */
3380 * At this point we make a shift in register usage
3381 * a1 = address of console_font pointer
3383 lea %pc@(L(console_font)),%a1
3384 movel %a0,%a1@ /* store pointer to struct fbcon_font_desc in console_font */
3387 lea %pc@(L(console_font_data)),%a4
3388 movel %a0@(FONT_DESC_DATA),%d0
3389 subl #L(console_font),%a1
3394 * Calculate global maxs
3395 * Note - we can use either an
3396 * 8 x 16 or 8 x 8 character font
3397 * 6 x 11 also supported
3399 /* ASSERT: a0 = contents of Lconsole_font */
3400 movel %d3,%d0 /* screen width in pixels */
3401 divul %a0@(FONT_DESC_WIDTH),%d0 /* d0 = max num chars per row */
3403 movel %d4,%d1 /* screen height in pixels */
3404 divul %a0@(FONT_DESC_HEIGHT),%d1 /* d1 = max num rows */
3406 movel %d0,%a2@(Lconsole_struct_num_columns)
3407 movel %d1,%a2@(Lconsole_struct_num_rows)
3410 * Clear the current row and column
3412 clrl %a2@(Lconsole_struct_cur_column)
3413 clrl %a2@(Lconsole_struct_cur_row)
3414 clrl %a2@(Lconsole_struct_left_edge)
3417 * Initialization is complete
3420 func_return console_init
3422 func_start console_put_stats,%a0/%d7
3424 * Some of the register usage that follows
3425 * a0 = pointer to boot_info
3426 * d7 = value of boot_info fields
3432 putn %pc@(L(mac_videobase)) /* video addr. */
3435 lea %pc@(_stext),%a0
3443 putn %pc@(L(cputype))
3447 putn %pc@(L(mac_sccbase))
3451 jbsr mmu_print_machine_cpu_types
3453 #endif /* SERIAL_DEBUG */
3457 func_return console_put_stats
3459 #ifdef CONSOLE_PENGUIN
3460 func_start console_put_penguin,%a0-%a1/%d0-%d7
3462 * Get 'that_penguin' onto the screen in the upper right corner
3463 * penguin is 64 x 74 pixels, align against right edge of screen
3465 lea %pc@(L(mac_dimensions)),%a0
3468 subil #64,%d0 /* snug up against the right edge */
3469 clrl %d1 /* start at the top */
3471 lea %pc@(L(that_penguin)),%a1
3472 L(console_penguin_row):
3474 L(console_penguin_pixel_pair):
3477 console_plot_pixel %d0,%d1,%d2
3480 console_plot_pixel %d0,%d1,%d2
3482 dbra %d6,L(console_penguin_pixel_pair)
3486 dbra %d7,L(console_penguin_row)
3488 func_return console_put_penguin
3490 /* include penguin bitmap */
3492 #include "../mac/mac_penguin.S"
3496 * Calculate source and destination addresses
3501 func_start console_scroll,%a0-%a4/%d0-%d7
3502 lea %pc@(L(mac_videobase)),%a0
3505 lea %pc@(L(mac_rowbytes)),%a0
3507 movel %pc@(L(console_font)),%a0
3510 mulul %a0@(FONT_DESC_HEIGHT),%d5 /* account for # scan lines per character */
3516 lea %pc@(L(mac_dimensions)),%a0
3520 andl #0xffff,%d3 /* d3 = screen width in pixels */
3521 andl #0xffff,%d4 /* d4 = screen height in pixels */
3524 * Calculate number of bytes to move
3526 lea %pc@(L(mac_rowbytes)),%a0
3528 movel %pc@(L(console_font)),%a0
3529 subl %a0@(FONT_DESC_HEIGHT),%d4 /* we're not scrolling the top row! */
3530 mulul %d4,%d6 /* scan line bytes x num scan lines */
3531 divul #32,%d6 /* we'll move 8 longs at a time */
3534 L(console_scroll_loop):
3543 dbra %d6,L(console_scroll_loop)
3545 lea %pc@(L(mac_rowbytes)),%a0
3547 movel %pc@(L(console_font)),%a0
3548 mulul %a0@(FONT_DESC_HEIGHT),%d6 /* scan line bytes x font height */
3549 divul #32,%d6 /* we'll move 8 words at a time */
3553 L(console_scroll_clear_loop):
3562 dbra %d6,L(console_scroll_clear_loop)
3565 func_return console_scroll
3568 func_start console_putc,%a0/%a1/%d0-%d7
3570 is_not_mac(L(console_exit))
3571 tstl %pc@(L(console_font))
3574 /* Output character in d7 on console.
3580 /* A little safe recursion is good for the soul */
3583 lea %pc@(L(console_globals)),%a0
3586 jne L(console_not_lf)
3587 movel %a0@(Lconsole_struct_cur_row),%d0
3589 movel %d0,%a0@(Lconsole_struct_cur_row)
3590 movel %a0@(Lconsole_struct_num_rows),%d1
3594 movel %d0,%a0@(Lconsole_struct_cur_row)
3601 jne L(console_not_cr)
3602 clrl %a0@(Lconsole_struct_cur_column)
3607 jne L(console_not_home)
3608 clrl %a0@(Lconsole_struct_cur_row)
3609 clrl %a0@(Lconsole_struct_cur_column)
3613 * At this point we know that the %d7 character is going to be
3614 * rendered on the screen. Register usage is -
3615 * a0 = pointer to console globals
3617 * d0 = cursor column
3618 * d1 = cursor row to draw the character
3619 * d7 = character number
3621 L(console_not_home):
3622 movel %a0@(Lconsole_struct_cur_column),%d0
3623 addql #1,%a0@(Lconsole_struct_cur_column)
3624 movel %a0@(Lconsole_struct_num_columns),%d1
3627 console_putc #'\n' /* recursion is OK! */
3629 movel %a0@(Lconsole_struct_cur_row),%d1
3632 * At this point we make a shift in register usage
3633 * a0 = address of pointer to font data (fbcon_font_desc)
3635 movel %pc@(L(console_font)),%a0
3636 movel %pc@(L(console_font_data)),%a1 /* Load fbcon_font_desc.data into a1 */
3637 andl #0x000000ff,%d7
3638 /* ASSERT: a0 = contents of Lconsole_font */
3639 mulul %a0@(FONT_DESC_HEIGHT),%d7 /* d7 = index into font data */
3640 addl %d7,%a1 /* a1 = points to char image */
3643 * At this point we make a shift in register usage
3644 * d0 = pixel coordinate, x
3645 * d1 = pixel coordinate, y
3646 * d2 = (bit 0) 1/0 for white/black (!) pixel on screen
3647 * d3 = font scan line data (8 pixels)
3648 * d6 = count down for the font's pixel width (8)
3649 * d7 = count down for the font's pixel count in height
3651 /* ASSERT: a0 = contents of Lconsole_font */
3652 mulul %a0@(FONT_DESC_WIDTH),%d0
3653 mulul %a0@(FONT_DESC_HEIGHT),%d1
3654 movel %a0@(FONT_DESC_HEIGHT),%d7 /* Load fbcon_font_desc.height into d7 */
3656 L(console_read_char_scanline):
3659 /* ASSERT: a0 = contents of Lconsole_font */
3660 movel %a0@(FONT_DESC_WIDTH),%d6 /* Load fbcon_font_desc.width into d6 */
3663 L(console_do_font_scanline):
3665 scsb %d2 /* convert 1 bit into a byte */
3666 console_plot_pixel %d0,%d1,%d2
3668 dbra %d6,L(console_do_font_scanline)
3670 /* ASSERT: a0 = contents of Lconsole_font */
3671 subl %a0@(FONT_DESC_WIDTH),%d0
3673 dbra %d7,L(console_read_char_scanline)
3676 func_return console_putc
3682 * d2 = (bit 0) 1/0 for white/black (!)
3683 * All registers are preserved
3685 func_start console_plot_pixel,%a0-%a1/%d0-%d4
3687 movel %pc@(L(mac_videobase)),%a1
3688 movel %pc@(L(mac_videodepth)),%d3
3691 mulul %pc@(L(mac_rowbytes)),%d1
3696 * d0 = x coord becomes byte offset into frame buffer
3698 * d2 = black or white (0/1)
3700 * d4 = temp of x (d0) for many bit depths
3705 movel %d0,%d4 /* we need the low order 3 bits! */
3710 eorb #7,%d4 /* reverse the x-coordinate w/ screen-bit # */
3714 jbra L(console_plot_pixel_exit)
3717 jbra L(console_plot_pixel_exit)
3722 movel %d0,%d4 /* we need the low order 2 bits! */
3727 eorb #3,%d4 /* reverse the x-coordinate w/ screen-bit # */
3734 jbra L(console_plot_pixel_exit)
3739 jbra L(console_plot_pixel_exit)
3744 movel %d0,%d4 /* we need the low order bit! */
3760 jbra L(console_plot_pixel_exit)
3769 jbra L(console_plot_pixel_exit)
3779 jbra L(console_plot_pixel_exit)
3782 jbra L(console_plot_pixel_exit)
3786 jbne L(console_plot_pixel_exit)
3793 jbra L(console_plot_pixel_exit)
3796 jbra L(console_plot_pixel_exit)
3798 L(console_plot_pixel_exit):
3799 func_return console_plot_pixel
3800 #endif /* CONSOLE */
3804 * This is some old code lying around. I don't believe
3805 * it's used or important anymore. My guess is it contributed
3806 * to getting to this point, but it's done for now.
3807 * It was still in the 2.1.77 head.S, so it's still here.
3808 * (And still not used!)
3811 moveml %a0/%d7,%sp@-
3815 .long 0xf0119f15 | ptestr #5,%a1@,#7,%a0
3824 lea %pc@(L(mmu)),%a0
3825 .long 0xf0106200 | pmove %psr,%a0@
3831 moveml %sp@+,%a0/%d7
3838 #if defined(CONFIG_ATARI) || defined(CONFIG_AMIGA) || \
3839 defined(CONFIG_HP300) || defined(CONFIG_APOLLO)
3845 #if defined(CONSOLE)
3847 .long 0 /* cursor column */
3848 .long 0 /* cursor row */
3849 .long 0 /* max num columns */
3850 .long 0 /* max num rows */
3851 .long 0 /* left edge */
3852 .long 0 /* mac putc */
3854 .long 0 /* pointer to console font (struct font_desc) */
3855 L(console_font_data):
3856 .long 0 /* pointer to console font data */
3857 #endif /* CONSOLE */
3859 #if defined(MMU_PRINT)
3861 .long 0 /* valid flag */
3862 .long 0 /* start logical */
3863 .long 0 /* next logical */
3864 .long 0 /* start physical */
3865 .long 0 /* next physical */
3866 #endif /* MMU_PRINT */
3870 L(mmu_cached_pointer_tables):
3872 L(mmu_num_pointer_tables):
3874 L(phys_kernel_start):
3880 L(kernel_pgdir_ptr):
3885 #if defined (CONFIG_MVME147)
3886 M147_SCC_CTRL_A = 0xfffe3002
3887 M147_SCC_DATA_A = 0xfffe3003
3890 #if defined (CONFIG_MVME16x)
3891 M162_SCC_CTRL_A = 0xfff45005
3892 M167_CYCAR = 0xfff450ee
3893 M167_CYIER = 0xfff45011
3894 M167_CYLICR = 0xfff45026
3895 M167_CYTEOIR = 0xfff45085
3896 M167_CYTDR = 0xfff450f8
3897 M167_PCSCCTICR = 0xfff4201e
3898 M167_PCTPIACKR = 0xfff42025
3901 #if defined (CONFIG_BVME6000)
3902 BVME_SCC_CTRL_A = 0xffb0000b
3903 BVME_SCC_DATA_A = 0xffb0000f
3906 #if defined(CONFIG_MAC)
3919 #endif /* CONFIG_MAC */
3921 #if defined (CONFIG_APOLLO)
3927 #if defined(CONFIG_HP300)
3944 m68k_pgtable_cachemode:
3946 m68k_supervisor_cachemode:
3948 #if defined(CONFIG_MVME16x)
3950 .long 0,0,0,0,0,0,0,0
3952 #if defined(CONFIG_Q40)