1 /***************************************************************************/
4 * linux/arch/m68knommu/platform/5206e/config.c
6 * Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com)
9 /***************************************************************************/
11 #include <linux/kernel.h>
12 #include <linux/param.h>
13 #include <linux/init.h>
15 #include <asm/machdep.h>
16 #include <asm/coldfire.h>
17 #include <asm/mcfsim.h>
18 #include <asm/mcfuart.h>
19 #include <asm/mcfdma.h>
20 #include <asm/mcfuart.h>
22 /***************************************************************************/
24 static struct mcf_platform_uart m5206e_uart_platform[] = {
26 .mapbase = MCF_MBAR + MCFUART_BASE1,
30 .mapbase = MCF_MBAR + MCFUART_BASE2,
36 static struct platform_device m5206e_uart = {
39 .dev.platform_data = m5206e_uart_platform,
42 static struct platform_device *m5206e_devices[] __initdata = {
46 /***************************************************************************/
48 static void __init m5206e_uart_init_line(int line, int irq)
51 writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR);
52 writeb(irq, MCFUART_BASE1 + MCFUART_UIVR);
53 mcf_mapirq2imr(irq, MCFINTC_UART0);
54 } else if (line == 1) {
55 writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR);
56 writeb(irq, MCFUART_BASE2 + MCFUART_UIVR);
57 mcf_mapirq2imr(irq, MCFINTC_UART1);
61 static void __init m5206e_uarts_init(void)
63 const int nrlines = ARRAY_SIZE(m5206e_uart_platform);
66 for (line = 0; (line < nrlines); line++)
67 m5206e_uart_init_line(line, m5206e_uart_platform[line].irq);
70 /***************************************************************************/
72 static void __init m5206e_timers_init(void)
74 /* Timer1 is always used as system timer */
75 writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI3,
76 MCF_MBAR + MCFSIM_TIMER1ICR);
77 mcf_mapirq2imr(MCF_IRQ_TIMER, MCFINTC_TIMER1);
79 #ifdef CONFIG_HIGHPROFILE
80 /* Timer2 is to be used as a high speed profile timer */
81 writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3,
82 MCF_MBAR + MCFSIM_TIMER2ICR);
83 mcf_mapirq2imr(MCF_IRQ_PROFILER, MCFINTC_TIMER2);
87 /***************************************************************************/
89 void m5206e_cpu_reset(void)
92 /* Set watchdog to soft reset, and enabled */
93 __raw_writeb(0xc0, MCF_MBAR + MCFSIM_SYPCR);
95 /* wait for watchdog to timeout */;
98 /***************************************************************************/
100 void __init config_BSP(char *commandp, int size)
102 #if defined(CONFIG_NETtel)
103 /* Copy command line from FLASH to local buffer... */
104 memcpy(commandp, (char *) 0xf0004000, size);
105 commandp[size-1] = 0;
106 #endif /* CONFIG_NETtel */
108 mach_reset = m5206e_cpu_reset;
109 m5206e_timers_init();
112 /* Only support the external interrupts on their primary level */
113 mcf_mapirq2imr(25, MCFINTC_EINT1);
114 mcf_mapirq2imr(28, MCFINTC_EINT4);
115 mcf_mapirq2imr(31, MCFINTC_EINT7);
118 /***************************************************************************/
120 static int __init init_BSP(void)
122 platform_add_devices(m5206e_devices, ARRAY_SIZE(m5206e_devices));
126 arch_initcall(init_BSP);
128 /***************************************************************************/