1 /***************************************************************************/
4 * linux/arch/m68knommu/platform/5407/config.c
6 * Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com)
7 * Copyright (C) 2000, Lineo (www.lineo.com)
10 /***************************************************************************/
12 #include <linux/kernel.h>
13 #include <linux/param.h>
14 #include <linux/init.h>
16 #include <asm/machdep.h>
17 #include <asm/coldfire.h>
18 #include <asm/mcfsim.h>
19 #include <asm/mcfuart.h>
21 /***************************************************************************/
23 extern unsigned int mcf_timervector;
24 extern unsigned int mcf_profilevector;
25 extern unsigned int mcf_timerlevel;
27 /***************************************************************************/
29 static struct mcf_platform_uart m5407_uart_platform[] = {
31 .mapbase = MCF_MBAR + MCFUART_BASE1,
35 .mapbase = MCF_MBAR + MCFUART_BASE2,
41 static struct platform_device m5407_uart = {
44 .dev.platform_data = m5407_uart_platform,
47 static struct platform_device *m5407_devices[] __initdata = {
51 /***************************************************************************/
53 static void __init m5407_uart_init_line(int line, int irq)
56 writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR);
57 writeb(irq, MCF_MBAR + MCFUART_BASE1 + MCFUART_UIVR);
58 mcf_clrimr(MCFINTC_UART0);
59 } else if (line == 1) {
60 writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR);
61 writeb(irq, MCF_MBAR + MCFUART_BASE2 + MCFUART_UIVR);
62 mcf_clrimr(MCFINTC_UART1);
66 static void __init m5407_uarts_init(void)
68 const int nrlines = ARRAY_SIZE(m5407_uart_platform);
71 for (line = 0; (line < nrlines); line++)
72 m5407_uart_init_line(line, m5407_uart_platform[line].irq);
75 /***************************************************************************/
77 void mcf_settimericr(unsigned int timer, unsigned int level)
79 volatile unsigned char *icrp;
80 unsigned int icr, imr;
84 case 2: icr = MCFSIM_TIMER2ICR; imr = MCFINTC_TIMER2; break;
85 default: icr = MCFSIM_TIMER1ICR; imr = MCFINTC_TIMER1; break;
88 icrp = (volatile unsigned char *) (MCF_MBAR + icr);
89 *icrp = MCFSIM_ICR_AUTOVEC | (level << 2) | MCFSIM_ICR_PRI3;
94 /***************************************************************************/
96 void m5407_cpu_reset(void)
99 /* set watchdog to soft reset, and enabled */
100 __raw_writeb(0xc0, MCF_MBAR + MCFSIM_SYPCR);
102 /* wait for watchdog to timeout */;
105 /***************************************************************************/
107 void __init config_BSP(char *commandp, int size)
109 #if defined(CONFIG_CLEOPATRA)
110 /* Different timer setup - to prevent device clash */
111 mcf_timervector = 30;
112 mcf_profilevector = 31;
116 mach_reset = m5407_cpu_reset;
119 /***************************************************************************/
121 static int __init init_BSP(void)
124 platform_add_devices(m5407_devices, ARRAY_SIZE(m5407_devices));
128 arch_initcall(init_BSP);
130 /***************************************************************************/