4 * (C) Copyright 2009, Greg Ungerer <gerg@snapgear.com>
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file COPYING in the main directory of this archive
11 #include <linux/types.h>
12 #include <linux/init.h>
13 #include <linux/kernel.h>
14 #include <linux/interrupt.h>
15 #include <linux/irq.h>
17 #include <asm/traps.h>
18 #include <asm/coldfire.h>
19 #include <asm/mcfsim.h>
22 * Define the vector numbers for the basic 7 interrupt sources.
23 * These are often referred to as the "external" interrupts in
24 * the ColdFire documentation (for the early ColdFire cores at least).
30 * Interrupts can be "vectored" on the ColdFire cores that support this old
31 * interrupt controller. That is, the device raising the interrupt can also
32 * supply the vector number to interrupt through. The AVR register of the
33 * interrupt controller enables or disables this for each external interrupt,
34 * so provide generic support for this. Setting this up is out-of-band for
35 * the interrupt system API's, and needs to be done by the driver that
36 * supports this device. Very few devices actually use this.
38 void mcf_autovector(int irq)
40 if ((irq >= EIRQ1) && (irq <= EIRQ7)) {
42 avec = __raw_readb(MCF_MBAR + MCFSIM_AVR);
43 avec |= (0x1 << (irq - EIRQ1 + 1));
44 __raw_writeb(avec, MCF_MBAR + MCFSIM_AVR);
48 static void intc_irq_mask(unsigned int irq)
52 static void intc_irq_unmask(unsigned int irq)
56 static int intc_irq_set_type(unsigned int irq, unsigned int type)
61 static struct irq_chip intc_irq_chip = {
63 .mask = intc_irq_mask,
64 .unmask = intc_irq_unmask,
65 .set_type = intc_irq_set_type,
68 void __init init_IRQ(void)
74 for (irq = 0; (irq < NR_IRQS); irq++) {
75 irq_desc[irq].status = IRQ_DISABLED;
76 irq_desc[irq].action = NULL;
77 irq_desc[irq].depth = 1;
78 irq_desc[irq].chip = &intc_irq_chip;
79 intc_irq_set_type(irq, 0);