1 #ifndef _ASM_METAG_BARRIER_H
2 #define _ASM_METAG_BARRIER_H
4 #include <asm/metag_mem.h>
6 #define nop() asm volatile ("NOP")
8 #define rmb() barrier()
10 #ifdef CONFIG_METAG_META21
12 /* HTP and above have a system event to fence writes */
13 static inline void wr_fence(void)
15 volatile int *flushptr = (volatile int *) LINSYSEVENT_WR_FENCE;
21 #else /* CONFIG_METAG_META21 */
24 * ATP doesn't have system event to fence writes, so it is necessary to flush
25 * the processor write queues as well as possibly the write combiner (depending
26 * on the page being written).
27 * To ensure the write queues are flushed we do 4 writes to a system event
28 * register (in this case write combiner flush) which will also flush the write
31 static inline void wr_fence(void)
33 volatile int *flushptr = (volatile int *) LINSYSEVENT_WR_COMBINE_FLUSH;
42 #endif /* !CONFIG_METAG_META21 */
44 static inline void wmb(void)
46 /* flush writes through the write combiner */
50 #define read_barrier_depends() do { } while (0)
53 #define fence() do { } while (0)
54 #define smp_mb() barrier()
55 #define smp_rmb() barrier()
56 #define smp_wmb() barrier()
59 #ifdef CONFIG_METAG_SMP_WRITE_REORDERING
61 * Write to the atomic memory unlock system event register (command 0). This is
62 * needed before a write to shared memory in a critical section, to prevent
63 * external reordering of writes before the fence on other threads with writes
64 * after the fence on this thread (and to prevent the ensuing cache-memory
65 * incoherence). It is therefore ineffective if used after and on the same
68 static inline void fence(void)
70 volatile int *flushptr = (volatile int *) LINSYSEVENT_WR_ATOMIC_UNLOCK;
75 #define smp_mb() fence()
76 #define smp_rmb() fence()
77 #define smp_wmb() barrier()
79 #define fence() do { } while (0)
80 #define smp_mb() barrier()
81 #define smp_rmb() barrier()
82 #define smp_wmb() barrier()
85 #define smp_read_barrier_depends() do { } while (0)
86 #define set_mb(var, value) do { var = value; smp_mb(); } while (0)
88 #define smp_store_release(p, v) \
90 compiletime_assert_atomic_type(*p); \
92 ACCESS_ONCE(*p) = (v); \
95 #define smp_load_acquire(p) \
97 typeof(*p) ___p1 = ACCESS_ONCE(*p); \
98 compiletime_assert_atomic_type(*p); \
103 #endif /* _ASM_METAG_BARRIER_H */