2 * (C) Copyright 2007 Michal Simek
3 * (C) Copyright 2004 Atmark Techno, Inc.
5 * Michal SIMEK <monstr@monstr.eu>
6 * Yasushi SHOJI <yashi@atmark-techno.com>
8 * SPDX-License-Identifier: GPL-2.0+
11 #include <asm-offsets.h>
19 * r10: Stores little/big endian offset for vectors
20 * r2: Stores imm opcode
21 * r3: Stores brai opcode
24 mts rmsr, r0 /* disable cache */
28 #if defined(CONFIG_SPL_BUILD)
29 addi r1, r0, CONFIG_SPL_STACK_ADDR
31 addi r1, r1, -4 /* Decrement SP to top of memory */
33 addi r1, r0, CONFIG_SYS_INIT_SP_OFFSET
35 addi r1, r1, -4 /* Decrement SP to top of memory */
37 /* Find-out if u-boot is running on BIG/LITTLE endian platform
38 * There are some steps which is necessary to keep in mind:
39 * 1. Setup offset value to r6
40 * 2. Store word offset value to address 0x0
41 * 3. Load just byte from address 0x0
42 * 4a) LITTLE endian - r10 contains 0x2 because it is the smallest
43 * value that's why is on address 0x0
44 * 4b) BIG endian - r10 contains 0x0 because 0x2 offset is on addr 0x3
46 addik r6, r0, 0x2 /* BIG/LITTLE endian offset */
48 swi r6, r0, 0x28 /* used first unused MB vector */
49 lbui r10, r0, 0x28 /* used first unused MB vector */
52 /* add opcode instruction for 32bit jump - 2 instruction imm & brai */
53 addi r2, r0, 0xb0000000 /* hex b000 opcode imm */
54 addi r3, r0, 0xb8080000 /* hew b808 opcode brai */
56 #ifdef CONFIG_SYS_RESET_ADDRESS
58 swi r2, r0, 0x0 /* reset address - imm opcode */
59 swi r3, r0, 0x4 /* reset address - brai opcode */
61 addik r6, r0, CONFIG_SYS_RESET_ADDRESS
70 #ifdef CONFIG_SYS_USR_EXCEP
71 /* user_vector_exception */
72 swi r2, r0, 0x8 /* user vector exception - imm opcode */
73 swi r3, r0, 0xC /* user vector exception - brai opcode */
75 addik r6, r0, _exception_handler
78 * BIG ENDIAN memory map for user exception
82 * then it is necessary to count address for storing the most significant
83 * 16bits from _exception_handler address and copy it to
84 * 0xa address. Big endian use offset in r10=0 that's why is it just
85 * 0xa address. The same is done for the least significant 16 bits
88 * LITTLE ENDIAN memory map for user exception
92 * Offset is for little endian setup to 0x2. rsubi instruction decrease
93 * address value to ensure that points to proper place which is
94 * 0x8 for the most significant 16 bits and
95 * 0xC for the least significant 16 bits
104 /* interrupt_handler */
105 swi r2, r0, 0x10 /* interrupt - imm opcode */
106 swi r3, r0, 0x14 /* interrupt - brai opcode */
108 addik r6, r0, _interrupt_handler
116 /* hardware exception */
117 swi r2, r0, 0x20 /* hardware exception - imm opcode */
118 swi r3, r0, 0x24 /* hardware exception - brai opcode */
120 addik r6, r0, _hw_exception_handler
127 #endif /* BUILD_SPL */
129 /* Flush cache before enable cache */
131 addik r6, r0, XILINX_DCACHE_BYTE_SIZE
132 bralid r15, flush_cache
135 /* enable instruction and data cache */
141 /* clear BSS segments */
142 addi r5, r0, __bss_start
143 addi r4, r0, __bss_end
147 swi r0, r5, 0 /* write zero to loc */
148 addi r5, r5, 4 /* increment to next loc */
149 cmp r6, r5, r4 /* check if we have reach the end */
151 3: /* jumping to board_init */
152 #ifndef CONFIG_SPL_BUILD
153 or r5, r0, r0 /* flags - empty */
157 addi r31, r0, CONFIG_SYS_SPL_MALLOC_END
165 .space GENERATED_GBL_DATA_SIZE
167 #ifndef CONFIG_SPL_BUILD
169 * Read 16bit little endian
185 * Write 16bit little endian
186 * first parameter(r5) - address, second(r6) - short value
192 out16: bslli r3, r6, 8
205 .global relocate_code
214 addi r1, r5, 0 /* Start to use new SP */
215 addi r31, r6, 0 /* Start to use new GD */
217 add r23, r0, r7 /* Move reloc addr to r23 */
218 /* Relocate text and data - r12 temp value */
220 addi r22, r0, __end - 4 /* Include BSS too */
224 1: lw r12, r21, r5 /* Load u-boot data */
225 sw r12, r23, r5 /* Write zero to loc */
226 cmp r12, r5, r6 /* Check if we have reach the end */
228 addi r5, r5, 4 /* Increment to next loc - relocate code */
230 /* R23 points to the base address. */
231 add r23, r0, r7 /* Move reloc addr to r23 */
232 addi r24, r0, CONFIG_SYS_TEXT_BASE /* Get reloc offset */
233 rsub r23, r24, r23 /* keep - this is already here gd->reloc_off */
235 addik r6, r0, 0x2 /* BIG/LITTLE endian offset */
237 swi r6, r0, 0x28 /* used first unused MB vector */
238 lbui r10, r0, 0x28 /* used first unused MB vector */
241 #ifdef CONFIG_SYS_USR_EXCEP
242 addik r6, r0, _exception_handler
243 addk r6, r6, r23 /* add offset */
251 addik r6, r0, _hw_exception_handler
252 addk r6, r6, r23 /* add offset */
260 addik r6, r0, _interrupt_handler
261 addk r6, r6, r23 /* add offset */
269 /* Check if GOT exist */
270 addik r21, r23, _got_start
271 addik r22, r23, _got_end
273 beqi r12, 2f /* No GOT table - jump over */
275 /* Skip last 3 entries plus 1 because of loop boundary below */
276 addik r22, r22, -0x10
278 /* Relocate the GOT. */
279 3: lw r12, r21, r0 /* Load entry */
280 addk r12, r12, r23 /* Add reloc offset */
281 sw r12, r21, r0 /* Save entry back */
283 cmpu r12, r21, r22 /* Check if this cross boundary */
287 /* Update pointer to GOT */
289 addik r20, r20, _GLOBAL_OFFSET_TABLE_ + 8
292 /* Flush caches to ensure consistency */
294 addik r6, r0, XILINX_DCACHE_BYTE_SIZE
295 bralid r15, flush_cache
298 2: addi r5, r31, 0 /* gd is initialized in board_r.c */
299 addi r6, r0, CONFIG_SYS_TEXT_BASE
300 addi r12, r23, board_init_r
301 bra r12 /* Jump to relocated code */