arch/mips/alchemy/common/platform.c

   1 /*
   2  * Platform device support for Au1x00 SoCs.
   3  *
   4  * Copyright 2004, Matt Porter <mporter@kernel.crashing.org>
   5  *
   6  * (C) Copyright Embedded Alley Solutions, Inc 2005
   7  * Author: Pantelis Antoniou <pantelis@embeddedalley.com>
   8  *
   9  * This file is licensed under the terms of the GNU General Public
  10  * License version 2.  This program is licensed "as is" without any
  11  * warranty of any kind, whether express or implied.
  12  */
  13
  14 #include <linux/dma-mapping.h>
  15 #include <linux/platform_device.h>
  16 #include <linux/serial_8250.h>
  17 #include <linux/init.h>
  18
  19 #include <asm/mach-au1x00/au1xxx.h>
  20 #include <asm/mach-au1x00/au1xxx_dbdma.h>
  21 #include <asm/mach-au1x00/au1100_mmc.h>
  22
  23 #define PORT(_base, _irq)                                       \
  24         {                                                       \
  25                 .mapbase        = _base,                        \
  26                 .irq            = _irq,                         \
  27                 .regshift       = 2,                            \
  28                 .iotype         = UPIO_AU,                      \
  29                 .flags          = UPF_SKIP_TEST | UPF_IOREMAP   \
  30         }
  31
  32 static struct plat_serial8250_port au1x00_uart_data[] = {
  33 #if defined(CONFIG_SERIAL_8250_AU1X00)
  34 #if defined(CONFIG_SOC_AU1000)
  35         PORT(UART0_PHYS_ADDR, AU1000_UART0_INT),
  36         PORT(UART1_PHYS_ADDR, AU1000_UART1_INT),
  37         PORT(UART2_PHYS_ADDR, AU1000_UART2_INT),
  38         PORT(UART3_PHYS_ADDR, AU1000_UART3_INT),
  39 #elif defined(CONFIG_SOC_AU1500)
  40         PORT(UART0_PHYS_ADDR, AU1500_UART0_INT),
  41         PORT(UART3_PHYS_ADDR, AU1500_UART3_INT),
  42 #elif defined(CONFIG_SOC_AU1100)
  43         PORT(UART0_PHYS_ADDR, AU1100_UART0_INT),
  44         PORT(UART1_PHYS_ADDR, AU1100_UART1_INT),
  45         PORT(UART3_PHYS_ADDR, AU1100_UART3_INT),
  46 #elif defined(CONFIG_SOC_AU1550)
  47         PORT(UART0_PHYS_ADDR, AU1550_UART0_INT),
  48         PORT(UART1_PHYS_ADDR, AU1550_UART1_INT),
  49         PORT(UART3_PHYS_ADDR, AU1550_UART3_INT),
  50 #elif defined(CONFIG_SOC_AU1200)
  51         PORT(UART0_PHYS_ADDR, AU1200_UART0_INT),
  52         PORT(UART1_PHYS_ADDR, AU1200_UART1_INT),
  53 #endif
  54 #endif  /* CONFIG_SERIAL_8250_AU1X00 */
  55         { },
  56 };
  57
  58 static struct platform_device au1xx0_uart_device = {
  59         .name                   = "serial8250",
  60         .id                     = PLAT8250_DEV_AU1X00,
  61         .dev                    = {
  62                 .platform_data  = au1x00_uart_data,
  63         },
  64 };
  65
  66 /* OHCI (USB full speed host controller) */
  67 static struct resource au1xxx_usb_ohci_resources[] = {
  68         [0] = {
  69                 .start          = USB_OHCI_BASE,
  70                 .end            = USB_OHCI_BASE + USB_OHCI_LEN - 1,
  71                 .flags          = IORESOURCE_MEM,
  72         },
  73         [1] = {
  74                 .start          = FOR_PLATFORM_C_USB_HOST_INT,
  75                 .end            = FOR_PLATFORM_C_USB_HOST_INT,
  76                 .flags          = IORESOURCE_IRQ,
  77         },
  78 };
  79
  80 /* The dmamask must be set for OHCI to work */
  81 static u64 ohci_dmamask = DMA_BIT_MASK(32);
  82
  83 static struct platform_device au1xxx_usb_ohci_device = {
  84         .name           = "au1xxx-ohci",
  85         .id             = 0,
  86         .dev = {
  87                 .dma_mask               = &ohci_dmamask,
  88                 .coherent_dma_mask      = DMA_BIT_MASK(32),
  89         },
  90         .num_resources  = ARRAY_SIZE(au1xxx_usb_ohci_resources),
  91         .resource       = au1xxx_usb_ohci_resources,
  92 };
  93
  94 /*** AU1100 LCD controller ***/
  95
  96 #ifdef CONFIG_FB_AU1100
  97 static struct resource au1100_lcd_resources[] = {
  98         [0] = {
  99                 .start          = LCD_PHYS_ADDR,
 100                 .end            = LCD_PHYS_ADDR + 0x800 - 1,
 101                 .flags          = IORESOURCE_MEM,
 102         },
 103         [1] = {
 104                 .start          = AU1100_LCD_INT,
 105                 .end            = AU1100_LCD_INT,
 106                 .flags          = IORESOURCE_IRQ,
 107         }
 108 };
 109
 110 static u64 au1100_lcd_dmamask = DMA_BIT_MASK(32);
 111
 112 static struct platform_device au1100_lcd_device = {
 113         .name           = "au1100-lcd",
 114         .id             = 0,
 115         .dev = {
 116                 .dma_mask               = &au1100_lcd_dmamask,
 117                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 118         },
 119         .num_resources  = ARRAY_SIZE(au1100_lcd_resources),
 120         .resource       = au1100_lcd_resources,
 121 };
 122 #endif
 123
 124 #ifdef CONFIG_SOC_AU1200
 125 /* EHCI (USB high speed host controller) */
 126 static struct resource au1xxx_usb_ehci_resources[] = {
 127         [0] = {
 128                 .start          = USB_EHCI_BASE,
 129                 .end            = USB_EHCI_BASE + USB_EHCI_LEN - 1,
 130                 .flags          = IORESOURCE_MEM,
 131         },
 132         [1] = {
 133                 .start          = AU1200_USB_INT,
 134                 .end            = AU1200_USB_INT,
 135                 .flags          = IORESOURCE_IRQ,
 136         },
 137 };
 138
 139 static u64 ehci_dmamask = DMA_BIT_MASK(32);
 140
 141 static struct platform_device au1xxx_usb_ehci_device = {
 142         .name           = "au1xxx-ehci",
 143         .id             = 0,
 144         .dev = {
 145                 .dma_mask               = &ehci_dmamask,
 146                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 147         },
 148         .num_resources  = ARRAY_SIZE(au1xxx_usb_ehci_resources),
 149         .resource       = au1xxx_usb_ehci_resources,
 150 };
 151
 152 /* Au1200 UDC (USB gadget controller) */
 153 static struct resource au1xxx_usb_gdt_resources[] = {
 154         [0] = {
 155                 .start          = USB_UDC_BASE,
 156                 .end            = USB_UDC_BASE + USB_UDC_LEN - 1,
 157                 .flags          = IORESOURCE_MEM,
 158         },
 159         [1] = {
 160                 .start          = AU1200_USB_INT,
 161                 .end            = AU1200_USB_INT,
 162                 .flags          = IORESOURCE_IRQ,
 163         },
 164 };
 165
 166 static u64 udc_dmamask = DMA_BIT_MASK(32);
 167
 168 static struct platform_device au1xxx_usb_gdt_device = {
 169         .name           = "au1xxx-udc",
 170         .id             = 0,
 171         .dev = {
 172                 .dma_mask               = &udc_dmamask,
 173                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 174         },
 175         .num_resources  = ARRAY_SIZE(au1xxx_usb_gdt_resources),
 176         .resource       = au1xxx_usb_gdt_resources,
 177 };
 178
 179 /* Au1200 UOC (USB OTG controller) */
 180 static struct resource au1xxx_usb_otg_resources[] = {
 181         [0] = {
 182                 .start          = USB_UOC_BASE,
 183                 .end            = USB_UOC_BASE + USB_UOC_LEN - 1,
 184                 .flags          = IORESOURCE_MEM,
 185         },
 186         [1] = {
 187                 .start          = AU1200_USB_INT,
 188                 .end            = AU1200_USB_INT,
 189                 .flags          = IORESOURCE_IRQ,
 190         },
 191 };
 192
 193 static u64 uoc_dmamask = DMA_BIT_MASK(32);
 194
 195 static struct platform_device au1xxx_usb_otg_device = {
 196         .name           = "au1xxx-uoc",
 197         .id             = 0,
 198         .dev = {
 199                 .dma_mask               = &uoc_dmamask,
 200                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 201         },
 202         .num_resources  = ARRAY_SIZE(au1xxx_usb_otg_resources),
 203         .resource       = au1xxx_usb_otg_resources,
 204 };
 205
 206 static struct resource au1200_lcd_resources[] = {
 207         [0] = {
 208                 .start          = LCD_PHYS_ADDR,
 209                 .end            = LCD_PHYS_ADDR + 0x800 - 1,
 210                 .flags          = IORESOURCE_MEM,
 211         },
 212         [1] = {
 213                 .start          = AU1200_LCD_INT,
 214                 .end            = AU1200_LCD_INT,
 215                 .flags          = IORESOURCE_IRQ,
 216         }
 217 };
 218
 219 static u64 au1200_lcd_dmamask = DMA_BIT_MASK(32);
 220
 221 static struct platform_device au1200_lcd_device = {
 222         .name           = "au1200-lcd",
 223         .id             = 0,
 224         .dev = {
 225                 .dma_mask               = &au1200_lcd_dmamask,
 226                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 227         },
 228         .num_resources  = ARRAY_SIZE(au1200_lcd_resources),
 229         .resource       = au1200_lcd_resources,
 230 };
 231
 232 static u64 au1xxx_mmc_dmamask =  DMA_BIT_MASK(32);
 233
 234 extern struct au1xmmc_platform_data au1xmmc_platdata[2];
 235
 236 static struct resource au1200_mmc0_resources[] = {
 237         [0] = {
 238                 .start          = SD0_PHYS_ADDR,
 239                 .end            = SD0_PHYS_ADDR + 0x7ffff,
 240                 .flags          = IORESOURCE_MEM,
 241         },
 242         [1] = {
 243                 .start          = AU1200_SD_INT,
 244                 .end            = AU1200_SD_INT,
 245                 .flags          = IORESOURCE_IRQ,
 246         },
 247         [2] = {
 248                 .start          = DSCR_CMD0_SDMS_TX0,
 249                 .end            = DSCR_CMD0_SDMS_TX0,
 250                 .flags          = IORESOURCE_DMA,
 251         },
 252         [3] = {
 253                 .start          = DSCR_CMD0_SDMS_RX0,
 254                 .end            = DSCR_CMD0_SDMS_RX0,
 255                 .flags          = IORESOURCE_DMA,
 256         }
 257 };
 258
 259 static struct platform_device au1200_mmc0_device = {
 260         .name = "au1xxx-mmc",
 261         .id = 0,
 262         .dev = {
 263                 .dma_mask               = &au1xxx_mmc_dmamask,
 264                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 265                 .platform_data          = &au1xmmc_platdata[0],
 266         },
 267         .num_resources  = ARRAY_SIZE(au1200_mmc0_resources),
 268         .resource       = au1200_mmc0_resources,
 269 };
 270
 271 #ifndef CONFIG_MIPS_DB1200
 272 static struct resource au1200_mmc1_resources[] = {
 273         [0] = {
 274                 .start          = SD1_PHYS_ADDR,
 275                 .end            = SD1_PHYS_ADDR + 0x7ffff,
 276                 .flags          = IORESOURCE_MEM,
 277         },
 278         [1] = {
 279                 .start          = AU1200_SD_INT,
 280                 .end            = AU1200_SD_INT,
 281                 .flags          = IORESOURCE_IRQ,
 282         },
 283         [2] = {
 284                 .start          = DSCR_CMD0_SDMS_TX1,
 285                 .end            = DSCR_CMD0_SDMS_TX1,
 286                 .flags          = IORESOURCE_DMA,
 287         },
 288         [3] = {
 289                 .start          = DSCR_CMD0_SDMS_RX1,
 290                 .end            = DSCR_CMD0_SDMS_RX1,
 291                 .flags          = IORESOURCE_DMA,
 292         }
 293 };
 294
 295 static struct platform_device au1200_mmc1_device = {
 296         .name = "au1xxx-mmc",
 297         .id = 1,
 298         .dev = {
 299                 .dma_mask               = &au1xxx_mmc_dmamask,
 300                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 301                 .platform_data          = &au1xmmc_platdata[1],
 302         },
 303         .num_resources  = ARRAY_SIZE(au1200_mmc1_resources),
 304         .resource       = au1200_mmc1_resources,
 305 };
 306 #endif /* #ifndef CONFIG_MIPS_DB1200 */
 307 #endif /* #ifdef CONFIG_SOC_AU1200 */
 308
 309 /* All Alchemy demoboards with I2C have this #define in their headers */
 310 #ifdef SMBUS_PSC_BASE
 311 static struct resource pbdb_smbus_resources[] = {
 312         {
 313                 .start  = CPHYSADDR(SMBUS_PSC_BASE),
 314                 .end    = CPHYSADDR(SMBUS_PSC_BASE + 0xfffff),
 315                 .flags  = IORESOURCE_MEM,
 316         },
 317 };
 318
 319 static struct platform_device pbdb_smbus_device = {
 320         .name           = "au1xpsc_smbus",
 321         .id             = 0,    /* bus number */
 322         .num_resources  = ARRAY_SIZE(pbdb_smbus_resources),
 323         .resource       = pbdb_smbus_resources,
 324 };
 325 #endif
 326
 327 static struct platform_device *au1xxx_platform_devices[] __initdata = {
 328         &au1xx0_uart_device,
 329         &au1xxx_usb_ohci_device,
 330 #ifdef CONFIG_FB_AU1100
 331         &au1100_lcd_device,
 332 #endif
 333 #ifdef CONFIG_SOC_AU1200
 334         &au1xxx_usb_ehci_device,
 335         &au1xxx_usb_gdt_device,
 336         &au1xxx_usb_otg_device,
 337         &au1200_lcd_device,
 338         &au1200_mmc0_device,
 339 #ifndef CONFIG_MIPS_DB1200
 340         &au1200_mmc1_device,
 341 #endif
 342 #endif
 343 #ifdef SMBUS_PSC_BASE
 344         &pbdb_smbus_device,
 345 #endif
 346 };
 347
 348 static int __init au1xxx_platform_init(void)
 349 {
 350         unsigned int uartclk = get_au1x00_uart_baud_base() * 16;
 351         int i;
 352
 353         /* Fill up uartclk. */
 354         for (i = 0; au1x00_uart_data[i].flags; i++)
 355                 au1x00_uart_data[i].uartclk = uartclk;
 356
 357         return platform_add_devices(au1xxx_platform_devices,
 358                                     ARRAY_SIZE(au1xxx_platform_devices));
 359 }
 360
 361 arch_initcall(au1xxx_platform_init);