2 * DBAu1xxx board platform device registration
4 * Copyright (C) 2009 Manuel Lauss
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
21 #include <linux/init.h>
22 #include <linux/interrupt.h>
23 #include <linux/dma-mapping.h>
24 #include <linux/platform_device.h>
26 #include <asm/mach-au1x00/au1000.h>
27 #include <asm/mach-au1x00/au1000_dma.h>
28 #include <asm/mach-db1x00/bcsr.h>
29 #include "../platform.h"
33 /* DB1xxx PCMCIA interrupt sources:
37 * Db1550: 0/1, 21/22, 3/5
40 #define DB1XXX_HAS_PCMCIA
41 #define F_SWAPPED (bcsr_read(BCSR_STATUS) & BCSR_STATUS_DB1000_SWAPBOOT)
43 #if defined(CONFIG_MIPS_DB1000)
44 #define DB1XXX_PCMCIA_CD0 AU1000_GPIO0_INT
45 #define DB1XXX_PCMCIA_STSCHG0 AU1000_GPIO1_INT
46 #define DB1XXX_PCMCIA_CARD0 AU1000_GPIO2_INT
47 #define DB1XXX_PCMCIA_CD1 AU1000_GPIO3_INT
48 #define DB1XXX_PCMCIA_STSCHG1 AU1000_GPIO4_INT
49 #define DB1XXX_PCMCIA_CARD1 AU1000_GPIO5_INT
50 #define BOARD_FLASH_SIZE 0x02000000 /* 32MB */
51 #define BOARD_FLASH_WIDTH 4 /* 32-bits */
52 #elif defined(CONFIG_MIPS_DB1100)
53 #define DB1XXX_PCMCIA_CD0 AU1100_GPIO0_INT
54 #define DB1XXX_PCMCIA_STSCHG0 AU1100_GPIO1_INT
55 #define DB1XXX_PCMCIA_CARD0 AU1100_GPIO2_INT
56 #define DB1XXX_PCMCIA_CD1 AU1100_GPIO3_INT
57 #define DB1XXX_PCMCIA_STSCHG1 AU1100_GPIO4_INT
58 #define DB1XXX_PCMCIA_CARD1 AU1100_GPIO5_INT
59 #define BOARD_FLASH_SIZE 0x02000000 /* 32MB */
60 #define BOARD_FLASH_WIDTH 4 /* 32-bits */
61 #elif defined(CONFIG_MIPS_DB1500)
62 #define DB1XXX_PCMCIA_CD0 AU1500_GPIO0_INT
63 #define DB1XXX_PCMCIA_STSCHG0 AU1500_GPIO1_INT
64 #define DB1XXX_PCMCIA_CARD0 AU1500_GPIO2_INT
65 #define DB1XXX_PCMCIA_CD1 AU1500_GPIO3_INT
66 #define DB1XXX_PCMCIA_STSCHG1 AU1500_GPIO4_INT
67 #define DB1XXX_PCMCIA_CARD1 AU1500_GPIO5_INT
68 #define BOARD_FLASH_SIZE 0x02000000 /* 32MB */
69 #define BOARD_FLASH_WIDTH 4 /* 32-bits */
70 #elif defined(CONFIG_MIPS_DB1550)
71 #define DB1XXX_PCMCIA_CD0 AU1550_GPIO0_INT
72 #define DB1XXX_PCMCIA_STSCHG0 AU1550_GPIO21_INT
73 #define DB1XXX_PCMCIA_CARD0 AU1550_GPIO3_INT
74 #define DB1XXX_PCMCIA_CD1 AU1550_GPIO1_INT
75 #define DB1XXX_PCMCIA_STSCHG1 AU1550_GPIO22_INT
76 #define DB1XXX_PCMCIA_CARD1 AU1550_GPIO5_INT
77 #define BOARD_FLASH_SIZE 0x08000000 /* 128MB */
78 #define BOARD_FLASH_WIDTH 4 /* 32-bits */
80 /* other board: no PCMCIA */
81 #undef DB1XXX_HAS_PCMCIA
84 #if defined(CONFIG_MIPS_BOSPORUS)
85 #define BOARD_FLASH_SIZE 0x01000000 /* 16MB */
86 #define BOARD_FLASH_WIDTH 2 /* 16-bits */
87 #elif defined(CONFIG_MIPS_MIRAGE)
88 #define BOARD_FLASH_SIZE 0x04000000 /* 64MB */
89 #define BOARD_FLASH_WIDTH 4 /* 32-bits */
94 #ifdef CONFIG_MIPS_DB1500
95 static int db1xxx_map_pci_irq(const struct pci_dev *d, u8 slot, u8 pin)
97 if ((slot < 12) || (slot > 13) || pin == 0)
100 return (pin == 1) ? AU1500_PCI_INTA : 0xff;
103 case 1: return AU1500_PCI_INTA;
104 case 2: return AU1500_PCI_INTB;
105 case 3: return AU1500_PCI_INTC;
106 case 4: return AU1500_PCI_INTD;
113 #ifdef CONFIG_MIPS_DB1550
114 static int db1xxx_map_pci_irq(const struct pci_dev *d, u8 slot, u8 pin)
116 if ((slot < 11) || (slot > 13) || pin == 0)
119 return (pin == 1) ? AU1550_PCI_INTC : 0xff;
122 case 1: return AU1550_PCI_INTB;
123 case 2: return AU1550_PCI_INTC;
124 case 3: return AU1550_PCI_INTD;
125 case 4: return AU1550_PCI_INTA;
130 case 1: return AU1550_PCI_INTA;
131 case 2: return AU1550_PCI_INTB;
132 case 3: return AU1550_PCI_INTC;
133 case 4: return AU1550_PCI_INTD;
140 #ifdef CONFIG_MIPS_BOSPORUS
141 static int db1xxx_map_pci_irq(const struct pci_dev *d, u8 slot, u8 pin)
143 if ((slot < 11) || (slot > 13) || pin == 0)
146 return (pin == 1) ? AU1500_PCI_INTA : 0xff;
149 case 1: return AU1500_PCI_INTA;
150 case 2: return AU1500_PCI_INTB;
151 default: return 0xff;
156 case 1: return AU1500_PCI_INTA;
157 case 2: return AU1500_PCI_INTB;
158 case 3: return AU1500_PCI_INTC;
159 case 4: return AU1500_PCI_INTD;
166 #ifdef CONFIG_MIPS_MIRAGE
167 static int db1xxx_map_pci_irq(const struct pci_dev *d, u8 slot, u8 pin)
169 if ((slot < 11) || (slot > 13) || pin == 0)
172 return (pin == 1) ? AU1500_PCI_INTD : 0xff;
174 return (pin == 3) ? AU1500_PCI_INTC : 0xff;
177 case 1: return AU1500_PCI_INTA;
178 case 2: return AU1500_PCI_INTB;
179 default: return 0xff;
186 static struct resource alchemy_pci_host_res[] = {
188 .start = AU1500_PCI_PHYS_ADDR,
189 .end = AU1500_PCI_PHYS_ADDR + 0xfff,
190 .flags = IORESOURCE_MEM,
194 static struct alchemy_pci_platdata db1xxx_pci_pd = {
195 .board_map_irq = db1xxx_map_pci_irq,
198 static struct platform_device db1xxx_pci_host_dev = {
199 .dev.platform_data = &db1xxx_pci_pd,
200 .name = "alchemy-pci",
202 .num_resources = ARRAY_SIZE(alchemy_pci_host_res),
203 .resource = alchemy_pci_host_res,
206 static int __init db15x0_pci_init(void)
208 return platform_device_register(&db1xxx_pci_host_dev);
210 /* must be arch_initcall; MIPS PCI scans busses in a subsys_initcall */
211 arch_initcall(db15x0_pci_init);
214 #ifdef CONFIG_MIPS_DB1100
215 static struct resource au1100_lcd_resources[] = {
217 .start = AU1100_LCD_PHYS_ADDR,
218 .end = AU1100_LCD_PHYS_ADDR + 0x800 - 1,
219 .flags = IORESOURCE_MEM,
222 .start = AU1100_LCD_INT,
223 .end = AU1100_LCD_INT,
224 .flags = IORESOURCE_IRQ,
228 static u64 au1100_lcd_dmamask = DMA_BIT_MASK(32);
230 static struct platform_device au1100_lcd_device = {
231 .name = "au1100-lcd",
234 .dma_mask = &au1100_lcd_dmamask,
235 .coherent_dma_mask = DMA_BIT_MASK(32),
237 .num_resources = ARRAY_SIZE(au1100_lcd_resources),
238 .resource = au1100_lcd_resources,
242 static struct resource alchemy_ac97c_res[] = {
244 .start = AU1000_AC97_PHYS_ADDR,
245 .end = AU1000_AC97_PHYS_ADDR + 0xfff,
246 .flags = IORESOURCE_MEM,
249 .start = DMA_ID_AC97C_TX,
250 .end = DMA_ID_AC97C_TX,
251 .flags = IORESOURCE_DMA,
254 .start = DMA_ID_AC97C_RX,
255 .end = DMA_ID_AC97C_RX,
256 .flags = IORESOURCE_DMA,
260 static struct platform_device alchemy_ac97c_dev = {
261 .name = "alchemy-ac97c",
263 .resource = alchemy_ac97c_res,
264 .num_resources = ARRAY_SIZE(alchemy_ac97c_res),
267 static struct platform_device alchemy_ac97c_dma_dev = {
268 .name = "alchemy-pcm-dma",
272 static struct platform_device db1x00_codec_dev = {
273 .name = "ac97-codec",
277 static struct platform_device db1x00_audio_dev = {
278 .name = "db1000-audio",
281 static int __init db1xxx_dev_init(void)
283 #ifdef DB1XXX_HAS_PCMCIA
284 db1x_register_pcmcia_socket(
285 AU1000_PCMCIA_ATTR_PHYS_ADDR,
286 AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x000400000 - 1,
287 AU1000_PCMCIA_MEM_PHYS_ADDR,
288 AU1000_PCMCIA_MEM_PHYS_ADDR + 0x000400000 - 1,
289 AU1000_PCMCIA_IO_PHYS_ADDR,
290 AU1000_PCMCIA_IO_PHYS_ADDR + 0x000010000 - 1,
291 DB1XXX_PCMCIA_CARD0, DB1XXX_PCMCIA_CD0,
292 /*DB1XXX_PCMCIA_STSCHG0*/0, 0, 0);
294 db1x_register_pcmcia_socket(
295 AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x004000000,
296 AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x004400000 - 1,
297 AU1000_PCMCIA_MEM_PHYS_ADDR + 0x004000000,
298 AU1000_PCMCIA_MEM_PHYS_ADDR + 0x004400000 - 1,
299 AU1000_PCMCIA_IO_PHYS_ADDR + 0x004000000,
300 AU1000_PCMCIA_IO_PHYS_ADDR + 0x004010000 - 1,
301 DB1XXX_PCMCIA_CARD1, DB1XXX_PCMCIA_CD1,
302 /*DB1XXX_PCMCIA_STSCHG1*/0, 0, 1);
304 #ifdef CONFIG_MIPS_DB1100
305 platform_device_register(&au1100_lcd_device);
307 db1x_register_norflash(BOARD_FLASH_SIZE, BOARD_FLASH_WIDTH, F_SWAPPED);
309 platform_device_register(&db1x00_codec_dev);
310 platform_device_register(&alchemy_ac97c_dma_dev);
311 platform_device_register(&alchemy_ac97c_dev);
312 platform_device_register(&db1x00_audio_dev);
316 device_initcall(db1xxx_dev_init);