5 #include <linux/init.h>
6 #include <linux/mtd/mtd.h>
7 #include <linux/mtd/map.h>
8 #include <linux/mtd/physmap.h>
9 #include <linux/slab.h>
10 #include <linux/platform_device.h>
13 #include <asm/reboot.h>
14 #include <asm/mach-db1x00/bcsr.h>
16 static void db1x_power_off(void)
18 bcsr_write(BCSR_RESETS, 0);
19 bcsr_write(BCSR_SYSTEM, BCSR_SYSTEM_PWROFF | BCSR_SYSTEM_RESET);
22 static void db1x_reset(char *c)
24 bcsr_write(BCSR_RESETS, 0);
25 bcsr_write(BCSR_SYSTEM, 0);
28 static int __init db1x_poweroff_setup(void)
31 pm_power_off = db1x_power_off;
33 _machine_halt = db1x_power_off;
34 if (!_machine_restart)
35 _machine_restart = db1x_reset;
39 late_initcall(db1x_poweroff_setup);
41 /* register a pcmcia socket */
42 int __init db1x_register_pcmcia_socket(phys_addr_t pcmcia_attr_start,
43 phys_addr_t pcmcia_attr_end,
44 phys_addr_t pcmcia_mem_start,
45 phys_addr_t pcmcia_mem_end,
46 phys_addr_t pcmcia_io_start,
47 phys_addr_t pcmcia_io_end,
56 struct platform_device *pd;
64 sr = kzalloc(sizeof(struct resource) * cnt, GFP_KERNEL);
68 pd = platform_device_alloc("db1xxx_pcmcia", id);
74 sr[0].name = "pcmcia-attr";
75 sr[0].flags = IORESOURCE_MEM;
76 sr[0].start = pcmcia_attr_start;
77 sr[0].end = pcmcia_attr_end;
79 sr[1].name = "pcmcia-mem";
80 sr[1].flags = IORESOURCE_MEM;
81 sr[1].start = pcmcia_mem_start;
82 sr[1].end = pcmcia_mem_end;
84 sr[2].name = "pcmcia-io";
85 sr[2].flags = IORESOURCE_MEM;
86 sr[2].start = pcmcia_io_start;
87 sr[2].end = pcmcia_io_end;
89 sr[3].name = "insert";
90 sr[3].flags = IORESOURCE_IRQ;
91 sr[3].start = sr[3].end = cd_irq;
94 sr[4].flags = IORESOURCE_IRQ;
95 sr[4].start = sr[4].end = card_irq;
99 sr[i].name = "stschg";
100 sr[i].flags = IORESOURCE_IRQ;
101 sr[i].start = sr[i].end = stschg_irq;
105 sr[i].name = "eject";
106 sr[i].flags = IORESOURCE_IRQ;
107 sr[i].start = sr[i].end = eject_irq;
111 pd->num_resources = cnt;
113 ret = platform_device_add(pd);
117 platform_device_put(pd);
123 #define YAMON_SIZE 0x00100000
124 #define YAMON_ENV_SIZE 0x00040000
126 int __init db1x_register_norflash(unsigned long size, int width,
129 struct physmap_flash_data *pfd;
130 struct platform_device *pd;
131 struct mtd_partition *parts;
132 struct resource *res;
135 if (size < (8 * 1024 * 1024))
139 parts = kzalloc(sizeof(struct mtd_partition) * 5, GFP_KERNEL);
143 res = kzalloc(sizeof(struct resource), GFP_KERNEL);
147 pfd = kzalloc(sizeof(struct physmap_flash_data), GFP_KERNEL);
151 pd = platform_device_alloc("physmap-flash", 0);
155 /* NOR flash ends at 0x20000000, regardless of size */
156 res->start = 0x20000000 - size;
157 res->end = 0x20000000 - 1;
158 res->flags = IORESOURCE_MEM;
160 /* partition setup. Most Develboards have a switch which allows
161 * to swap the physical locations of the 2 NOR flash banks.
167 parts[i].name = "User FS";
168 parts[i].size = size / 2;
172 parts[i].offset = MTDPART_OFS_APPEND;
173 parts[i].name = "User FS 2";
174 parts[i].size = (size / 2) - (0x20000000 - 0x1fc00000);
177 parts[i].offset = MTDPART_OFS_APPEND;
178 parts[i].name = "YAMON";
179 parts[i].size = YAMON_SIZE;
180 parts[i].mask_flags = MTD_WRITEABLE;
183 parts[i].offset = MTDPART_OFS_APPEND;
184 parts[i].name = "raw kernel";
185 parts[i].size = 0x00400000 - YAMON_SIZE - YAMON_ENV_SIZE;
188 parts[i].offset = MTDPART_OFS_APPEND;
189 parts[i].name = "YAMON Env";
190 parts[i].size = YAMON_ENV_SIZE;
191 parts[i].mask_flags = MTD_WRITEABLE;
195 parts[i].offset = MTDPART_OFS_APPEND;
196 parts[i].name = "User FS";
197 parts[i].size = size / 2;
205 pd->dev.platform_data = pfd;
207 pd->num_resources = 1;
209 ret = platform_device_add(pd);
213 platform_device_put(pd);