2 * Copyright 2000-2003, 2008 MontaVista Software Inc.
3 * Author: MontaVista Software, Inc. <source@mvista.com>
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
10 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
11 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
12 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
13 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
14 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
15 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
16 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
17 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
18 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
19 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
21 * You should have received a copy of the GNU General Public License along
22 * with this program; if not, write to the Free Software Foundation, Inc.,
23 * 675 Mass Ave, Cambridge, MA 02139, USA.
26 #include <linux/gpio.h>
27 #include <linux/init.h>
28 #include <linux/interrupt.h>
29 #include <linux/delay.h>
31 #include <asm/mach-au1x00/au1000.h>
35 void board_reset(void)
37 /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */
38 au_writel(0x00000000, 0xAE00001C);
41 void __init board_setup(void)
45 #ifdef CONFIG_SERIAL_8250_CONSOLE
47 argptr = prom_getcmdline();
48 argptr = strstr(argptr, "console=");
50 argptr = prom_getcmdline();
51 strcat(argptr, " console=ttyS0,115200");
55 alchemy_gpio1_input_enable();
56 alchemy_gpio2_enable();
58 /* Set multiple use pins (UART3/GPIO) to UART (it's used as UART too) */
59 pin_func = au_readl(SYS_PINFUNC) & ~SYS_PF_UR3;
60 pin_func |= SYS_PF_UR3;
61 au_writel(pin_func, SYS_PINFUNC);
64 au_writel(0x01, UART3_ADDR + UART_MOD_CNTRL); /* clock enable (CE) */
66 au_writel(0x03, UART3_ADDR + UART_MOD_CNTRL); /* CE and "enable" */
69 /* Enable DTR = USB power up */
70 au_writel(0x01, UART3_ADDR + UART_MCR); /* UART_MCR_DTR is 0x01??? */
73 #if defined(__MIPSEB__)
74 au_writel(0xf | (2 << 6) | (1 << 4), Au1500_PCI_CFG);
76 au_writel(0xf, Au1500_PCI_CFG);
81 static int __init xxs1500_init_irq(void)
83 set_irq_type(AU1500_GPIO204_INT, IRQF_TRIGGER_HIGH);
84 set_irq_type(AU1500_GPIO201_INT, IRQF_TRIGGER_LOW);
85 set_irq_type(AU1500_GPIO202_INT, IRQF_TRIGGER_LOW);
86 set_irq_type(AU1500_GPIO203_INT, IRQF_TRIGGER_LOW);
87 set_irq_type(AU1500_GPIO205_INT, IRQF_TRIGGER_LOW);
88 set_irq_type(AU1500_GPIO207_INT, IRQF_TRIGGER_LOW);
90 set_irq_type(AU1500_GPIO0_INT, IRQF_TRIGGER_LOW);
91 set_irq_type(AU1500_GPIO1_INT, IRQF_TRIGGER_LOW);
92 set_irq_type(AU1500_GPIO2_INT, IRQF_TRIGGER_LOW);
93 set_irq_type(AU1500_GPIO3_INT, IRQF_TRIGGER_LOW);
94 set_irq_type(AU1500_GPIO4_INT, IRQF_TRIGGER_LOW); /* CF irq */
95 set_irq_type(AU1500_GPIO5_INT, IRQF_TRIGGER_LOW);
99 arch_initcall(xxs1500_init_irq);