2 * Atheros AR913X/AR933X SoC built-in WMAC device support
4 * Copyright (C) 2010-2011 Jaiganesh Narayanan <jnarayanan@atheros.com>
5 * Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
6 * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
8 * Parts of this file are based on Atheros 2.6.15/2.6.31 BSP
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License version 2 as published
12 * by the Free Software Foundation.
15 #include <linux/init.h>
16 #include <linux/delay.h>
17 #include <linux/irq.h>
18 #include <linux/platform_device.h>
19 #include <linux/ath9k_platform.h>
21 #include <asm/mach-ath79/ath79.h>
22 #include <asm/mach-ath79/ar71xx_regs.h>
25 static struct ath9k_platform_data ath79_wmac_data;
27 static struct resource ath79_wmac_resources[] = {
29 /* .start and .end fields are filled dynamically */
30 .flags = IORESOURCE_MEM,
32 /* .start and .end fields are filled dynamically */
33 .flags = IORESOURCE_IRQ,
37 static struct platform_device ath79_wmac_device = {
40 .resource = ath79_wmac_resources,
41 .num_resources = ARRAY_SIZE(ath79_wmac_resources),
43 .platform_data = &ath79_wmac_data,
47 static void __init ar913x_wmac_setup(void)
50 ath79_device_reset_set(AR913X_RESET_AMBA2WMAC);
53 ath79_device_reset_clear(AR913X_RESET_AMBA2WMAC);
56 ath79_wmac_resources[0].start = AR913X_WMAC_BASE;
57 ath79_wmac_resources[0].end = AR913X_WMAC_BASE + AR913X_WMAC_SIZE - 1;
58 ath79_wmac_resources[1].start = ATH79_CPU_IRQ_IP2;
59 ath79_wmac_resources[1].end = ATH79_CPU_IRQ_IP2;
63 static int ar933x_wmac_reset(void)
65 ath79_device_reset_set(AR933X_RESET_WMAC);
66 ath79_device_reset_clear(AR933X_RESET_WMAC);
71 static int ar933x_r1_get_wmac_revision(void)
76 static void __init ar933x_wmac_setup(void)
82 ath79_wmac_device.name = "ar933x_wmac";
84 ath79_wmac_resources[0].start = AR933X_WMAC_BASE;
85 ath79_wmac_resources[0].end = AR933X_WMAC_BASE + AR933X_WMAC_SIZE - 1;
86 ath79_wmac_resources[1].start = ATH79_CPU_IRQ_IP2;
87 ath79_wmac_resources[1].end = ATH79_CPU_IRQ_IP2;
89 t = ath79_reset_rr(AR933X_RESET_REG_BOOTSTRAP);
90 if (t & AR933X_BOOTSTRAP_REF_CLK_40)
91 ath79_wmac_data.is_clk_25mhz = false;
93 ath79_wmac_data.is_clk_25mhz = true;
95 if (ath79_soc_rev == 1)
96 ath79_wmac_data.get_mac_revision = ar933x_r1_get_wmac_revision;
98 ath79_wmac_data.external_reset = ar933x_wmac_reset;
101 static void ar934x_wmac_setup(void)
105 ath79_wmac_device.name = "ar934x_wmac";
107 ath79_wmac_resources[0].start = AR934X_WMAC_BASE;
108 ath79_wmac_resources[0].end = AR934X_WMAC_BASE + AR934X_WMAC_SIZE - 1;
109 ath79_wmac_resources[1].start = ATH79_IP2_IRQ(1);
110 ath79_wmac_resources[1].start = ATH79_IP2_IRQ(1);
112 t = ath79_reset_rr(AR934X_RESET_REG_BOOTSTRAP);
113 if (t & AR934X_BOOTSTRAP_REF_CLK_40)
114 ath79_wmac_data.is_clk_25mhz = false;
116 ath79_wmac_data.is_clk_25mhz = true;
119 void __init ath79_register_wmac(u8 *cal_data)
123 else if (soc_is_ar933x())
125 else if (soc_is_ar934x())
131 memcpy(ath79_wmac_data.eeprom_data, cal_data,
132 sizeof(ath79_wmac_data.eeprom_data));
134 platform_device_register(&ath79_wmac_device);