1 /***********************license start***************
2 * Author: Cavium Networks
4 * Contact: support@caviumnetworks.com
5 * This file is part of the OCTEON SDK
7 * Copyright (c) 2003-2012 Cavium Networks
9 * This file is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License, Version 2, as
11 * published by the Free Software Foundation.
13 * This file is distributed in the hope that it will be useful, but
14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
15 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
16 * NONINFRINGEMENT. See the GNU General Public License for more
19 * You should have received a copy of the GNU General Public License
20 * along with this file; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 * or visit http://www.gnu.org/licenses/.
24 * This file may also be available under a different license from Cavium.
25 * Contact Cavium Networks for more information
26 ***********************license end**************************************/
28 #ifndef __CVMX_PEMX_DEFS_H__
29 #define __CVMX_PEMX_DEFS_H__
31 #define CVMX_PEMX_BAR1_INDEXX(offset, block_id) (CVMX_ADD_IO_SEG(0x00011800C00000A8ull) + (((offset) & 15) + ((block_id) & 1) * 0x200000ull) * 8)
32 #define CVMX_PEMX_BAR2_MASK(block_id) (CVMX_ADD_IO_SEG(0x00011800C0000130ull) + ((block_id) & 1) * 0x1000000ull)
33 #define CVMX_PEMX_BAR_CTL(block_id) (CVMX_ADD_IO_SEG(0x00011800C0000128ull) + ((block_id) & 1) * 0x1000000ull)
34 #define CVMX_PEMX_BIST_STATUS(block_id) (CVMX_ADD_IO_SEG(0x00011800C0000018ull) + ((block_id) & 1) * 0x1000000ull)
35 #define CVMX_PEMX_BIST_STATUS2(block_id) (CVMX_ADD_IO_SEG(0x00011800C0000420ull) + ((block_id) & 1) * 0x1000000ull)
36 #define CVMX_PEMX_CFG_RD(block_id) (CVMX_ADD_IO_SEG(0x00011800C0000030ull) + ((block_id) & 1) * 0x1000000ull)
37 #define CVMX_PEMX_CFG_WR(block_id) (CVMX_ADD_IO_SEG(0x00011800C0000028ull) + ((block_id) & 1) * 0x1000000ull)
38 #define CVMX_PEMX_CPL_LUT_VALID(block_id) (CVMX_ADD_IO_SEG(0x00011800C0000098ull) + ((block_id) & 1) * 0x1000000ull)
39 #define CVMX_PEMX_CTL_STATUS(block_id) (CVMX_ADD_IO_SEG(0x00011800C0000000ull) + ((block_id) & 1) * 0x1000000ull)
40 #define CVMX_PEMX_DBG_INFO(block_id) (CVMX_ADD_IO_SEG(0x00011800C0000008ull) + ((block_id) & 1) * 0x1000000ull)
41 #define CVMX_PEMX_DBG_INFO_EN(block_id) (CVMX_ADD_IO_SEG(0x00011800C00000A0ull) + ((block_id) & 1) * 0x1000000ull)
42 #define CVMX_PEMX_DIAG_STATUS(block_id) (CVMX_ADD_IO_SEG(0x00011800C0000020ull) + ((block_id) & 1) * 0x1000000ull)
43 #define CVMX_PEMX_INB_READ_CREDITS(block_id) (CVMX_ADD_IO_SEG(0x00011800C0000138ull) + ((block_id) & 1) * 0x1000000ull)
44 #define CVMX_PEMX_INT_ENB(block_id) (CVMX_ADD_IO_SEG(0x00011800C0000410ull) + ((block_id) & 1) * 0x1000000ull)
45 #define CVMX_PEMX_INT_ENB_INT(block_id) (CVMX_ADD_IO_SEG(0x00011800C0000418ull) + ((block_id) & 1) * 0x1000000ull)
46 #define CVMX_PEMX_INT_SUM(block_id) (CVMX_ADD_IO_SEG(0x00011800C0000408ull) + ((block_id) & 1) * 0x1000000ull)
47 #define CVMX_PEMX_P2N_BAR0_START(block_id) (CVMX_ADD_IO_SEG(0x00011800C0000080ull) + ((block_id) & 1) * 0x1000000ull)
48 #define CVMX_PEMX_P2N_BAR1_START(block_id) (CVMX_ADD_IO_SEG(0x00011800C0000088ull) + ((block_id) & 1) * 0x1000000ull)
49 #define CVMX_PEMX_P2N_BAR2_START(block_id) (CVMX_ADD_IO_SEG(0x00011800C0000090ull) + ((block_id) & 1) * 0x1000000ull)
50 #define CVMX_PEMX_P2P_BARX_END(offset, block_id) (CVMX_ADD_IO_SEG(0x00011800C0000048ull) + (((offset) & 3) + ((block_id) & 1) * 0x100000ull) * 16)
51 #define CVMX_PEMX_P2P_BARX_START(offset, block_id) (CVMX_ADD_IO_SEG(0x00011800C0000040ull) + (((offset) & 3) + ((block_id) & 1) * 0x100000ull) * 16)
52 #define CVMX_PEMX_TLP_CREDITS(block_id) (CVMX_ADD_IO_SEG(0x00011800C0000038ull) + ((block_id) & 1) * 0x1000000ull)
54 union cvmx_pemx_bar1_indexx {
56 struct cvmx_pemx_bar1_indexx_s {
57 #ifdef __BIG_ENDIAN_BITFIELD
58 uint64_t reserved_20_63:44;
68 uint64_t reserved_20_63:44;
71 struct cvmx_pemx_bar1_indexx_s cn61xx;
72 struct cvmx_pemx_bar1_indexx_s cn63xx;
73 struct cvmx_pemx_bar1_indexx_s cn63xxp1;
74 struct cvmx_pemx_bar1_indexx_s cn66xx;
75 struct cvmx_pemx_bar1_indexx_s cn68xx;
76 struct cvmx_pemx_bar1_indexx_s cn68xxp1;
77 struct cvmx_pemx_bar1_indexx_s cnf71xx;
80 union cvmx_pemx_bar2_mask {
82 struct cvmx_pemx_bar2_mask_s {
83 #ifdef __BIG_ENDIAN_BITFIELD
84 uint64_t reserved_38_63:26;
86 uint64_t reserved_0_2:3;
88 uint64_t reserved_0_2:3;
90 uint64_t reserved_38_63:26;
93 struct cvmx_pemx_bar2_mask_s cn61xx;
94 struct cvmx_pemx_bar2_mask_s cn66xx;
95 struct cvmx_pemx_bar2_mask_s cn68xx;
96 struct cvmx_pemx_bar2_mask_s cn68xxp1;
97 struct cvmx_pemx_bar2_mask_s cnf71xx;
100 union cvmx_pemx_bar_ctl {
102 struct cvmx_pemx_bar_ctl_s {
103 #ifdef __BIG_ENDIAN_BITFIELD
104 uint64_t reserved_7_63:57;
114 uint64_t reserved_7_63:57;
117 struct cvmx_pemx_bar_ctl_s cn61xx;
118 struct cvmx_pemx_bar_ctl_s cn63xx;
119 struct cvmx_pemx_bar_ctl_s cn63xxp1;
120 struct cvmx_pemx_bar_ctl_s cn66xx;
121 struct cvmx_pemx_bar_ctl_s cn68xx;
122 struct cvmx_pemx_bar_ctl_s cn68xxp1;
123 struct cvmx_pemx_bar_ctl_s cnf71xx;
126 union cvmx_pemx_bist_status {
128 struct cvmx_pemx_bist_status_s {
129 #ifdef __BIG_ENDIAN_BITFIELD
130 uint64_t reserved_8_63:56;
148 uint64_t reserved_8_63:56;
151 struct cvmx_pemx_bist_status_s cn61xx;
152 struct cvmx_pemx_bist_status_s cn63xx;
153 struct cvmx_pemx_bist_status_s cn63xxp1;
154 struct cvmx_pemx_bist_status_s cn66xx;
155 struct cvmx_pemx_bist_status_s cn68xx;
156 struct cvmx_pemx_bist_status_s cn68xxp1;
157 struct cvmx_pemx_bist_status_s cnf71xx;
160 union cvmx_pemx_bist_status2 {
162 struct cvmx_pemx_bist_status2_s {
163 #ifdef __BIG_ENDIAN_BITFIELD
164 uint64_t reserved_10_63:54;
186 uint64_t reserved_10_63:54;
189 struct cvmx_pemx_bist_status2_s cn61xx;
190 struct cvmx_pemx_bist_status2_s cn63xx;
191 struct cvmx_pemx_bist_status2_s cn63xxp1;
192 struct cvmx_pemx_bist_status2_s cn66xx;
193 struct cvmx_pemx_bist_status2_s cn68xx;
194 struct cvmx_pemx_bist_status2_s cn68xxp1;
195 struct cvmx_pemx_bist_status2_s cnf71xx;
198 union cvmx_pemx_cfg_rd {
200 struct cvmx_pemx_cfg_rd_s {
201 #ifdef __BIG_ENDIAN_BITFIELD
209 struct cvmx_pemx_cfg_rd_s cn61xx;
210 struct cvmx_pemx_cfg_rd_s cn63xx;
211 struct cvmx_pemx_cfg_rd_s cn63xxp1;
212 struct cvmx_pemx_cfg_rd_s cn66xx;
213 struct cvmx_pemx_cfg_rd_s cn68xx;
214 struct cvmx_pemx_cfg_rd_s cn68xxp1;
215 struct cvmx_pemx_cfg_rd_s cnf71xx;
218 union cvmx_pemx_cfg_wr {
220 struct cvmx_pemx_cfg_wr_s {
221 #ifdef __BIG_ENDIAN_BITFIELD
229 struct cvmx_pemx_cfg_wr_s cn61xx;
230 struct cvmx_pemx_cfg_wr_s cn63xx;
231 struct cvmx_pemx_cfg_wr_s cn63xxp1;
232 struct cvmx_pemx_cfg_wr_s cn66xx;
233 struct cvmx_pemx_cfg_wr_s cn68xx;
234 struct cvmx_pemx_cfg_wr_s cn68xxp1;
235 struct cvmx_pemx_cfg_wr_s cnf71xx;
238 union cvmx_pemx_cpl_lut_valid {
240 struct cvmx_pemx_cpl_lut_valid_s {
241 #ifdef __BIG_ENDIAN_BITFIELD
242 uint64_t reserved_32_63:32;
246 uint64_t reserved_32_63:32;
249 struct cvmx_pemx_cpl_lut_valid_s cn61xx;
250 struct cvmx_pemx_cpl_lut_valid_s cn63xx;
251 struct cvmx_pemx_cpl_lut_valid_s cn63xxp1;
252 struct cvmx_pemx_cpl_lut_valid_s cn66xx;
253 struct cvmx_pemx_cpl_lut_valid_s cn68xx;
254 struct cvmx_pemx_cpl_lut_valid_s cn68xxp1;
255 struct cvmx_pemx_cpl_lut_valid_s cnf71xx;
258 union cvmx_pemx_ctl_status {
260 struct cvmx_pemx_ctl_status_s {
261 #ifdef __BIG_ENDIAN_BITFIELD
262 uint64_t reserved_48_63:16;
266 uint64_t reserved_32_33:2;
267 uint64_t cfg_rtry:16;
268 uint64_t reserved_12_15:4;
272 uint64_t reserved_7_8:2;
288 uint64_t reserved_7_8:2;
292 uint64_t reserved_12_15:4;
293 uint64_t cfg_rtry:16;
294 uint64_t reserved_32_33:2;
298 uint64_t reserved_48_63:16;
301 struct cvmx_pemx_ctl_status_s cn61xx;
302 struct cvmx_pemx_ctl_status_s cn63xx;
303 struct cvmx_pemx_ctl_status_s cn63xxp1;
304 struct cvmx_pemx_ctl_status_s cn66xx;
305 struct cvmx_pemx_ctl_status_s cn68xx;
306 struct cvmx_pemx_ctl_status_s cn68xxp1;
307 struct cvmx_pemx_ctl_status_s cnf71xx;
310 union cvmx_pemx_dbg_info {
312 struct cvmx_pemx_dbg_info_s {
313 #ifdef __BIG_ENDIAN_BITFIELD
314 uint64_t reserved_31_63:33;
378 uint64_t reserved_31_63:33;
381 struct cvmx_pemx_dbg_info_s cn61xx;
382 struct cvmx_pemx_dbg_info_s cn63xx;
383 struct cvmx_pemx_dbg_info_s cn63xxp1;
384 struct cvmx_pemx_dbg_info_s cn66xx;
385 struct cvmx_pemx_dbg_info_s cn68xx;
386 struct cvmx_pemx_dbg_info_s cn68xxp1;
387 struct cvmx_pemx_dbg_info_s cnf71xx;
390 union cvmx_pemx_dbg_info_en {
392 struct cvmx_pemx_dbg_info_en_s {
393 #ifdef __BIG_ENDIAN_BITFIELD
394 uint64_t reserved_31_63:33;
458 uint64_t reserved_31_63:33;
461 struct cvmx_pemx_dbg_info_en_s cn61xx;
462 struct cvmx_pemx_dbg_info_en_s cn63xx;
463 struct cvmx_pemx_dbg_info_en_s cn63xxp1;
464 struct cvmx_pemx_dbg_info_en_s cn66xx;
465 struct cvmx_pemx_dbg_info_en_s cn68xx;
466 struct cvmx_pemx_dbg_info_en_s cn68xxp1;
467 struct cvmx_pemx_dbg_info_en_s cnf71xx;
470 union cvmx_pemx_diag_status {
472 struct cvmx_pemx_diag_status_s {
473 #ifdef __BIG_ENDIAN_BITFIELD
474 uint64_t reserved_4_63:60;
484 uint64_t reserved_4_63:60;
487 struct cvmx_pemx_diag_status_s cn61xx;
488 struct cvmx_pemx_diag_status_s cn63xx;
489 struct cvmx_pemx_diag_status_s cn63xxp1;
490 struct cvmx_pemx_diag_status_s cn66xx;
491 struct cvmx_pemx_diag_status_s cn68xx;
492 struct cvmx_pemx_diag_status_s cn68xxp1;
493 struct cvmx_pemx_diag_status_s cnf71xx;
496 union cvmx_pemx_inb_read_credits {
498 struct cvmx_pemx_inb_read_credits_s {
499 #ifdef __BIG_ENDIAN_BITFIELD
500 uint64_t reserved_6_63:58;
504 uint64_t reserved_6_63:58;
507 struct cvmx_pemx_inb_read_credits_s cn61xx;
508 struct cvmx_pemx_inb_read_credits_s cn66xx;
509 struct cvmx_pemx_inb_read_credits_s cn68xx;
510 struct cvmx_pemx_inb_read_credits_s cnf71xx;
513 union cvmx_pemx_int_enb {
515 struct cvmx_pemx_int_enb_s {
516 #ifdef __BIG_ENDIAN_BITFIELD
517 uint64_t reserved_14_63:50;
547 uint64_t reserved_14_63:50;
550 struct cvmx_pemx_int_enb_s cn61xx;
551 struct cvmx_pemx_int_enb_s cn63xx;
552 struct cvmx_pemx_int_enb_s cn63xxp1;
553 struct cvmx_pemx_int_enb_s cn66xx;
554 struct cvmx_pemx_int_enb_s cn68xx;
555 struct cvmx_pemx_int_enb_s cn68xxp1;
556 struct cvmx_pemx_int_enb_s cnf71xx;
559 union cvmx_pemx_int_enb_int {
561 struct cvmx_pemx_int_enb_int_s {
562 #ifdef __BIG_ENDIAN_BITFIELD
563 uint64_t reserved_14_63:50;
593 uint64_t reserved_14_63:50;
596 struct cvmx_pemx_int_enb_int_s cn61xx;
597 struct cvmx_pemx_int_enb_int_s cn63xx;
598 struct cvmx_pemx_int_enb_int_s cn63xxp1;
599 struct cvmx_pemx_int_enb_int_s cn66xx;
600 struct cvmx_pemx_int_enb_int_s cn68xx;
601 struct cvmx_pemx_int_enb_int_s cn68xxp1;
602 struct cvmx_pemx_int_enb_int_s cnf71xx;
605 union cvmx_pemx_int_sum {
607 struct cvmx_pemx_int_sum_s {
608 #ifdef __BIG_ENDIAN_BITFIELD
609 uint64_t reserved_14_63:50;
639 uint64_t reserved_14_63:50;
642 struct cvmx_pemx_int_sum_s cn61xx;
643 struct cvmx_pemx_int_sum_s cn63xx;
644 struct cvmx_pemx_int_sum_s cn63xxp1;
645 struct cvmx_pemx_int_sum_s cn66xx;
646 struct cvmx_pemx_int_sum_s cn68xx;
647 struct cvmx_pemx_int_sum_s cn68xxp1;
648 struct cvmx_pemx_int_sum_s cnf71xx;
651 union cvmx_pemx_p2n_bar0_start {
653 struct cvmx_pemx_p2n_bar0_start_s {
654 #ifdef __BIG_ENDIAN_BITFIELD
656 uint64_t reserved_0_13:14;
658 uint64_t reserved_0_13:14;
662 struct cvmx_pemx_p2n_bar0_start_s cn61xx;
663 struct cvmx_pemx_p2n_bar0_start_s cn63xx;
664 struct cvmx_pemx_p2n_bar0_start_s cn63xxp1;
665 struct cvmx_pemx_p2n_bar0_start_s cn66xx;
666 struct cvmx_pemx_p2n_bar0_start_s cn68xx;
667 struct cvmx_pemx_p2n_bar0_start_s cn68xxp1;
668 struct cvmx_pemx_p2n_bar0_start_s cnf71xx;
671 union cvmx_pemx_p2n_bar1_start {
673 struct cvmx_pemx_p2n_bar1_start_s {
674 #ifdef __BIG_ENDIAN_BITFIELD
676 uint64_t reserved_0_25:26;
678 uint64_t reserved_0_25:26;
682 struct cvmx_pemx_p2n_bar1_start_s cn61xx;
683 struct cvmx_pemx_p2n_bar1_start_s cn63xx;
684 struct cvmx_pemx_p2n_bar1_start_s cn63xxp1;
685 struct cvmx_pemx_p2n_bar1_start_s cn66xx;
686 struct cvmx_pemx_p2n_bar1_start_s cn68xx;
687 struct cvmx_pemx_p2n_bar1_start_s cn68xxp1;
688 struct cvmx_pemx_p2n_bar1_start_s cnf71xx;
691 union cvmx_pemx_p2n_bar2_start {
693 struct cvmx_pemx_p2n_bar2_start_s {
694 #ifdef __BIG_ENDIAN_BITFIELD
696 uint64_t reserved_0_40:41;
698 uint64_t reserved_0_40:41;
702 struct cvmx_pemx_p2n_bar2_start_s cn61xx;
703 struct cvmx_pemx_p2n_bar2_start_s cn63xx;
704 struct cvmx_pemx_p2n_bar2_start_s cn63xxp1;
705 struct cvmx_pemx_p2n_bar2_start_s cn66xx;
706 struct cvmx_pemx_p2n_bar2_start_s cn68xx;
707 struct cvmx_pemx_p2n_bar2_start_s cn68xxp1;
708 struct cvmx_pemx_p2n_bar2_start_s cnf71xx;
711 union cvmx_pemx_p2p_barx_end {
713 struct cvmx_pemx_p2p_barx_end_s {
714 #ifdef __BIG_ENDIAN_BITFIELD
716 uint64_t reserved_0_11:12;
718 uint64_t reserved_0_11:12;
722 struct cvmx_pemx_p2p_barx_end_s cn63xx;
723 struct cvmx_pemx_p2p_barx_end_s cn63xxp1;
724 struct cvmx_pemx_p2p_barx_end_s cn66xx;
725 struct cvmx_pemx_p2p_barx_end_s cn68xx;
726 struct cvmx_pemx_p2p_barx_end_s cn68xxp1;
729 union cvmx_pemx_p2p_barx_start {
731 struct cvmx_pemx_p2p_barx_start_s {
732 #ifdef __BIG_ENDIAN_BITFIELD
734 uint64_t reserved_0_11:12;
736 uint64_t reserved_0_11:12;
740 struct cvmx_pemx_p2p_barx_start_s cn63xx;
741 struct cvmx_pemx_p2p_barx_start_s cn63xxp1;
742 struct cvmx_pemx_p2p_barx_start_s cn66xx;
743 struct cvmx_pemx_p2p_barx_start_s cn68xx;
744 struct cvmx_pemx_p2p_barx_start_s cn68xxp1;
747 union cvmx_pemx_tlp_credits {
749 struct cvmx_pemx_tlp_credits_s {
750 #ifdef __BIG_ENDIAN_BITFIELD
751 uint64_t reserved_56_63:8;
767 uint64_t reserved_56_63:8;
770 struct cvmx_pemx_tlp_credits_cn61xx {
771 #ifdef __BIG_ENDIAN_BITFIELD
772 uint64_t reserved_56_63:8;
774 uint64_t reserved_24_47:24;
782 uint64_t reserved_24_47:24;
784 uint64_t reserved_56_63:8;
787 struct cvmx_pemx_tlp_credits_s cn63xx;
788 struct cvmx_pemx_tlp_credits_s cn63xxp1;
789 struct cvmx_pemx_tlp_credits_s cn66xx;
790 struct cvmx_pemx_tlp_credits_s cn68xx;
791 struct cvmx_pemx_tlp_credits_s cn68xxp1;
792 struct cvmx_pemx_tlp_credits_cn61xx cnf71xx;