1 /***********************license start***************
2 * Author: Cavium Networks
4 * Contact: support@caviumnetworks.com
5 * This file is part of the OCTEON SDK
7 * Copyright (c) 2003-2008 Cavium Networks
9 * This file is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License, Version 2, as
11 * published by the Free Software Foundation.
13 * This file is distributed in the hope that it will be useful, but
14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
15 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
16 * NONINFRINGEMENT. See the GNU General Public License for more
19 * You should have received a copy of the GNU General Public License
20 * along with this file; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 * or visit http://www.gnu.org/licenses/.
24 * This file may also be available under a different license from Cavium.
25 * Contact Cavium Networks for more information
26 ***********************license end**************************************/
28 #ifndef __CVMX_PESCX_DEFS_H__
29 #define __CVMX_PESCX_DEFS_H__
31 #define CVMX_PESCX_BIST_STATUS(block_id) \
32 CVMX_ADD_IO_SEG(0x00011800C8000018ull + (((block_id) & 1) * 0x8000000ull))
33 #define CVMX_PESCX_BIST_STATUS2(block_id) \
34 CVMX_ADD_IO_SEG(0x00011800C8000418ull + (((block_id) & 1) * 0x8000000ull))
35 #define CVMX_PESCX_CFG_RD(block_id) \
36 CVMX_ADD_IO_SEG(0x00011800C8000030ull + (((block_id) & 1) * 0x8000000ull))
37 #define CVMX_PESCX_CFG_WR(block_id) \
38 CVMX_ADD_IO_SEG(0x00011800C8000028ull + (((block_id) & 1) * 0x8000000ull))
39 #define CVMX_PESCX_CPL_LUT_VALID(block_id) \
40 CVMX_ADD_IO_SEG(0x00011800C8000098ull + (((block_id) & 1) * 0x8000000ull))
41 #define CVMX_PESCX_CTL_STATUS(block_id) \
42 CVMX_ADD_IO_SEG(0x00011800C8000000ull + (((block_id) & 1) * 0x8000000ull))
43 #define CVMX_PESCX_CTL_STATUS2(block_id) \
44 CVMX_ADD_IO_SEG(0x00011800C8000400ull + (((block_id) & 1) * 0x8000000ull))
45 #define CVMX_PESCX_DBG_INFO(block_id) \
46 CVMX_ADD_IO_SEG(0x00011800C8000008ull + (((block_id) & 1) * 0x8000000ull))
47 #define CVMX_PESCX_DBG_INFO_EN(block_id) \
48 CVMX_ADD_IO_SEG(0x00011800C80000A0ull + (((block_id) & 1) * 0x8000000ull))
49 #define CVMX_PESCX_DIAG_STATUS(block_id) \
50 CVMX_ADD_IO_SEG(0x00011800C8000020ull + (((block_id) & 1) * 0x8000000ull))
51 #define CVMX_PESCX_P2N_BAR0_START(block_id) \
52 CVMX_ADD_IO_SEG(0x00011800C8000080ull + (((block_id) & 1) * 0x8000000ull))
53 #define CVMX_PESCX_P2N_BAR1_START(block_id) \
54 CVMX_ADD_IO_SEG(0x00011800C8000088ull + (((block_id) & 1) * 0x8000000ull))
55 #define CVMX_PESCX_P2N_BAR2_START(block_id) \
56 CVMX_ADD_IO_SEG(0x00011800C8000090ull + (((block_id) & 1) * 0x8000000ull))
57 #define CVMX_PESCX_P2P_BARX_END(offset, block_id) \
58 CVMX_ADD_IO_SEG(0x00011800C8000048ull + (((offset) & 3) * 16) + (((block_id) & 1) * 0x8000000ull))
59 #define CVMX_PESCX_P2P_BARX_START(offset, block_id) \
60 CVMX_ADD_IO_SEG(0x00011800C8000040ull + (((offset) & 3) * 16) + (((block_id) & 1) * 0x8000000ull))
61 #define CVMX_PESCX_TLP_CREDITS(block_id) \
62 CVMX_ADD_IO_SEG(0x00011800C8000038ull + (((block_id) & 1) * 0x8000000ull))
64 union cvmx_pescx_bist_status {
66 struct cvmx_pescx_bist_status_s {
67 uint64_t reserved_13_63:51;
82 struct cvmx_pescx_bist_status_s cn52xx;
83 struct cvmx_pescx_bist_status_cn52xxp1 {
84 uint64_t reserved_12_63:52;
98 struct cvmx_pescx_bist_status_s cn56xx;
99 struct cvmx_pescx_bist_status_cn52xxp1 cn56xxp1;
102 union cvmx_pescx_bist_status2 {
104 struct cvmx_pescx_bist_status2_s {
105 uint64_t reserved_14_63:50;
121 struct cvmx_pescx_bist_status2_s cn52xx;
122 struct cvmx_pescx_bist_status2_s cn52xxp1;
123 struct cvmx_pescx_bist_status2_s cn56xx;
124 struct cvmx_pescx_bist_status2_s cn56xxp1;
127 union cvmx_pescx_cfg_rd {
129 struct cvmx_pescx_cfg_rd_s {
133 struct cvmx_pescx_cfg_rd_s cn52xx;
134 struct cvmx_pescx_cfg_rd_s cn52xxp1;
135 struct cvmx_pescx_cfg_rd_s cn56xx;
136 struct cvmx_pescx_cfg_rd_s cn56xxp1;
139 union cvmx_pescx_cfg_wr {
141 struct cvmx_pescx_cfg_wr_s {
145 struct cvmx_pescx_cfg_wr_s cn52xx;
146 struct cvmx_pescx_cfg_wr_s cn52xxp1;
147 struct cvmx_pescx_cfg_wr_s cn56xx;
148 struct cvmx_pescx_cfg_wr_s cn56xxp1;
151 union cvmx_pescx_cpl_lut_valid {
153 struct cvmx_pescx_cpl_lut_valid_s {
154 uint64_t reserved_32_63:32;
157 struct cvmx_pescx_cpl_lut_valid_s cn52xx;
158 struct cvmx_pescx_cpl_lut_valid_s cn52xxp1;
159 struct cvmx_pescx_cpl_lut_valid_s cn56xx;
160 struct cvmx_pescx_cpl_lut_valid_s cn56xxp1;
163 union cvmx_pescx_ctl_status {
165 struct cvmx_pescx_ctl_status_s {
166 uint64_t reserved_28_63:36;
174 uint64_t reserved_7_8:2;
179 uint64_t reserved_2_2:1;
183 struct cvmx_pescx_ctl_status_s cn52xx;
184 struct cvmx_pescx_ctl_status_s cn52xxp1;
185 struct cvmx_pescx_ctl_status_cn56xx {
186 uint64_t reserved_28_63:36;
190 uint64_t reserved_12_12:1;
194 uint64_t reserved_7_8:2;
199 uint64_t reserved_2_2:1;
203 struct cvmx_pescx_ctl_status_cn56xx cn56xxp1;
206 union cvmx_pescx_ctl_status2 {
208 struct cvmx_pescx_ctl_status2_s {
209 uint64_t reserved_2_63:62;
213 struct cvmx_pescx_ctl_status2_s cn52xx;
214 struct cvmx_pescx_ctl_status2_cn52xxp1 {
215 uint64_t reserved_1_63:63;
218 struct cvmx_pescx_ctl_status2_s cn56xx;
219 struct cvmx_pescx_ctl_status2_cn52xxp1 cn56xxp1;
222 union cvmx_pescx_dbg_info {
224 struct cvmx_pescx_dbg_info_s {
225 uint64_t reserved_31_63:33;
258 struct cvmx_pescx_dbg_info_s cn52xx;
259 struct cvmx_pescx_dbg_info_s cn52xxp1;
260 struct cvmx_pescx_dbg_info_s cn56xx;
261 struct cvmx_pescx_dbg_info_s cn56xxp1;
264 union cvmx_pescx_dbg_info_en {
266 struct cvmx_pescx_dbg_info_en_s {
267 uint64_t reserved_31_63:33;
300 struct cvmx_pescx_dbg_info_en_s cn52xx;
301 struct cvmx_pescx_dbg_info_en_s cn52xxp1;
302 struct cvmx_pescx_dbg_info_en_s cn56xx;
303 struct cvmx_pescx_dbg_info_en_s cn56xxp1;
306 union cvmx_pescx_diag_status {
308 struct cvmx_pescx_diag_status_s {
309 uint64_t reserved_4_63:60;
315 struct cvmx_pescx_diag_status_s cn52xx;
316 struct cvmx_pescx_diag_status_s cn52xxp1;
317 struct cvmx_pescx_diag_status_s cn56xx;
318 struct cvmx_pescx_diag_status_s cn56xxp1;
321 union cvmx_pescx_p2n_bar0_start {
323 struct cvmx_pescx_p2n_bar0_start_s {
325 uint64_t reserved_0_13:14;
327 struct cvmx_pescx_p2n_bar0_start_s cn52xx;
328 struct cvmx_pescx_p2n_bar0_start_s cn52xxp1;
329 struct cvmx_pescx_p2n_bar0_start_s cn56xx;
330 struct cvmx_pescx_p2n_bar0_start_s cn56xxp1;
333 union cvmx_pescx_p2n_bar1_start {
335 struct cvmx_pescx_p2n_bar1_start_s {
337 uint64_t reserved_0_25:26;
339 struct cvmx_pescx_p2n_bar1_start_s cn52xx;
340 struct cvmx_pescx_p2n_bar1_start_s cn52xxp1;
341 struct cvmx_pescx_p2n_bar1_start_s cn56xx;
342 struct cvmx_pescx_p2n_bar1_start_s cn56xxp1;
345 union cvmx_pescx_p2n_bar2_start {
347 struct cvmx_pescx_p2n_bar2_start_s {
349 uint64_t reserved_0_38:39;
351 struct cvmx_pescx_p2n_bar2_start_s cn52xx;
352 struct cvmx_pescx_p2n_bar2_start_s cn52xxp1;
353 struct cvmx_pescx_p2n_bar2_start_s cn56xx;
354 struct cvmx_pescx_p2n_bar2_start_s cn56xxp1;
357 union cvmx_pescx_p2p_barx_end {
359 struct cvmx_pescx_p2p_barx_end_s {
361 uint64_t reserved_0_11:12;
363 struct cvmx_pescx_p2p_barx_end_s cn52xx;
364 struct cvmx_pescx_p2p_barx_end_s cn52xxp1;
365 struct cvmx_pescx_p2p_barx_end_s cn56xx;
366 struct cvmx_pescx_p2p_barx_end_s cn56xxp1;
369 union cvmx_pescx_p2p_barx_start {
371 struct cvmx_pescx_p2p_barx_start_s {
373 uint64_t reserved_0_11:12;
375 struct cvmx_pescx_p2p_barx_start_s cn52xx;
376 struct cvmx_pescx_p2p_barx_start_s cn52xxp1;
377 struct cvmx_pescx_p2p_barx_start_s cn56xx;
378 struct cvmx_pescx_p2p_barx_start_s cn56xxp1;
381 union cvmx_pescx_tlp_credits {
383 struct cvmx_pescx_tlp_credits_s {
384 uint64_t reserved_0_63:64;
386 struct cvmx_pescx_tlp_credits_cn52xx {
387 uint64_t reserved_56_63:8;
396 struct cvmx_pescx_tlp_credits_cn52xxp1 {
397 uint64_t reserved_38_63:26;
406 struct cvmx_pescx_tlp_credits_cn52xx cn56xx;
407 struct cvmx_pescx_tlp_credits_cn52xxp1 cn56xxp1;