1 /***********************license start***************
2 * Author: Cavium Networks
4 * Contact: support@caviumnetworks.com
5 * This file is part of the OCTEON SDK
7 * Copyright (c) 2003-2011 Cavium Networks
9 * This file is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License, Version 2, as
11 * published by the Free Software Foundation.
13 * This file is distributed in the hope that it will be useful, but
14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
15 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
16 * NONINFRINGEMENT. See the GNU General Public License for more
19 * You should have received a copy of the GNU General Public License
20 * along with this file; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 * or visit http://www.gnu.org/licenses/.
24 * This file may also be available under a different license from Cavium.
25 * Contact Cavium Networks for more information
26 ***********************license end**************************************/
28 #ifndef __CVMX_SRIOX_DEFS_H__
29 #define __CVMX_SRIOX_DEFS_H__
31 #define CVMX_SRIOX_ACC_CTRL(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000148ull) + ((block_id) & 3) * 0x1000000ull)
32 #define CVMX_SRIOX_ASMBLY_ID(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000200ull) + ((block_id) & 3) * 0x1000000ull)
33 #define CVMX_SRIOX_ASMBLY_INFO(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000208ull) + ((block_id) & 3) * 0x1000000ull)
34 #define CVMX_SRIOX_BELL_RESP_CTRL(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000310ull) + ((block_id) & 3) * 0x1000000ull)
35 #define CVMX_SRIOX_BIST_STATUS(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000108ull) + ((block_id) & 3) * 0x1000000ull)
36 #define CVMX_SRIOX_IMSG_CTRL(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000508ull) + ((block_id) & 3) * 0x1000000ull)
37 #define CVMX_SRIOX_IMSG_INST_HDRX(offset, block_id) (CVMX_ADD_IO_SEG(0x00011800C8000510ull) + (((offset) & 1) + ((block_id) & 3) * 0x200000ull) * 8)
38 #define CVMX_SRIOX_IMSG_QOS_GRPX(offset, block_id) (CVMX_ADD_IO_SEG(0x00011800C8000600ull) + (((offset) & 31) + ((block_id) & 3) * 0x200000ull) * 8)
39 #define CVMX_SRIOX_IMSG_STATUSX(offset, block_id) (CVMX_ADD_IO_SEG(0x00011800C8000700ull) + (((offset) & 31) + ((block_id) & 3) * 0x200000ull) * 8)
40 #define CVMX_SRIOX_IMSG_VPORT_THR(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000500ull) + ((block_id) & 3) * 0x1000000ull)
41 #define CVMX_SRIOX_IMSG_VPORT_THR2(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000528ull) + ((block_id) & 3) * 0x1000000ull)
42 #define CVMX_SRIOX_INT2_ENABLE(block_id) (CVMX_ADD_IO_SEG(0x00011800C80003E0ull) + ((block_id) & 3) * 0x1000000ull)
43 #define CVMX_SRIOX_INT2_REG(block_id) (CVMX_ADD_IO_SEG(0x00011800C80003E8ull) + ((block_id) & 3) * 0x1000000ull)
44 #define CVMX_SRIOX_INT_ENABLE(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000110ull) + ((block_id) & 3) * 0x1000000ull)
45 #define CVMX_SRIOX_INT_INFO0(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000120ull) + ((block_id) & 3) * 0x1000000ull)
46 #define CVMX_SRIOX_INT_INFO1(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000128ull) + ((block_id) & 3) * 0x1000000ull)
47 #define CVMX_SRIOX_INT_INFO2(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000130ull) + ((block_id) & 3) * 0x1000000ull)
48 #define CVMX_SRIOX_INT_INFO3(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000138ull) + ((block_id) & 3) * 0x1000000ull)
49 #define CVMX_SRIOX_INT_REG(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000118ull) + ((block_id) & 3) * 0x1000000ull)
50 #define CVMX_SRIOX_IP_FEATURE(block_id) (CVMX_ADD_IO_SEG(0x00011800C80003F8ull) + ((block_id) & 3) * 0x1000000ull)
51 #define CVMX_SRIOX_MAC_BUFFERS(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000390ull) + ((block_id) & 3) * 0x1000000ull)
52 #define CVMX_SRIOX_MAINT_OP(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000158ull) + ((block_id) & 3) * 0x1000000ull)
53 #define CVMX_SRIOX_MAINT_RD_DATA(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000160ull) + ((block_id) & 3) * 0x1000000ull)
54 #define CVMX_SRIOX_MCE_TX_CTL(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000240ull) + ((block_id) & 3) * 0x1000000ull)
55 #define CVMX_SRIOX_MEM_OP_CTRL(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000168ull) + ((block_id) & 3) * 0x1000000ull)
56 #define CVMX_SRIOX_OMSG_CTRLX(offset, block_id) (CVMX_ADD_IO_SEG(0x00011800C8000488ull) + (((offset) & 1) + ((block_id) & 3) * 0x40000ull) * 64)
57 #define CVMX_SRIOX_OMSG_DONE_COUNTSX(offset, block_id) (CVMX_ADD_IO_SEG(0x00011800C80004B0ull) + (((offset) & 1) + ((block_id) & 3) * 0x40000ull) * 64)
58 #define CVMX_SRIOX_OMSG_FMP_MRX(offset, block_id) (CVMX_ADD_IO_SEG(0x00011800C8000498ull) + (((offset) & 1) + ((block_id) & 3) * 0x40000ull) * 64)
59 #define CVMX_SRIOX_OMSG_NMP_MRX(offset, block_id) (CVMX_ADD_IO_SEG(0x00011800C80004A0ull) + (((offset) & 1) + ((block_id) & 3) * 0x40000ull) * 64)
60 #define CVMX_SRIOX_OMSG_PORTX(offset, block_id) (CVMX_ADD_IO_SEG(0x00011800C8000480ull) + (((offset) & 1) + ((block_id) & 3) * 0x40000ull) * 64)
61 #define CVMX_SRIOX_OMSG_SILO_THR(block_id) (CVMX_ADD_IO_SEG(0x00011800C80004F8ull) + ((block_id) & 3) * 0x1000000ull)
62 #define CVMX_SRIOX_OMSG_SP_MRX(offset, block_id) (CVMX_ADD_IO_SEG(0x00011800C8000490ull) + (((offset) & 1) + ((block_id) & 3) * 0x40000ull) * 64)
63 #define CVMX_SRIOX_PRIOX_IN_USE(offset, block_id) (CVMX_ADD_IO_SEG(0x00011800C80003C0ull) + (((offset) & 3) + ((block_id) & 3) * 0x200000ull) * 8)
64 #define CVMX_SRIOX_RX_BELL(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000308ull) + ((block_id) & 3) * 0x1000000ull)
65 #define CVMX_SRIOX_RX_BELL_SEQ(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000300ull) + ((block_id) & 3) * 0x1000000ull)
66 #define CVMX_SRIOX_RX_STATUS(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000380ull) + ((block_id) & 3) * 0x1000000ull)
67 #define CVMX_SRIOX_S2M_TYPEX(offset, block_id) (CVMX_ADD_IO_SEG(0x00011800C8000180ull) + (((offset) & 15) + ((block_id) & 3) * 0x200000ull) * 8)
68 #define CVMX_SRIOX_SEQ(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000278ull) + ((block_id) & 3) * 0x1000000ull)
69 #define CVMX_SRIOX_STATUS_REG(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000100ull) + ((block_id) & 3) * 0x1000000ull)
70 #define CVMX_SRIOX_TAG_CTRL(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000178ull) + ((block_id) & 3) * 0x1000000ull)
71 #define CVMX_SRIOX_TLP_CREDITS(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000150ull) + ((block_id) & 3) * 0x1000000ull)
72 #define CVMX_SRIOX_TX_BELL(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000280ull) + ((block_id) & 3) * 0x1000000ull)
73 #define CVMX_SRIOX_TX_BELL_INFO(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000288ull) + ((block_id) & 3) * 0x1000000ull)
74 #define CVMX_SRIOX_TX_CTRL(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000170ull) + ((block_id) & 3) * 0x1000000ull)
75 #define CVMX_SRIOX_TX_EMPHASIS(block_id) (CVMX_ADD_IO_SEG(0x00011800C80003F0ull) + ((block_id) & 3) * 0x1000000ull)
76 #define CVMX_SRIOX_TX_STATUS(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000388ull) + ((block_id) & 3) * 0x1000000ull)
77 #define CVMX_SRIOX_WR_DONE_COUNTS(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000340ull) + ((block_id) & 3) * 0x1000000ull)
79 union cvmx_sriox_acc_ctrl {
81 struct cvmx_sriox_acc_ctrl_s {
82 uint64_t reserved_7_63:57;
86 uint64_t reserved_3_3:1;
91 struct cvmx_sriox_acc_ctrl_cn63xx {
92 uint64_t reserved_3_63:61;
97 struct cvmx_sriox_acc_ctrl_cn63xx cn63xxp1;
98 struct cvmx_sriox_acc_ctrl_s cn66xx;
101 union cvmx_sriox_asmbly_id {
103 struct cvmx_sriox_asmbly_id_s {
104 uint64_t reserved_32_63:32;
106 uint64_t assy_ven:16;
108 struct cvmx_sriox_asmbly_id_s cn63xx;
109 struct cvmx_sriox_asmbly_id_s cn63xxp1;
110 struct cvmx_sriox_asmbly_id_s cn66xx;
113 union cvmx_sriox_asmbly_info {
115 struct cvmx_sriox_asmbly_info_s {
116 uint64_t reserved_32_63:32;
117 uint64_t assy_rev:16;
118 uint64_t reserved_0_15:16;
120 struct cvmx_sriox_asmbly_info_s cn63xx;
121 struct cvmx_sriox_asmbly_info_s cn63xxp1;
122 struct cvmx_sriox_asmbly_info_s cn66xx;
125 union cvmx_sriox_bell_resp_ctrl {
127 struct cvmx_sriox_bell_resp_ctrl_s {
128 uint64_t reserved_6_63:58;
134 struct cvmx_sriox_bell_resp_ctrl_s cn63xx;
135 struct cvmx_sriox_bell_resp_ctrl_s cn63xxp1;
136 struct cvmx_sriox_bell_resp_ctrl_s cn66xx;
139 union cvmx_sriox_bist_status {
141 struct cvmx_sriox_bist_status_s {
142 uint64_t reserved_45_63:19;
163 struct cvmx_sriox_bist_status_cn63xx {
164 uint64_t reserved_44_63:20;
184 struct cvmx_sriox_bist_status_cn63xxp1 {
185 uint64_t reserved_44_63:20;
195 uint64_t reserved_20_23:4;
204 struct cvmx_sriox_bist_status_s cn66xx;
207 union cvmx_sriox_imsg_ctrl {
209 struct cvmx_sriox_imsg_ctrl_s {
210 uint64_t reserved_32_63:32;
212 uint64_t reserved_30_30:1;
214 uint64_t reserved_22_23:2;
219 uint64_t reserved_15_15:1;
225 struct cvmx_sriox_imsg_ctrl_s cn63xx;
226 struct cvmx_sriox_imsg_ctrl_s cn63xxp1;
227 struct cvmx_sriox_imsg_ctrl_s cn66xx;
230 union cvmx_sriox_imsg_inst_hdrx {
232 struct cvmx_sriox_imsg_inst_hdrx_s {
234 uint64_t reserved_58_62:5;
236 uint64_t reserved_55_55:1;
238 uint64_t reserved_46_47:2;
243 uint64_t reserved_35_41:7;
248 struct cvmx_sriox_imsg_inst_hdrx_s cn63xx;
249 struct cvmx_sriox_imsg_inst_hdrx_s cn63xxp1;
250 struct cvmx_sriox_imsg_inst_hdrx_s cn66xx;
253 union cvmx_sriox_imsg_qos_grpx {
255 struct cvmx_sriox_imsg_qos_grpx_s {
256 uint64_t reserved_63_63:1;
259 uint64_t reserved_55_55:1;
262 uint64_t reserved_47_47:1;
265 uint64_t reserved_39_39:1;
268 uint64_t reserved_31_31:1;
271 uint64_t reserved_23_23:1;
274 uint64_t reserved_15_15:1;
277 uint64_t reserved_7_7:1;
281 struct cvmx_sriox_imsg_qos_grpx_s cn63xx;
282 struct cvmx_sriox_imsg_qos_grpx_s cn63xxp1;
283 struct cvmx_sriox_imsg_qos_grpx_s cn66xx;
286 union cvmx_sriox_imsg_statusx {
288 struct cvmx_sriox_imsg_statusx_s {
294 uint64_t reserved_58_58:1;
306 uint64_t reserved_26_26:1;
314 struct cvmx_sriox_imsg_statusx_s cn63xx;
315 struct cvmx_sriox_imsg_statusx_s cn63xxp1;
316 struct cvmx_sriox_imsg_statusx_s cn66xx;
319 union cvmx_sriox_imsg_vport_thr {
321 struct cvmx_sriox_imsg_vport_thr_s {
322 uint64_t reserved_54_63:10;
324 uint64_t reserved_46_47:2;
326 uint64_t reserved_38_39:2;
329 uint64_t reserved_20_30:11;
331 uint64_t reserved_14_15:2;
333 uint64_t reserved_6_7:2;
336 struct cvmx_sriox_imsg_vport_thr_s cn63xx;
337 struct cvmx_sriox_imsg_vport_thr_s cn63xxp1;
338 struct cvmx_sriox_imsg_vport_thr_s cn66xx;
341 union cvmx_sriox_imsg_vport_thr2 {
343 struct cvmx_sriox_imsg_vport_thr2_s {
344 uint64_t reserved_46_63:18;
346 uint64_t reserved_38_39:2;
348 uint64_t reserved_0_31:32;
350 struct cvmx_sriox_imsg_vport_thr2_s cn66xx;
353 union cvmx_sriox_int2_enable {
355 struct cvmx_sriox_int2_enable_s {
356 uint64_t reserved_1_63:63;
359 struct cvmx_sriox_int2_enable_s cn63xx;
360 struct cvmx_sriox_int2_enable_s cn66xx;
363 union cvmx_sriox_int2_reg {
365 struct cvmx_sriox_int2_reg_s {
366 uint64_t reserved_32_63:32;
368 uint64_t reserved_1_30:30;
371 struct cvmx_sriox_int2_reg_s cn63xx;
372 struct cvmx_sriox_int2_reg_s cn66xx;
375 union cvmx_sriox_int_enable {
377 struct cvmx_sriox_int_enable_s {
378 uint64_t reserved_27_63:37;
407 struct cvmx_sriox_int_enable_s cn63xx;
408 struct cvmx_sriox_int_enable_cn63xxp1 {
409 uint64_t reserved_22_63:42;
433 struct cvmx_sriox_int_enable_s cn66xx;
436 union cvmx_sriox_int_info0 {
438 struct cvmx_sriox_int_info0_s {
442 uint64_t reserved_42_47:6;
445 uint64_t reserved_16_28:13;
449 struct cvmx_sriox_int_info0_s cn63xx;
450 struct cvmx_sriox_int_info0_s cn63xxp1;
451 struct cvmx_sriox_int_info0_s cn66xx;
454 union cvmx_sriox_int_info1 {
456 struct cvmx_sriox_int_info1_s {
459 struct cvmx_sriox_int_info1_s cn63xx;
460 struct cvmx_sriox_int_info1_s cn63xxp1;
461 struct cvmx_sriox_int_info1_s cn66xx;
464 union cvmx_sriox_int_info2 {
466 struct cvmx_sriox_int_info2_s {
479 struct cvmx_sriox_int_info2_s cn63xx;
480 struct cvmx_sriox_int_info2_s cn63xxp1;
481 struct cvmx_sriox_int_info2_s cn66xx;
484 union cvmx_sriox_int_info3 {
486 struct cvmx_sriox_int_info3_s {
491 uint64_t reserved_0_7:8;
493 struct cvmx_sriox_int_info3_s cn63xx;
494 struct cvmx_sriox_int_info3_s cn63xxp1;
495 struct cvmx_sriox_int_info3_s cn66xx;
498 union cvmx_sriox_int_reg {
500 struct cvmx_sriox_int_reg_s {
501 uint64_t reserved_32_63:32;
503 uint64_t reserved_27_30:4;
532 struct cvmx_sriox_int_reg_s cn63xx;
533 struct cvmx_sriox_int_reg_cn63xxp1 {
534 uint64_t reserved_22_63:42;
558 struct cvmx_sriox_int_reg_s cn66xx;
561 union cvmx_sriox_ip_feature {
563 struct cvmx_sriox_ip_feature_s {
565 uint64_t reserved_15_31:17;
569 uint64_t reserved_11_11:1;
575 struct cvmx_sriox_ip_feature_cn63xx {
577 uint64_t reserved_14_31:18;
580 uint64_t reserved_11_11:1;
586 struct cvmx_sriox_ip_feature_cn63xx cn63xxp1;
587 struct cvmx_sriox_ip_feature_s cn66xx;
590 union cvmx_sriox_mac_buffers {
592 struct cvmx_sriox_mac_buffers_s {
593 uint64_t reserved_56_63:8;
595 uint64_t reserved_44_47:4;
598 uint64_t reserved_24_31:8;
600 uint64_t reserved_12_15:4;
604 struct cvmx_sriox_mac_buffers_s cn63xx;
605 struct cvmx_sriox_mac_buffers_s cn66xx;
608 union cvmx_sriox_maint_op {
610 struct cvmx_sriox_maint_op_s {
612 uint64_t reserved_27_31:5;
618 struct cvmx_sriox_maint_op_s cn63xx;
619 struct cvmx_sriox_maint_op_s cn63xxp1;
620 struct cvmx_sriox_maint_op_s cn66xx;
623 union cvmx_sriox_maint_rd_data {
625 struct cvmx_sriox_maint_rd_data_s {
626 uint64_t reserved_33_63:31;
630 struct cvmx_sriox_maint_rd_data_s cn63xx;
631 struct cvmx_sriox_maint_rd_data_s cn63xxp1;
632 struct cvmx_sriox_maint_rd_data_s cn66xx;
635 union cvmx_sriox_mce_tx_ctl {
637 struct cvmx_sriox_mce_tx_ctl_s {
638 uint64_t reserved_1_63:63;
641 struct cvmx_sriox_mce_tx_ctl_s cn63xx;
642 struct cvmx_sriox_mce_tx_ctl_s cn63xxp1;
643 struct cvmx_sriox_mce_tx_ctl_s cn66xx;
646 union cvmx_sriox_mem_op_ctrl {
648 struct cvmx_sriox_mem_op_ctrl_s {
649 uint64_t reserved_10_63:54;
652 uint64_t reserved_6_7:2;
658 struct cvmx_sriox_mem_op_ctrl_s cn63xx;
659 struct cvmx_sriox_mem_op_ctrl_s cn63xxp1;
660 struct cvmx_sriox_mem_op_ctrl_s cn66xx;
663 union cvmx_sriox_omsg_ctrlx {
665 struct cvmx_sriox_omsg_ctrlx_s {
667 uint64_t reserved_37_62:26;
669 uint64_t rtry_thr:16;
671 uint64_t reserved_11_14:4;
678 struct cvmx_sriox_omsg_ctrlx_s cn63xx;
679 struct cvmx_sriox_omsg_ctrlx_cn63xxp1 {
681 uint64_t reserved_32_62:31;
682 uint64_t rtry_thr:16;
684 uint64_t reserved_11_14:4;
691 struct cvmx_sriox_omsg_ctrlx_s cn66xx;
694 union cvmx_sriox_omsg_done_countsx {
696 struct cvmx_sriox_omsg_done_countsx_s {
697 uint64_t reserved_32_63:32;
701 struct cvmx_sriox_omsg_done_countsx_s cn63xx;
702 struct cvmx_sriox_omsg_done_countsx_s cn66xx;
705 union cvmx_sriox_omsg_fmp_mrx {
707 struct cvmx_sriox_omsg_fmp_mrx_s {
708 uint64_t reserved_15_63:49;
725 struct cvmx_sriox_omsg_fmp_mrx_s cn63xx;
726 struct cvmx_sriox_omsg_fmp_mrx_s cn63xxp1;
727 struct cvmx_sriox_omsg_fmp_mrx_s cn66xx;
730 union cvmx_sriox_omsg_nmp_mrx {
732 struct cvmx_sriox_omsg_nmp_mrx_s {
733 uint64_t reserved_15_63:49;
740 uint64_t reserved_8_8:1;
744 uint64_t reserved_4_4:1;
748 uint64_t reserved_0_0:1;
750 struct cvmx_sriox_omsg_nmp_mrx_s cn63xx;
751 struct cvmx_sriox_omsg_nmp_mrx_s cn63xxp1;
752 struct cvmx_sriox_omsg_nmp_mrx_s cn66xx;
755 union cvmx_sriox_omsg_portx {
757 struct cvmx_sriox_omsg_portx_s {
758 uint64_t reserved_32_63:32;
760 uint64_t reserved_3_30:28;
763 struct cvmx_sriox_omsg_portx_cn63xx {
764 uint64_t reserved_32_63:32;
766 uint64_t reserved_2_30:29;
769 struct cvmx_sriox_omsg_portx_cn63xx cn63xxp1;
770 struct cvmx_sriox_omsg_portx_s cn66xx;
773 union cvmx_sriox_omsg_silo_thr {
775 struct cvmx_sriox_omsg_silo_thr_s {
776 uint64_t reserved_5_63:59;
779 struct cvmx_sriox_omsg_silo_thr_s cn63xx;
780 struct cvmx_sriox_omsg_silo_thr_s cn66xx;
783 union cvmx_sriox_omsg_sp_mrx {
785 struct cvmx_sriox_omsg_sp_mrx_s {
786 uint64_t reserved_16_63:48;
804 struct cvmx_sriox_omsg_sp_mrx_s cn63xx;
805 struct cvmx_sriox_omsg_sp_mrx_s cn63xxp1;
806 struct cvmx_sriox_omsg_sp_mrx_s cn66xx;
809 union cvmx_sriox_priox_in_use {
811 struct cvmx_sriox_priox_in_use_s {
812 uint64_t reserved_32_63:32;
814 uint64_t start_cnt:16;
816 struct cvmx_sriox_priox_in_use_s cn63xx;
817 struct cvmx_sriox_priox_in_use_s cn66xx;
820 union cvmx_sriox_rx_bell {
822 struct cvmx_sriox_rx_bell_s {
823 uint64_t reserved_48_63:16;
827 uint64_t reserved_5_7:3;
830 uint64_t reserved_2_2:1;
833 struct cvmx_sriox_rx_bell_s cn63xx;
834 struct cvmx_sriox_rx_bell_s cn63xxp1;
835 struct cvmx_sriox_rx_bell_s cn66xx;
838 union cvmx_sriox_rx_bell_seq {
840 struct cvmx_sriox_rx_bell_seq_s {
841 uint64_t reserved_40_63:24;
845 struct cvmx_sriox_rx_bell_seq_s cn63xx;
846 struct cvmx_sriox_rx_bell_seq_s cn63xxp1;
847 struct cvmx_sriox_rx_bell_seq_s cn66xx;
850 union cvmx_sriox_rx_status {
852 struct cvmx_sriox_rx_status_s {
856 uint64_t reserved_28_39:12;
859 uint64_t reserved_13_15:3;
863 struct cvmx_sriox_rx_status_s cn63xx;
864 struct cvmx_sriox_rx_status_s cn63xxp1;
865 struct cvmx_sriox_rx_status_s cn66xx;
868 union cvmx_sriox_s2m_typex {
870 struct cvmx_sriox_s2m_typex_s {
871 uint64_t reserved_19_63:45;
873 uint64_t reserved_15_15:1;
877 uint64_t reserved_6_7:2;
880 uint64_t reserved_2_3:2;
883 struct cvmx_sriox_s2m_typex_s cn63xx;
884 struct cvmx_sriox_s2m_typex_s cn63xxp1;
885 struct cvmx_sriox_s2m_typex_s cn66xx;
888 union cvmx_sriox_seq {
890 struct cvmx_sriox_seq_s {
891 uint64_t reserved_32_63:32;
894 struct cvmx_sriox_seq_s cn63xx;
895 struct cvmx_sriox_seq_s cn63xxp1;
896 struct cvmx_sriox_seq_s cn66xx;
899 union cvmx_sriox_status_reg {
901 struct cvmx_sriox_status_reg_s {
902 uint64_t reserved_2_63:62;
906 struct cvmx_sriox_status_reg_s cn63xx;
907 struct cvmx_sriox_status_reg_s cn63xxp1;
908 struct cvmx_sriox_status_reg_s cn66xx;
911 union cvmx_sriox_tag_ctrl {
913 struct cvmx_sriox_tag_ctrl_s {
914 uint64_t reserved_17_63:47;
916 uint64_t reserved_13_15:3;
918 uint64_t reserved_5_7:3;
921 struct cvmx_sriox_tag_ctrl_s cn63xx;
922 struct cvmx_sriox_tag_ctrl_s cn63xxp1;
923 struct cvmx_sriox_tag_ctrl_s cn66xx;
926 union cvmx_sriox_tlp_credits {
928 struct cvmx_sriox_tlp_credits_s {
929 uint64_t reserved_28_63:36;
932 uint64_t reserved_13_15:3;
936 struct cvmx_sriox_tlp_credits_s cn63xx;
937 struct cvmx_sriox_tlp_credits_s cn63xxp1;
938 struct cvmx_sriox_tlp_credits_s cn66xx;
941 union cvmx_sriox_tx_bell {
943 struct cvmx_sriox_tx_bell_s {
944 uint64_t reserved_48_63:16;
947 uint64_t reserved_9_15:7;
949 uint64_t reserved_5_7:3;
952 uint64_t reserved_2_2:1;
955 struct cvmx_sriox_tx_bell_s cn63xx;
956 struct cvmx_sriox_tx_bell_s cn63xxp1;
957 struct cvmx_sriox_tx_bell_s cn66xx;
960 union cvmx_sriox_tx_bell_info {
962 struct cvmx_sriox_tx_bell_info_s {
963 uint64_t reserved_48_63:16;
966 uint64_t reserved_8_15:8;
972 uint64_t reserved_2_2:1;
975 struct cvmx_sriox_tx_bell_info_s cn63xx;
976 struct cvmx_sriox_tx_bell_info_s cn63xxp1;
977 struct cvmx_sriox_tx_bell_info_s cn66xx;
980 union cvmx_sriox_tx_ctrl {
982 struct cvmx_sriox_tx_ctrl_s {
983 uint64_t reserved_53_63:11;
985 uint64_t reserved_45_47:3;
987 uint64_t reserved_37_39:3;
989 uint64_t reserved_20_31:12;
991 uint64_t reserved_12_15:4;
993 uint64_t reserved_4_7:4;
996 struct cvmx_sriox_tx_ctrl_s cn63xx;
997 struct cvmx_sriox_tx_ctrl_s cn63xxp1;
998 struct cvmx_sriox_tx_ctrl_s cn66xx;
1001 union cvmx_sriox_tx_emphasis {
1003 struct cvmx_sriox_tx_emphasis_s {
1004 uint64_t reserved_4_63:60;
1007 struct cvmx_sriox_tx_emphasis_s cn63xx;
1008 struct cvmx_sriox_tx_emphasis_s cn66xx;
1011 union cvmx_sriox_tx_status {
1013 struct cvmx_sriox_tx_status_s {
1014 uint64_t reserved_32_63:32;
1020 struct cvmx_sriox_tx_status_s cn63xx;
1021 struct cvmx_sriox_tx_status_s cn63xxp1;
1022 struct cvmx_sriox_tx_status_s cn66xx;
1025 union cvmx_sriox_wr_done_counts {
1027 struct cvmx_sriox_wr_done_counts_s {
1028 uint64_t reserved_32_63:32;
1032 struct cvmx_sriox_wr_done_counts_s cn63xx;
1033 struct cvmx_sriox_wr_done_counts_s cn66xx;