2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * Copyright (C) 1994, 95, 96, 99, 2001 Ralf Baechle
7 * Copyright (C) 1994, 1995, 1996 Paul M. Antoine.
8 * Copyright (C) 1999 Silicon Graphics, Inc.
9 * Copyright (C) 2007 Maciej W. Rozycki
11 #ifndef _ASM_STACKFRAME_H
12 #define _ASM_STACKFRAME_H
14 #include <linux/threads.h>
17 #include <asm/asmmacro.h>
18 #include <asm/mipsregs.h>
19 #include <asm/asm-offsets.h>
20 #include <asm/thread_info.h>
22 #if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
36 #ifdef CONFIG_CPU_HAS_SMARTMIPS
43 #elif !defined(CONFIG_CPU_MIPSR6)
50 LONG_S $10, PT_R10(sp)
51 LONG_S $11, PT_R11(sp)
52 LONG_S $12, PT_R12(sp)
53 #if !defined(CONFIG_CPU_HAS_SMARTMIPS) && !defined(CONFIG_CPU_MIPSR6)
57 LONG_S $13, PT_R13(sp)
58 LONG_S $14, PT_R14(sp)
59 LONG_S $15, PT_R15(sp)
60 LONG_S $24, PT_R24(sp)
61 #if !defined(CONFIG_CPU_HAS_SMARTMIPS) && !defined(CONFIG_CPU_MIPSR6)
64 #ifdef CONFIG_CPU_CAVIUM_OCTEON
66 * The Octeon multiplier state is affected by general
67 * multiply instructions. It must be saved before and
68 * kernel code might corrupt it
75 LONG_S $16, PT_R16(sp)
76 LONG_S $17, PT_R17(sp)
77 LONG_S $18, PT_R18(sp)
78 LONG_S $19, PT_R19(sp)
79 LONG_S $20, PT_R20(sp)
80 LONG_S $21, PT_R21(sp)
81 LONG_S $22, PT_R22(sp)
82 LONG_S $23, PT_R23(sp)
83 LONG_S $30, PT_R30(sp)
87 .macro get_saved_sp /* SMP variation */
88 ASM_CPUID_MFC0 k0, ASM_SMP_CPUID_REG
89 #if defined(CONFIG_32BIT) || defined(KBUILD_64BIT_SYM32)
92 lui k1, %highest(kernelsp)
93 daddiu k1, %higher(kernelsp)
95 daddiu k1, %hi(kernelsp)
98 LONG_SRL k0, SMP_CPUID_PTRSHIFT
100 LONG_L k1, %lo(kernelsp)(k1)
103 .macro set_saved_sp stackp temp temp2
104 ASM_CPUID_MFC0 \temp, ASM_SMP_CPUID_REG
105 LONG_SRL \temp, SMP_CPUID_PTRSHIFT
106 LONG_S \stackp, kernelsp(\temp)
108 #else /* !CONFIG_SMP */
109 .macro get_saved_sp /* Uniprocessor variation */
110 #ifdef CONFIG_CPU_JUMP_WORKAROUNDS
112 * Clear BTB (branch target buffer), forbid RAS (return address
113 * stack) to workaround the Out-of-order Issue in Loongson2F
114 * via its diagnostic register.
128 #endif /* CONFIG_CPU_JUMP_WORKAROUNDS */
129 #if defined(CONFIG_32BIT) || defined(KBUILD_64BIT_SYM32)
130 lui k1, %hi(kernelsp)
132 lui k1, %highest(kernelsp)
133 daddiu k1, %higher(kernelsp)
135 daddiu k1, %hi(kernelsp)
138 LONG_L k1, %lo(kernelsp)(k1)
141 .macro set_saved_sp stackp temp temp2
142 LONG_S \stackp, kernelsp
151 sll k0, 3 /* extract cu0 bit */
156 /* Called from user mode, new stack. */
158 #ifndef CONFIG_CPU_DADDI_WORKAROUNDS
160 PTR_SUBU sp, k1, PT_SIZE
163 8: PTR_SUBU k1, PT_SIZE
168 LONG_S k0, PT_R29(sp)
171 * You might think that you don't need to save $0,
172 * but the FPU emulator and gdb remote debug stub
173 * need it to operate correctly
178 LONG_S v1, PT_STATUS(sp)
182 LONG_S v1, PT_CAUSE(sp)
190 LONG_S v1, PT_EPC(sp)
191 LONG_S $25, PT_R25(sp)
192 LONG_S $28, PT_R28(sp)
193 LONG_S $31, PT_R31(sp)
194 ori $28, sp, _THREAD_MASK
195 xori $28, _THREAD_MASK
196 #ifdef CONFIG_CPU_CAVIUM_OCTEON
198 pref 0, 0($28) /* Prefetch the current pointer */
218 #ifdef CONFIG_CPU_CAVIUM_OCTEON
219 /* Restore the Octeon multiplier state */
220 jal octeon_mult_restore
222 #ifdef CONFIG_CPU_HAS_SMARTMIPS
223 LONG_L $24, PT_ACX(sp)
225 LONG_L $24, PT_HI(sp)
227 LONG_L $24, PT_LO(sp)
229 #elif !defined(CONFIG_CPU_MIPSR6)
230 LONG_L $24, PT_LO(sp)
232 LONG_L $24, PT_HI(sp)
239 LONG_L $10, PT_R10(sp)
240 LONG_L $11, PT_R11(sp)
241 LONG_L $12, PT_R12(sp)
242 LONG_L $13, PT_R13(sp)
243 LONG_L $14, PT_R14(sp)
244 LONG_L $15, PT_R15(sp)
245 LONG_L $24, PT_R24(sp)
248 .macro RESTORE_STATIC
249 LONG_L $16, PT_R16(sp)
250 LONG_L $17, PT_R17(sp)
251 LONG_L $18, PT_R18(sp)
252 LONG_L $19, PT_R19(sp)
253 LONG_L $20, PT_R20(sp)
254 LONG_L $21, PT_R21(sp)
255 LONG_L $22, PT_R22(sp)
256 LONG_L $23, PT_R23(sp)
257 LONG_L $30, PT_R30(sp)
260 #if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
272 LONG_L v0, PT_STATUS(sp)
277 LONG_L $31, PT_R31(sp)
278 LONG_L $28, PT_R28(sp)
279 LONG_L $25, PT_R25(sp)
289 .macro RESTORE_SP_AND_RET
292 LONG_L k0, PT_EPC(sp)
293 LONG_L sp, PT_R29(sp)
310 LONG_L v0, PT_STATUS(sp)
315 LONG_L v1, PT_EPC(sp)
317 LONG_L $31, PT_R31(sp)
318 LONG_L $28, PT_R28(sp)
319 LONG_L $25, PT_R25(sp)
333 .macro RESTORE_SP_AND_RET
334 LONG_L sp, PT_R29(sp)
343 LONG_L sp, PT_R29(sp)
354 .macro RESTORE_ALL_AND_RET
363 * Move to kernel mode and disable interrupts.
364 * Set cp0 enable bit as sign that we're running on the kernel stack
368 li t1, ST0_CU0 | STATMASK
376 * Move to kernel mode and enable interrupts.
377 * Set cp0 enable bit as sign that we're running on the kernel stack
381 li t1, ST0_CU0 | STATMASK
383 xori t0, STATMASK & ~1
389 * Just move to kernel mode and leave interrupts as they are. Note
390 * for the R3000 this means copying the previous enable from IEp.
391 * Set cp0 enable bit as sign that we're running on the kernel stack
395 li t1, ST0_CU0 | (STATMASK & ~1)
396 #if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
402 xori t0, STATMASK & ~1
407 #endif /* _ASM_STACKFRAME_H */