2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * Copyright (C) 1994, 95, 96, 97, 98, 99, 2003, 06 by Ralf Baechle
7 * Copyright (C) 1996 by Paul M. Antoine
8 * Copyright (C) 1999 Silicon Graphics
9 * Kevin D. Kissell, kevink@mips.org and Carsten Langgaard, carstenl@mips.com
10 * Copyright (C) 2000 MIPS Technologies, Inc.
12 #ifndef _ASM_SWITCH_TO_H
13 #define _ASM_SWITCH_TO_H
15 #include <asm/cpu-features.h>
16 #include <asm/watch.h>
23 * resume - resume execution of a task
24 * @prev: The task previously executed.
25 * @next: The task to begin executing.
26 * @next_ti: task_thread_info(next).
27 * @usedfpu: Non-zero if prev's FP context should be saved.
29 * This function is used whilst scheduling to save the context of prev & load
30 * the context of next. Returns prev.
32 extern asmlinkage struct task_struct *resume(struct task_struct *prev,
33 struct task_struct *next, struct thread_info *next_ti,
36 extern unsigned int ll_bit;
37 extern struct task_struct *ll_task;
39 #ifdef CONFIG_MIPS_MT_FPAFF
42 * Handle the scheduler resume end of FPU affinity management. We do this
43 * inline to try to keep the overhead down. If we have been forced to run on
44 * a "CPU" with an FPU because of a previous high level of FP computation,
45 * but did not actually use the FPU during the most recent time-slice (CU1
46 * isn't set), we undo the restriction on cpus_allowed.
48 * We're not calling set_cpus_allowed() here, because we have no need to
49 * force prompt migration - we're already switching the current CPU to a
53 #define __mips_mt_fpaff_switch_to(prev) \
55 struct thread_info *__prev_ti = task_thread_info(prev); \
58 test_ti_thread_flag(__prev_ti, TIF_FPUBOUND) && \
59 (!(KSTK_STATUS(prev) & ST0_CU1))) { \
60 clear_ti_thread_flag(__prev_ti, TIF_FPUBOUND); \
61 prev->cpus_allowed = prev->thread.user_cpus_allowed; \
63 next->thread.emulated_fp = 0; \
67 #define __mips_mt_fpaff_switch_to(prev) do { (void) (prev); } while (0)
70 #define __clear_software_ll_bit() \
72 if (!__builtin_constant_p(cpu_has_llsc) || !cpu_has_llsc) \
76 #define switch_to(prev, next, last) \
78 u32 __usedfpu, __c0_stat; \
79 __mips_mt_fpaff_switch_to(prev); \
82 if (cop2_present && (KSTK_STATUS(prev) & ST0_CU2)) { \
83 if (cop2_lazy_restore) \
84 KSTK_STATUS(prev) &= ~ST0_CU2; \
85 __c0_stat = read_c0_status(); \
86 write_c0_status(__c0_stat | ST0_CU2); \
87 cop2_save(&prev->thread.cp2); \
88 write_c0_status(__c0_stat & ~ST0_CU2); \
90 __clear_software_ll_bit(); \
91 __usedfpu = test_and_clear_tsk_thread_flag(prev, TIF_USEDFPU); \
92 (last) = resume(prev, next, task_thread_info(next), __usedfpu); \
95 #define finish_arch_switch(prev) \
98 if (cop2_present && !cop2_lazy_restore && \
99 (KSTK_STATUS(current) & ST0_CU2)) { \
100 __c0_stat = read_c0_status(); \
101 write_c0_status(__c0_stat | ST0_CU2); \
102 cop2_restore(¤t->thread.cp2); \
103 write_c0_status(__c0_stat & ~ST0_CU2); \
106 __restore_dsp(current); \
107 if (cpu_has_userlocal) \
108 write_c0_userlocal(current_thread_info()->tp_value); \
112 #endif /* _ASM_SWITCH_TO_H */