2 * Mips Jazz DMA controller support
3 * Copyright (C) 1995, 1996 by Andreas Busse
5 * NOTE: Some of the argument checking could be removed when
6 * things have settled down. Also, instead of returning 0xffffffff
7 * on failure of vdma_alloc() one could leave page #0 unused
8 * and return the more usual NULL pointer as logical address.
10 #include <linux/kernel.h>
11 #include <linux/init.h>
12 #include <linux/module.h>
13 #include <linux/errno.h>
15 #include <linux/bootmem.h>
16 #include <linux/spinlock.h>
17 #include <asm/mipsregs.h>
20 #include <asm/uaccess.h>
22 #include <asm/jazzdma.h>
23 #include <asm/pgtable.h>
26 * Set this to one to enable additional vdma debug code.
28 #define CONF_DEBUG_VDMA 0
30 static VDMA_PGTBL_ENTRY *pgtbl;
32 static DEFINE_SPINLOCK(vdma_lock);
37 #define vdma_debug ((CONF_DEBUG_VDMA) ? debuglvl : 0)
39 static int debuglvl = 3;
42 * Initialize the pagetable with a one-to-one mapping of
43 * the first 16 Mbytes of main memory and declare all
44 * entries to be unused. Using this method will at least
45 * allow some early device driver operations to work.
47 static inline void vdma_pgtbl_init(void)
49 unsigned long paddr = 0;
52 for (i = 0; i < VDMA_PGTBL_ENTRIES; i++) {
53 pgtbl[i].frame = paddr;
54 pgtbl[i].owner = VDMA_PAGE_EMPTY;
55 paddr += VDMA_PAGESIZE;
60 * Initialize the Jazz R4030 dma controller
62 static int __init vdma_init(void)
65 * Allocate 32k of memory for DMA page tables. This needs to be page
66 * aligned and should be uncached to avoid cache flushing after every
69 pgtbl = (VDMA_PGTBL_ENTRY *)__get_free_pages(GFP_KERNEL | GFP_DMA,
70 get_order(VDMA_PGTBL_SIZE));
72 dma_cache_wback_inv((unsigned long)pgtbl, VDMA_PGTBL_SIZE);
73 pgtbl = (VDMA_PGTBL_ENTRY *)KSEG1ADDR(pgtbl);
76 * Clear the R4030 translation table
80 r4030_write_reg32(JAZZ_R4030_TRSTBL_BASE, CPHYSADDR(pgtbl));
81 r4030_write_reg32(JAZZ_R4030_TRSTBL_LIM, VDMA_PGTBL_SIZE);
82 r4030_write_reg32(JAZZ_R4030_TRSTBL_INV, 0);
84 printk(KERN_INFO "VDMA: R4030 DMA pagetables initialized.\n");
89 * Allocate DMA pagetables using a simple first-fit algorithm
91 unsigned long vdma_alloc(unsigned long paddr, unsigned long size)
93 int first, last, pages, frame, i;
94 unsigned long laddr, flags;
98 if (paddr > 0x1fffffff) {
100 printk("vdma_alloc: Invalid physical address: %08lx\n",
102 return VDMA_ERROR; /* invalid physical address */
104 if (size > 0x400000 || size == 0) {
106 printk("vdma_alloc: Invalid size: %08lx\n", size);
107 return VDMA_ERROR; /* invalid physical address */
110 spin_lock_irqsave(&vdma_lock, flags);
114 pages = VDMA_PAGE(paddr + size) - VDMA_PAGE(paddr) + 1;
117 while (pgtbl[first].owner != VDMA_PAGE_EMPTY &&
118 first < VDMA_PGTBL_ENTRIES) first++;
119 if (first + pages > VDMA_PGTBL_ENTRIES) { /* nothing free */
120 spin_unlock_irqrestore(&vdma_lock, flags);
125 while (pgtbl[last].owner == VDMA_PAGE_EMPTY
126 && last - first < pages)
129 if (last - first == pages)
135 * Mark pages as allocated
137 laddr = (first << 12) + (paddr & (VDMA_PAGESIZE - 1));
138 frame = paddr & ~(VDMA_PAGESIZE - 1);
140 for (i = first; i < last; i++) {
141 pgtbl[i].frame = frame;
142 pgtbl[i].owner = laddr;
143 frame += VDMA_PAGESIZE;
147 * Update translation table and return logical start address
149 r4030_write_reg32(JAZZ_R4030_TRSTBL_INV, 0);
152 printk("vdma_alloc: Allocated %d pages starting from %08lx\n",
155 if (vdma_debug > 2) {
157 for (i = first; i < last; i++)
158 printk("%08x ", i << 12);
160 for (i = first; i < last; i++)
161 printk("%08x ", pgtbl[i].frame);
163 for (i = first; i < last; i++)
164 printk("%08x ", pgtbl[i].owner);
168 spin_unlock_irqrestore(&vdma_lock, flags);
173 EXPORT_SYMBOL(vdma_alloc);
176 * Free previously allocated dma translation pages
177 * Note that this does NOT change the translation table,
178 * it just marks the free'd pages as unused!
180 int vdma_free(unsigned long laddr)
186 if (pgtbl[i].owner != laddr) {
188 ("vdma_free: trying to free other's dma pages, laddr=%8lx\n",
193 while (i < VDMA_PGTBL_ENTRIES && pgtbl[i].owner == laddr) {
194 pgtbl[i].owner = VDMA_PAGE_EMPTY;
199 printk("vdma_free: freed %ld pages starting from %08lx\n",
200 i - (laddr >> 12), laddr);
205 EXPORT_SYMBOL(vdma_free);
208 * Map certain page(s) to another physical address.
209 * Caller must have allocated the page(s) before.
211 int vdma_remap(unsigned long laddr, unsigned long paddr, unsigned long size)
213 int first, pages, npages;
215 if (laddr > 0xffffff) {
218 ("vdma_map: Invalid logical address: %08lx\n",
220 return -EINVAL; /* invalid logical address */
222 if (paddr > 0x1fffffff) {
225 ("vdma_map: Invalid physical address: %08lx\n",
227 return -EINVAL; /* invalid physical address */
231 (((paddr & (VDMA_PAGESIZE - 1)) + size) >> 12) + 1;
234 printk("vdma_remap: first=%x, pages=%x\n", first, pages);
235 if (first + pages > VDMA_PGTBL_ENTRIES) {
237 printk("vdma_alloc: Invalid size: %08lx\n", size);
241 paddr &= ~(VDMA_PAGESIZE - 1);
242 while (pages > 0 && first < VDMA_PGTBL_ENTRIES) {
243 if (pgtbl[first].owner != laddr) {
245 printk("Trying to remap other's pages.\n");
246 return -EPERM; /* not owner */
248 pgtbl[first].frame = paddr;
249 paddr += VDMA_PAGESIZE;
255 * Update translation table
257 r4030_write_reg32(JAZZ_R4030_TRSTBL_INV, 0);
259 if (vdma_debug > 2) {
261 pages = (((paddr & (VDMA_PAGESIZE - 1)) + size) >> 12) + 1;
264 for (i = first; i < first + pages; i++)
265 printk("%08x ", i << 12);
267 for (i = first; i < first + pages; i++)
268 printk("%08x ", pgtbl[i].frame);
270 for (i = first; i < first + pages; i++)
271 printk("%08x ", pgtbl[i].owner);
279 * Translate a physical address to a logical address.
280 * This will return the logical address of the first
283 unsigned long vdma_phys2log(unsigned long paddr)
288 frame = paddr & ~(VDMA_PAGESIZE - 1);
290 for (i = 0; i < VDMA_PGTBL_ENTRIES; i++) {
291 if (pgtbl[i].frame == frame)
295 if (i == VDMA_PGTBL_ENTRIES)
298 return (i << 12) + (paddr & (VDMA_PAGESIZE - 1));
301 EXPORT_SYMBOL(vdma_phys2log);
304 * Translate a logical DMA address to a physical address
306 unsigned long vdma_log2phys(unsigned long laddr)
308 return pgtbl[laddr >> 12].frame + (laddr & (VDMA_PAGESIZE - 1));
311 EXPORT_SYMBOL(vdma_log2phys);
314 * Print DMA statistics
316 void vdma_stats(void)
320 printk("vdma_stats: CONFIG: %08x\n",
321 r4030_read_reg32(JAZZ_R4030_CONFIG));
322 printk("R4030 translation table base: %08x\n",
323 r4030_read_reg32(JAZZ_R4030_TRSTBL_BASE));
324 printk("R4030 translation table limit: %08x\n",
325 r4030_read_reg32(JAZZ_R4030_TRSTBL_LIM));
326 printk("vdma_stats: INV_ADDR: %08x\n",
327 r4030_read_reg32(JAZZ_R4030_INV_ADDR));
328 printk("vdma_stats: R_FAIL_ADDR: %08x\n",
329 r4030_read_reg32(JAZZ_R4030_R_FAIL_ADDR));
330 printk("vdma_stats: M_FAIL_ADDR: %08x\n",
331 r4030_read_reg32(JAZZ_R4030_M_FAIL_ADDR));
332 printk("vdma_stats: IRQ_SOURCE: %08x\n",
333 r4030_read_reg32(JAZZ_R4030_IRQ_SOURCE));
334 printk("vdma_stats: I386_ERROR: %08x\n",
335 r4030_read_reg32(JAZZ_R4030_I386_ERROR));
336 printk("vdma_chnl_modes: ");
337 for (i = 0; i < 8; i++)
339 (unsigned) r4030_read_reg32(JAZZ_R4030_CHNL_MODE +
342 printk("vdma_chnl_enables: ");
343 for (i = 0; i < 8; i++)
345 (unsigned) r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
351 * DMA transfer functions
355 * Enable a DMA channel. Also clear any error conditions.
357 void vdma_enable(int channel)
362 printk("vdma_enable: channel %d\n", channel);
365 * Check error conditions first
367 status = r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5));
369 printk("VDMA: Channel %d: Address error!\n", channel);
371 printk("VDMA: Channel %d: Memory error!\n", channel);
374 * Clear all interrupt flags
376 r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5),
377 r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
378 (channel << 5)) | R4030_TC_INTR
379 | R4030_MEM_INTR | R4030_ADDR_INTR);
382 * Enable the desired channel
384 r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5),
385 r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
390 EXPORT_SYMBOL(vdma_enable);
393 * Disable a DMA channel
395 void vdma_disable(int channel)
399 r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
402 printk("vdma_disable: channel %d\n", channel);
403 printk("VDMA: channel %d status: %04x (%s) mode: "
404 "%02x addr: %06x count: %06x\n",
406 ((status & 0x600) ? "ERROR" : "OK"),
407 (unsigned) r4030_read_reg32(JAZZ_R4030_CHNL_MODE +
409 (unsigned) r4030_read_reg32(JAZZ_R4030_CHNL_ADDR +
411 (unsigned) r4030_read_reg32(JAZZ_R4030_CHNL_COUNT +
415 r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5),
416 r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
421 * After disabling a DMA channel a remote bus register should be
422 * read to ensure that the current DMA acknowledge cycle is completed.
424 *((volatile unsigned int *) JAZZ_DUMMY_DEVICE);
427 EXPORT_SYMBOL(vdma_disable);
430 * Set DMA mode. This function accepts the mode values used
431 * to set a PC-style DMA controller. For the SCSI and FDC
432 * channels, we also set the default modes each time we're
434 * NOTE: The FAST and BURST dma modes are supported by the
435 * R4030 Rev. 2 and PICA chipsets only. I leave them disabled
438 void vdma_set_mode(int channel, int mode)
441 printk("vdma_set_mode: channel %d, mode 0x%x\n", channel,
445 case JAZZ_SCSI_DMA: /* scsi */
446 r4030_write_reg32(JAZZ_R4030_CHNL_MODE + (channel << 5),
447 /* R4030_MODE_FAST | */
448 /* R4030_MODE_BURST | */
450 R4030_MODE_WIDTH_16 |
451 R4030_MODE_ATIME_80);
454 case JAZZ_FLOPPY_DMA: /* floppy */
455 r4030_write_reg32(JAZZ_R4030_CHNL_MODE + (channel << 5),
456 /* R4030_MODE_FAST | */
457 /* R4030_MODE_BURST | */
460 R4030_MODE_ATIME_120);
463 case JAZZ_AUDIOL_DMA:
464 case JAZZ_AUDIOR_DMA:
465 printk("VDMA: Audio DMA not supported yet.\n");
470 ("VDMA: vdma_set_mode() called with unsupported channel %d!\n",
476 r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5),
477 r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
483 r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5),
484 r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
491 ("VDMA: vdma_set_mode() called with unknown dma mode 0x%x\n",
496 EXPORT_SYMBOL(vdma_set_mode);
499 * Set Transfer Address
501 void vdma_set_addr(int channel, long addr)
504 printk("vdma_set_addr: channel %d, addr %lx\n", channel,
507 r4030_write_reg32(JAZZ_R4030_CHNL_ADDR + (channel << 5), addr);
510 EXPORT_SYMBOL(vdma_set_addr);
515 void vdma_set_count(int channel, int count)
518 printk("vdma_set_count: channel %d, count %08x\n", channel,
521 r4030_write_reg32(JAZZ_R4030_CHNL_COUNT + (channel << 5), count);
524 EXPORT_SYMBOL(vdma_set_count);
529 int vdma_get_residue(int channel)
533 residual = r4030_read_reg32(JAZZ_R4030_CHNL_COUNT + (channel << 5));
536 printk("vdma_get_residual: channel %d: residual=%d\n",
543 * Get DMA channel enable register
545 int vdma_get_enable(int channel)
549 enable = r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5));
552 printk("vdma_get_enable: channel %d: enable=%d\n", channel,
558 arch_initcall(vdma_init);