arch/mips/kernel/ptrace.c

   1 /*
   2  * This file is subject to the terms and conditions of the GNU General Public
   3  * License.  See the file "COPYING" in the main directory of this archive
   4  * for more details.
   5  *
   6  * Copyright (C) 1992 Ross Biro
   7  * Copyright (C) Linus Torvalds
   8  * Copyright (C) 1994, 95, 96, 97, 98, 2000 Ralf Baechle
   9  * Copyright (C) 1996 David S. Miller
  10  * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
  11  * Copyright (C) 1999 MIPS Technologies, Inc.
  12  * Copyright (C) 2000 Ulf Carlsson
  13  *
  14  * At this time Linux/MIPS64 only supports syscall tracing, even for 32-bit
  15  * binaries.
  16  */
  17 #include <linux/compiler.h>
  18 #include <linux/context_tracking.h>
  19 #include <linux/elf.h>
  20 #include <linux/kernel.h>
  21 #include <linux/sched.h>
  22 #include <linux/sched/task_stack.h>
  23 #include <linux/mm.h>
  24 #include <linux/errno.h>
  25 #include <linux/ptrace.h>
  26 #include <linux/regset.h>
  27 #include <linux/smp.h>
  28 #include <linux/security.h>
  29 #include <linux/stddef.h>
  30 #include <linux/tracehook.h>
  31 #include <linux/audit.h>
  32 #include <linux/seccomp.h>
  33 #include <linux/ftrace.h>
  34
  35 #include <asm/byteorder.h>
  36 #include <asm/cpu.h>
  37 #include <asm/cpu-info.h>
  38 #include <asm/dsp.h>
  39 #include <asm/fpu.h>
  40 #include <asm/mipsregs.h>
  41 #include <asm/mipsmtregs.h>
  42 #include <asm/pgtable.h>
  43 #include <asm/page.h>
  44 #include <asm/syscall.h>
  45 #include <linux/uaccess.h>
  46 #include <asm/bootinfo.h>
  47 #include <asm/reg.h>
  48
  49 #define CREATE_TRACE_POINTS
  50 #include <trace/events/syscalls.h>
  51
  52 static void init_fp_ctx(struct task_struct *target)
  53 {
  54         /* If FP has been used then the target already has context */
  55         if (tsk_used_math(target))
  56                 return;
  57
  58         /* Begin with data registers set to all 1s... */
  59         memset(&target->thread.fpu.fpr, ~0, sizeof(target->thread.fpu.fpr));
  60
  61         /* FCSR has been preset by `mips_set_personality_nan'.  */
  62
  63         /*
  64          * Record that the target has "used" math, such that the context
  65          * just initialised, and any modifications made by the caller,
  66          * aren't discarded.
  67          */
  68         set_stopped_child_used_math(target);
  69 }
  70
  71 /*
  72  * Called by kernel/ptrace.c when detaching..
  73  *
  74  * Make sure single step bits etc are not set.
  75  */
  76 void ptrace_disable(struct task_struct *child)
  77 {
  78         /* Don't load the watchpoint registers for the ex-child. */
  79         clear_tsk_thread_flag(child, TIF_LOAD_WATCH);
  80 }
  81
  82 /*
  83  * Poke at FCSR according to its mask.  Set the Cause bits even
  84  * if a corresponding Enable bit is set.  This will be noticed at
  85  * the time the thread is switched to and SIGFPE thrown accordingly.
  86  */
  87 static void ptrace_setfcr31(struct task_struct *child, u32 value)
  88 {
  89         u32 fcr31;
  90         u32 mask;
  91
  92         fcr31 = child->thread.fpu.fcr31;
  93         mask = boot_cpu_data.fpu_msk31;
  94         child->thread.fpu.fcr31 = (value & ~mask) | (fcr31 & mask);
  95 }
  96
  97 /*
  98  * Read a general register set.  We always use the 64-bit format, even
  99  * for 32-bit kernels and for 32-bit processes on a 64-bit kernel.
 100  * Registers are sign extended to fill the available space.
 101  */
 102 int ptrace_getregs(struct task_struct *child, struct user_pt_regs __user *data)
 103 {
 104         struct pt_regs *regs;
 105         int i;
 106
 107         if (!access_ok(VERIFY_WRITE, data, 38 * 8))
 108                 return -EIO;
 109
 110         regs = task_pt_regs(child);
 111
 112         for (i = 0; i < 32; i++)
 113                 __put_user((long)regs->regs[i], (__s64 __user *)&data->regs[i]);
 114         __put_user((long)regs->lo, (__s64 __user *)&data->lo);
 115         __put_user((long)regs->hi, (__s64 __user *)&data->hi);
 116         __put_user((long)regs->cp0_epc, (__s64 __user *)&data->cp0_epc);
 117         __put_user((long)regs->cp0_badvaddr, (__s64 __user *)&data->cp0_badvaddr);
 118         __put_user((long)regs->cp0_status, (__s64 __user *)&data->cp0_status);
 119         __put_user((long)regs->cp0_cause, (__s64 __user *)&data->cp0_cause);
 120
 121         return 0;
 122 }
 123
 124 /*
 125  * Write a general register set.  As for PTRACE_GETREGS, we always use
 126  * the 64-bit format.  On a 32-bit kernel only the lower order half
 127  * (according to endianness) will be used.
 128  */
 129 int ptrace_setregs(struct task_struct *child, struct user_pt_regs __user *data)
 130 {
 131         struct pt_regs *regs;
 132         int i;
 133
 134         if (!access_ok(VERIFY_READ, data, 38 * 8))
 135                 return -EIO;
 136
 137         regs = task_pt_regs(child);
 138
 139         for (i = 0; i < 32; i++)
 140                 __get_user(regs->regs[i], (__s64 __user *)&data->regs[i]);
 141         __get_user(regs->lo, (__s64 __user *)&data->lo);
 142         __get_user(regs->hi, (__s64 __user *)&data->hi);
 143         __get_user(regs->cp0_epc, (__s64 __user *)&data->cp0_epc);
 144
 145         /* badvaddr, status, and cause may not be written.  */
 146
 147         return 0;
 148 }
 149
 150 int ptrace_getfpregs(struct task_struct *child, __u32 __user *data)
 151 {
 152         int i;
 153
 154         if (!access_ok(VERIFY_WRITE, data, 33 * 8))
 155                 return -EIO;
 156
 157         if (tsk_used_math(child)) {
 158                 union fpureg *fregs = get_fpu_regs(child);
 159                 for (i = 0; i < 32; i++)
 160                         __put_user(get_fpr64(&fregs[i], 0),
 161                                    i + (__u64 __user *)data);
 162         } else {
 163                 for (i = 0; i < 32; i++)
 164                         __put_user((__u64) -1, i + (__u64 __user *) data);
 165         }
 166
 167         __put_user(child->thread.fpu.fcr31, data + 64);
 168         __put_user(boot_cpu_data.fpu_id, data + 65);
 169
 170         return 0;
 171 }
 172
 173 int ptrace_setfpregs(struct task_struct *child, __u32 __user *data)
 174 {
 175         union fpureg *fregs;
 176         u64 fpr_val;
 177         u32 value;
 178         int i;
 179
 180         if (!access_ok(VERIFY_READ, data, 33 * 8))
 181                 return -EIO;
 182
 183         init_fp_ctx(child);
 184         fregs = get_fpu_regs(child);
 185
 186         for (i = 0; i < 32; i++) {
 187                 __get_user(fpr_val, i + (__u64 __user *)data);
 188                 set_fpr64(&fregs[i], 0, fpr_val);
 189         }
 190
 191         __get_user(value, data + 64);
 192         ptrace_setfcr31(child, value);
 193
 194         /* FIR may not be written.  */
 195
 196         return 0;
 197 }
 198
 199 int ptrace_get_watch_regs(struct task_struct *child,
 200                           struct pt_watch_regs __user *addr)
 201 {
 202         enum pt_watch_style style;
 203         int i;
 204
 205         if (!cpu_has_watch || boot_cpu_data.watch_reg_use_cnt == 0)
 206                 return -EIO;
 207         if (!access_ok(VERIFY_WRITE, addr, sizeof(struct pt_watch_regs)))
 208                 return -EIO;
 209
 210 #ifdef CONFIG_32BIT
 211         style = pt_watch_style_mips32;
 212 #define WATCH_STYLE mips32
 213 #else
 214         style = pt_watch_style_mips64;
 215 #define WATCH_STYLE mips64
 216 #endif
 217
 218         __put_user(style, &addr->style);
 219         __put_user(boot_cpu_data.watch_reg_use_cnt,
 220                    &addr->WATCH_STYLE.num_valid);
 221         for (i = 0; i < boot_cpu_data.watch_reg_use_cnt; i++) {
 222                 __put_user(child->thread.watch.mips3264.watchlo[i],
 223                            &addr->WATCH_STYLE.watchlo[i]);
 224                 __put_user(child->thread.watch.mips3264.watchhi[i] &
 225                                 (MIPS_WATCHHI_MASK | MIPS_WATCHHI_IRW),
 226                            &addr->WATCH_STYLE.watchhi[i]);
 227                 __put_user(boot_cpu_data.watch_reg_masks[i],
 228                            &addr->WATCH_STYLE.watch_masks[i]);
 229         }
 230         for (; i < 8; i++) {
 231                 __put_user(0, &addr->WATCH_STYLE.watchlo[i]);
 232                 __put_user(0, &addr->WATCH_STYLE.watchhi[i]);
 233                 __put_user(0, &addr->WATCH_STYLE.watch_masks[i]);
 234         }
 235
 236         return 0;
 237 }
 238
 239 int ptrace_set_watch_regs(struct task_struct *child,
 240                           struct pt_watch_regs __user *addr)
 241 {
 242         int i;
 243         int watch_active = 0;
 244         unsigned long lt[NUM_WATCH_REGS];
 245         u16 ht[NUM_WATCH_REGS];
 246
 247         if (!cpu_has_watch || boot_cpu_data.watch_reg_use_cnt == 0)
 248                 return -EIO;
 249         if (!access_ok(VERIFY_READ, addr, sizeof(struct pt_watch_regs)))
 250                 return -EIO;
 251         /* Check the values. */
 252         for (i = 0; i < boot_cpu_data.watch_reg_use_cnt; i++) {
 253                 __get_user(lt[i], &addr->WATCH_STYLE.watchlo[i]);
 254 #ifdef CONFIG_32BIT
 255                 if (lt[i] & __UA_LIMIT)
 256                         return -EINVAL;
 257 #else
 258                 if (test_tsk_thread_flag(child, TIF_32BIT_ADDR)) {
 259                         if (lt[i] & 0xffffffff80000000UL)
 260                                 return -EINVAL;
 261                 } else {
 262                         if (lt[i] & __UA_LIMIT)
 263                                 return -EINVAL;
 264                 }
 265 #endif
 266                 __get_user(ht[i], &addr->WATCH_STYLE.watchhi[i]);
 267                 if (ht[i] & ~MIPS_WATCHHI_MASK)
 268                         return -EINVAL;
 269         }
 270         /* Install them. */
 271         for (i = 0; i < boot_cpu_data.watch_reg_use_cnt; i++) {
 272                 if (lt[i] & MIPS_WATCHLO_IRW)
 273                         watch_active = 1;
 274                 child->thread.watch.mips3264.watchlo[i] = lt[i];
 275                 /* Set the G bit. */
 276                 child->thread.watch.mips3264.watchhi[i] = ht[i];
 277         }
 278
 279         if (watch_active)
 280                 set_tsk_thread_flag(child, TIF_LOAD_WATCH);
 281         else
 282                 clear_tsk_thread_flag(child, TIF_LOAD_WATCH);
 283
 284         return 0;
 285 }
 286
 287 /* regset get/set implementations */
 288
 289 #if defined(CONFIG_32BIT) || defined(CONFIG_MIPS32_O32)
 290
 291 static int gpr32_get(struct task_struct *target,
 292                      const struct user_regset *regset,
 293                      unsigned int pos, unsigned int count,
 294                      void *kbuf, void __user *ubuf)
 295 {
 296         struct pt_regs *regs = task_pt_regs(target);
 297         u32 uregs[ELF_NGREG] = {};
 298
 299         mips_dump_regs32(uregs, regs);
 300         return user_regset_copyout(&pos, &count, &kbuf, &ubuf, uregs, 0,
 301                                    sizeof(uregs));
 302 }
 303
 304 static int gpr32_set(struct task_struct *target,
 305                      const struct user_regset *regset,
 306                      unsigned int pos, unsigned int count,
 307                      const void *kbuf, const void __user *ubuf)
 308 {
 309         struct pt_regs *regs = task_pt_regs(target);
 310         u32 uregs[ELF_NGREG];
 311         unsigned start, num_regs, i;
 312         int err;
 313
 314         start = pos / sizeof(u32);
 315         num_regs = count / sizeof(u32);
 316
 317         if (start + num_regs > ELF_NGREG)
 318                 return -EIO;
 319
 320         err = user_regset_copyin(&pos, &count, &kbuf, &ubuf, uregs, 0,
 321                                  sizeof(uregs));
 322         if (err)
 323                 return err;
 324
 325         for (i = start; i < num_regs; i++) {
 326                 /*
 327                  * Cast all values to signed here so that if this is a 64-bit
 328                  * kernel, the supplied 32-bit values will be sign extended.
 329                  */
 330                 switch (i) {
 331                 case MIPS32_EF_R1 ... MIPS32_EF_R25:
 332                         /* k0/k1 are ignored. */
 333                 case MIPS32_EF_R28 ... MIPS32_EF_R31:
 334                         regs->regs[i - MIPS32_EF_R0] = (s32)uregs[i];
 335                         break;
 336                 case MIPS32_EF_LO:
 337                         regs->lo = (s32)uregs[i];
 338                         break;
 339                 case MIPS32_EF_HI:
 340                         regs->hi = (s32)uregs[i];
 341                         break;
 342                 case MIPS32_EF_CP0_EPC:
 343                         regs->cp0_epc = (s32)uregs[i];
 344                         break;
 345                 }
 346         }
 347
 348         return 0;
 349 }
 350
 351 #endif /* CONFIG_32BIT || CONFIG_MIPS32_O32 */
 352
 353 #ifdef CONFIG_64BIT
 354
 355 static int gpr64_get(struct task_struct *target,
 356                      const struct user_regset *regset,
 357                      unsigned int pos, unsigned int count,
 358                      void *kbuf, void __user *ubuf)
 359 {
 360         struct pt_regs *regs = task_pt_regs(target);
 361         u64 uregs[ELF_NGREG] = {};
 362
 363         mips_dump_regs64(uregs, regs);
 364         return user_regset_copyout(&pos, &count, &kbuf, &ubuf, uregs, 0,
 365                                    sizeof(uregs));
 366 }
 367
 368 static int gpr64_set(struct task_struct *target,
 369                      const struct user_regset *regset,
 370                      unsigned int pos, unsigned int count,
 371                      const void *kbuf, const void __user *ubuf)
 372 {
 373         struct pt_regs *regs = task_pt_regs(target);
 374         u64 uregs[ELF_NGREG];
 375         unsigned start, num_regs, i;
 376         int err;
 377
 378         start = pos / sizeof(u64);
 379         num_regs = count / sizeof(u64);
 380
 381         if (start + num_regs > ELF_NGREG)
 382                 return -EIO;
 383
 384         err = user_regset_copyin(&pos, &count, &kbuf, &ubuf, uregs, 0,
 385                                  sizeof(uregs));
 386         if (err)
 387                 return err;
 388
 389         for (i = start; i < num_regs; i++) {
 390                 switch (i) {
 391                 case MIPS64_EF_R1 ... MIPS64_EF_R25:
 392                         /* k0/k1 are ignored. */
 393                 case MIPS64_EF_R28 ... MIPS64_EF_R31:
 394                         regs->regs[i - MIPS64_EF_R0] = uregs[i];
 395                         break;
 396                 case MIPS64_EF_LO:
 397                         regs->lo = uregs[i];
 398                         break;
 399                 case MIPS64_EF_HI:
 400                         regs->hi = uregs[i];
 401                         break;
 402                 case MIPS64_EF_CP0_EPC:
 403                         regs->cp0_epc = uregs[i];
 404                         break;
 405                 }
 406         }
 407
 408         return 0;
 409 }
 410
 411 #endif /* CONFIG_64BIT */
 412
 413 static int fpr_get(struct task_struct *target,
 414                    const struct user_regset *regset,
 415                    unsigned int pos, unsigned int count,
 416                    void *kbuf, void __user *ubuf)
 417 {
 418         unsigned i;
 419         int err;
 420         u64 fpr_val;
 421
 422         /* XXX fcr31  */
 423
 424         if (sizeof(target->thread.fpu.fpr[i]) == sizeof(elf_fpreg_t))
 425                 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 426                                            &target->thread.fpu,
 427                                            0, sizeof(elf_fpregset_t));
 428
 429         for (i = 0; i < NUM_FPU_REGS; i++) {
 430                 fpr_val = get_fpr64(&target->thread.fpu.fpr[i], 0);
 431                 err = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 432                                           &fpr_val, i * sizeof(elf_fpreg_t),
 433                                           (i + 1) * sizeof(elf_fpreg_t));
 434                 if (err)
 435                         return err;
 436         }
 437
 438         return 0;
 439 }
 440
 441 static int fpr_set(struct task_struct *target,
 442                    const struct user_regset *regset,
 443                    unsigned int pos, unsigned int count,
 444                    const void *kbuf, const void __user *ubuf)
 445 {
 446         unsigned i;
 447         int err;
 448         u64 fpr_val;
 449
 450         /* XXX fcr31  */
 451
 452         init_fp_ctx(target);
 453
 454         if (sizeof(target->thread.fpu.fpr[i]) == sizeof(elf_fpreg_t))
 455                 return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 456                                           &target->thread.fpu,
 457                                           0, sizeof(elf_fpregset_t));
 458
 459         for (i = 0; i < NUM_FPU_REGS; i++) {
 460                 err = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 461                                          &fpr_val, i * sizeof(elf_fpreg_t),
 462                                          (i + 1) * sizeof(elf_fpreg_t));
 463                 if (err)
 464                         return err;
 465                 set_fpr64(&target->thread.fpu.fpr[i], 0, fpr_val);
 466         }
 467
 468         return 0;
 469 }
 470
 471 enum mips_regset {
 472         REGSET_GPR,
 473         REGSET_FPR,
 474 };
 475
 476 struct pt_regs_offset {
 477         const char *name;
 478         int offset;
 479 };
 480
 481 #define REG_OFFSET_NAME(reg, r) {                                       \
 482         .name = #reg,                                                   \
 483         .offset = offsetof(struct pt_regs, r)                           \
 484 }
 485
 486 #define REG_OFFSET_END {                                                \
 487         .name = NULL,                                                   \
 488         .offset = 0                                                     \
 489 }
 490
 491 static const struct pt_regs_offset regoffset_table[] = {
 492         REG_OFFSET_NAME(r0, regs[0]),
 493         REG_OFFSET_NAME(r1, regs[1]),
 494         REG_OFFSET_NAME(r2, regs[2]),
 495         REG_OFFSET_NAME(r3, regs[3]),
 496         REG_OFFSET_NAME(r4, regs[4]),
 497         REG_OFFSET_NAME(r5, regs[5]),
 498         REG_OFFSET_NAME(r6, regs[6]),
 499         REG_OFFSET_NAME(r7, regs[7]),
 500         REG_OFFSET_NAME(r8, regs[8]),
 501         REG_OFFSET_NAME(r9, regs[9]),
 502         REG_OFFSET_NAME(r10, regs[10]),
 503         REG_OFFSET_NAME(r11, regs[11]),
 504         REG_OFFSET_NAME(r12, regs[12]),
 505         REG_OFFSET_NAME(r13, regs[13]),
 506         REG_OFFSET_NAME(r14, regs[14]),
 507         REG_OFFSET_NAME(r15, regs[15]),
 508         REG_OFFSET_NAME(r16, regs[16]),
 509         REG_OFFSET_NAME(r17, regs[17]),
 510         REG_OFFSET_NAME(r18, regs[18]),
 511         REG_OFFSET_NAME(r19, regs[19]),
 512         REG_OFFSET_NAME(r20, regs[20]),
 513         REG_OFFSET_NAME(r21, regs[21]),
 514         REG_OFFSET_NAME(r22, regs[22]),
 515         REG_OFFSET_NAME(r23, regs[23]),
 516         REG_OFFSET_NAME(r24, regs[24]),
 517         REG_OFFSET_NAME(r25, regs[25]),
 518         REG_OFFSET_NAME(r26, regs[26]),
 519         REG_OFFSET_NAME(r27, regs[27]),
 520         REG_OFFSET_NAME(r28, regs[28]),
 521         REG_OFFSET_NAME(r29, regs[29]),
 522         REG_OFFSET_NAME(r30, regs[30]),
 523         REG_OFFSET_NAME(r31, regs[31]),
 524         REG_OFFSET_NAME(c0_status, cp0_status),
 525         REG_OFFSET_NAME(hi, hi),
 526         REG_OFFSET_NAME(lo, lo),
 527 #ifdef CONFIG_CPU_HAS_SMARTMIPS
 528         REG_OFFSET_NAME(acx, acx),
 529 #endif
 530         REG_OFFSET_NAME(c0_badvaddr, cp0_badvaddr),
 531         REG_OFFSET_NAME(c0_cause, cp0_cause),
 532         REG_OFFSET_NAME(c0_epc, cp0_epc),
 533 #ifdef CONFIG_CPU_CAVIUM_OCTEON
 534         REG_OFFSET_NAME(mpl0, mpl[0]),
 535         REG_OFFSET_NAME(mpl1, mpl[1]),
 536         REG_OFFSET_NAME(mpl2, mpl[2]),
 537         REG_OFFSET_NAME(mtp0, mtp[0]),
 538         REG_OFFSET_NAME(mtp1, mtp[1]),
 539         REG_OFFSET_NAME(mtp2, mtp[2]),
 540 #endif
 541         REG_OFFSET_END,
 542 };
 543
 544 /**
 545  * regs_query_register_offset() - query register offset from its name
 546  * @name:       the name of a register
 547  *
 548  * regs_query_register_offset() returns the offset of a register in struct
 549  * pt_regs from its name. If the name is invalid, this returns -EINVAL;
 550  */
 551 int regs_query_register_offset(const char *name)
 552 {
 553         const struct pt_regs_offset *roff;
 554         for (roff = regoffset_table; roff->name != NULL; roff++)
 555                 if (!strcmp(roff->name, name))
 556                         return roff->offset;
 557         return -EINVAL;
 558 }
 559
 560 #if defined(CONFIG_32BIT) || defined(CONFIG_MIPS32_O32)
 561
 562 static const struct user_regset mips_regsets[] = {
 563         [REGSET_GPR] = {
 564                 .core_note_type = NT_PRSTATUS,
 565                 .n              = ELF_NGREG,
 566                 .size           = sizeof(unsigned int),
 567                 .align          = sizeof(unsigned int),
 568                 .get            = gpr32_get,
 569                 .set            = gpr32_set,
 570         },
 571         [REGSET_FPR] = {
 572                 .core_note_type = NT_PRFPREG,
 573                 .n              = ELF_NFPREG,
 574                 .size           = sizeof(elf_fpreg_t),
 575                 .align          = sizeof(elf_fpreg_t),
 576                 .get            = fpr_get,
 577                 .set            = fpr_set,
 578         },
 579 };
 580
 581 static const struct user_regset_view user_mips_view = {
 582         .name           = "mips",
 583         .e_machine      = ELF_ARCH,
 584         .ei_osabi       = ELF_OSABI,
 585         .regsets        = mips_regsets,
 586         .n              = ARRAY_SIZE(mips_regsets),
 587 };
 588
 589 #endif /* CONFIG_32BIT || CONFIG_MIPS32_O32 */
 590
 591 #ifdef CONFIG_64BIT
 592
 593 static const struct user_regset mips64_regsets[] = {
 594         [REGSET_GPR] = {
 595                 .core_note_type = NT_PRSTATUS,
 596                 .n              = ELF_NGREG,
 597                 .size           = sizeof(unsigned long),
 598                 .align          = sizeof(unsigned long),
 599                 .get            = gpr64_get,
 600                 .set            = gpr64_set,
 601         },
 602         [REGSET_FPR] = {
 603                 .core_note_type = NT_PRFPREG,
 604                 .n              = ELF_NFPREG,
 605                 .size           = sizeof(elf_fpreg_t),
 606                 .align          = sizeof(elf_fpreg_t),
 607                 .get            = fpr_get,
 608                 .set            = fpr_set,
 609         },
 610 };
 611
 612 static const struct user_regset_view user_mips64_view = {
 613         .name           = "mips64",
 614         .e_machine      = ELF_ARCH,
 615         .ei_osabi       = ELF_OSABI,
 616         .regsets        = mips64_regsets,
 617         .n              = ARRAY_SIZE(mips64_regsets),
 618 };
 619
 620 #endif /* CONFIG_64BIT */
 621
 622 const struct user_regset_view *task_user_regset_view(struct task_struct *task)
 623 {
 624 #ifdef CONFIG_32BIT
 625         return &user_mips_view;
 626 #else
 627 #ifdef CONFIG_MIPS32_O32
 628         if (test_tsk_thread_flag(task, TIF_32BIT_REGS))
 629                 return &user_mips_view;
 630 #endif
 631         return &user_mips64_view;
 632 #endif
 633 }
 634
 635 long arch_ptrace(struct task_struct *child, long request,
 636                  unsigned long addr, unsigned long data)
 637 {
 638         int ret;
 639         void __user *addrp = (void __user *) addr;
 640         void __user *datavp = (void __user *) data;
 641         unsigned long __user *datalp = (void __user *) data;
 642
 643         switch (request) {
 644         /* when I and D space are separate, these will need to be fixed. */
 645         case PTRACE_PEEKTEXT: /* read word at location addr. */
 646         case PTRACE_PEEKDATA:
 647                 ret = generic_ptrace_peekdata(child, addr, data);
 648                 break;
 649
 650         /* Read the word at location addr in the USER area. */
 651         case PTRACE_PEEKUSR: {
 652                 struct pt_regs *regs;
 653                 union fpureg *fregs;
 654                 unsigned long tmp = 0;
 655
 656                 regs = task_pt_regs(child);
 657                 ret = 0;  /* Default return value. */
 658
 659                 switch (addr) {
 660                 case 0 ... 31:
 661                         tmp = regs->regs[addr];
 662                         break;
 663                 case FPR_BASE ... FPR_BASE + 31:
 664                         if (!tsk_used_math(child)) {
 665                                 /* FP not yet used */
 666                                 tmp = -1;
 667                                 break;
 668                         }
 669                         fregs = get_fpu_regs(child);
 670
 671 #ifdef CONFIG_32BIT
 672                         if (test_thread_flag(TIF_32BIT_FPREGS)) {
 673                                 /*
 674                                  * The odd registers are actually the high
 675                                  * order bits of the values stored in the even
 676                                  * registers - unless we're using r2k_switch.S.
 677                                  */
 678                                 tmp = get_fpr32(&fregs[(addr & ~1) - FPR_BASE],
 679                                                 addr & 1);
 680                                 break;
 681                         }
 682 #endif
 683                         tmp = get_fpr32(&fregs[addr - FPR_BASE], 0);
 684                         break;
 685                 case PC:
 686                         tmp = regs->cp0_epc;
 687                         break;
 688                 case CAUSE:
 689                         tmp = regs->cp0_cause;
 690                         break;
 691                 case BADVADDR:
 692                         tmp = regs->cp0_badvaddr;
 693                         break;
 694                 case MMHI:
 695                         tmp = regs->hi;
 696                         break;
 697                 case MMLO:
 698                         tmp = regs->lo;
 699                         break;
 700 #ifdef CONFIG_CPU_HAS_SMARTMIPS
 701                 case ACX:
 702                         tmp = regs->acx;
 703                         break;
 704 #endif
 705                 case FPC_CSR:
 706                         tmp = child->thread.fpu.fcr31;
 707                         break;
 708                 case FPC_EIR:
 709                         /* implementation / version register */
 710                         tmp = boot_cpu_data.fpu_id;
 711                         break;
 712                 case DSP_BASE ... DSP_BASE + 5: {
 713                         dspreg_t *dregs;
 714
 715                         if (!cpu_has_dsp) {
 716                                 tmp = 0;
 717                                 ret = -EIO;
 718                                 goto out;
 719                         }
 720                         dregs = __get_dsp_regs(child);
 721                         tmp = (unsigned long) (dregs[addr - DSP_BASE]);
 722                         break;
 723                 }
 724                 case DSP_CONTROL:
 725                         if (!cpu_has_dsp) {
 726                                 tmp = 0;
 727                                 ret = -EIO;
 728                                 goto out;
 729                         }
 730                         tmp = child->thread.dsp.dspcontrol;
 731                         break;
 732                 default:
 733                         tmp = 0;
 734                         ret = -EIO;
 735                         goto out;
 736                 }
 737                 ret = put_user(tmp, datalp);
 738                 break;
 739         }
 740
 741         /* when I and D space are separate, this will have to be fixed. */
 742         case PTRACE_POKETEXT: /* write the word at location addr. */
 743         case PTRACE_POKEDATA:
 744                 ret = generic_ptrace_pokedata(child, addr, data);
 745                 break;
 746
 747         case PTRACE_POKEUSR: {
 748                 struct pt_regs *regs;
 749                 ret = 0;
 750                 regs = task_pt_regs(child);
 751
 752                 switch (addr) {
 753                 case 0 ... 31:
 754                         regs->regs[addr] = data;
 755                         break;
 756                 case FPR_BASE ... FPR_BASE + 31: {
 757                         union fpureg *fregs = get_fpu_regs(child);
 758
 759                         init_fp_ctx(child);
 760 #ifdef CONFIG_32BIT
 761                         if (test_thread_flag(TIF_32BIT_FPREGS)) {
 762                                 /*
 763                                  * The odd registers are actually the high
 764                                  * order bits of the values stored in the even
 765                                  * registers - unless we're using r2k_switch.S.
 766                                  */
 767                                 set_fpr32(&fregs[(addr & ~1) - FPR_BASE],
 768                                           addr & 1, data);
 769                                 break;
 770                         }
 771 #endif
 772                         set_fpr64(&fregs[addr - FPR_BASE], 0, data);
 773                         break;
 774                 }
 775                 case PC:
 776                         regs->cp0_epc = data;
 777                         break;
 778                 case MMHI:
 779                         regs->hi = data;
 780                         break;
 781                 case MMLO:
 782                         regs->lo = data;
 783                         break;
 784 #ifdef CONFIG_CPU_HAS_SMARTMIPS
 785                 case ACX:
 786                         regs->acx = data;
 787                         break;
 788 #endif
 789                 case FPC_CSR:
 790                         init_fp_ctx(child);
 791                         ptrace_setfcr31(child, data);
 792                         break;
 793                 case DSP_BASE ... DSP_BASE + 5: {
 794                         dspreg_t *dregs;
 795
 796                         if (!cpu_has_dsp) {
 797                                 ret = -EIO;
 798                                 break;
 799                         }
 800
 801                         dregs = __get_dsp_regs(child);
 802                         dregs[addr - DSP_BASE] = data;
 803                         break;
 804                 }
 805                 case DSP_CONTROL:
 806                         if (!cpu_has_dsp) {
 807                                 ret = -EIO;
 808                                 break;
 809                         }
 810                         child->thread.dsp.dspcontrol = data;
 811                         break;
 812                 default:
 813                         /* The rest are not allowed. */
 814                         ret = -EIO;
 815                         break;
 816                 }
 817                 break;
 818                 }
 819
 820         case PTRACE_GETREGS:
 821                 ret = ptrace_getregs(child, datavp);
 822                 break;
 823
 824         case PTRACE_SETREGS:
 825                 ret = ptrace_setregs(child, datavp);
 826                 break;
 827
 828         case PTRACE_GETFPREGS:
 829                 ret = ptrace_getfpregs(child, datavp);
 830                 break;
 831
 832         case PTRACE_SETFPREGS:
 833                 ret = ptrace_setfpregs(child, datavp);
 834                 break;
 835
 836         case PTRACE_GET_THREAD_AREA:
 837                 ret = put_user(task_thread_info(child)->tp_value, datalp);
 838                 break;
 839
 840         case PTRACE_GET_WATCH_REGS:
 841                 ret = ptrace_get_watch_regs(child, addrp);
 842                 break;
 843
 844         case PTRACE_SET_WATCH_REGS:
 845                 ret = ptrace_set_watch_regs(child, addrp);
 846                 break;
 847
 848         default:
 849                 ret = ptrace_request(child, request, addr, data);
 850                 break;
 851         }
 852  out:
 853         return ret;
 854 }
 855
 856 /*
 857  * Notification of system call entry/exit
 858  * - triggered by current->work.syscall_trace
 859  */
 860 asmlinkage long syscall_trace_enter(struct pt_regs *regs, long syscall)
 861 {
 862         user_exit();
 863
 864         current_thread_info()->syscall = syscall;
 865
 866         if (test_thread_flag(TIF_SYSCALL_TRACE) &&
 867             tracehook_report_syscall_entry(regs))
 868                 return -1;
 869
 870         if (secure_computing(NULL) == -1)
 871                 return -1;
 872
 873         if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT)))
 874                 trace_sys_enter(regs, regs->regs[2]);
 875
 876         audit_syscall_entry(syscall, regs->regs[4], regs->regs[5],
 877                             regs->regs[6], regs->regs[7]);
 878         return syscall;
 879 }
 880
 881 /*
 882  * Notification of system call entry/exit
 883  * - triggered by current->work.syscall_trace
 884  */
 885 asmlinkage void syscall_trace_leave(struct pt_regs *regs)
 886 {
 887         /*
 888          * We may come here right after calling schedule_user()
 889          * or do_notify_resume(), in which case we can be in RCU
 890          * user mode.
 891          */
 892         user_exit();
 893
 894         audit_syscall_exit(regs);
 895
 896         if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT)))
 897                 trace_sys_exit(regs, regs->regs[2]);
 898
 899         if (test_thread_flag(TIF_SYSCALL_TRACE))
 900                 tracehook_report_syscall_exit(regs, 0);
 901
 902         user_enter();
 903 }