1 #include <linux/highmem.h>
2 #include <linux/kdebug.h>
3 #include <linux/types.h>
4 #include <linux/notifier.h>
5 #include <linux/sched.h>
6 #include <linux/uprobes.h>
8 #include <asm/branch.h>
9 #include <asm/cpu-features.h>
10 #include <asm/ptrace.h>
12 #include "probes-common.h"
14 static inline int insn_has_delay_slot(const union mips_instruction insn)
16 return __insn_has_delay_slot(insn);
20 * arch_uprobe_analyze_insn - instruction analysis including validity and fixups.
21 * @mm: the probed address space.
22 * @arch_uprobe: the probepoint information.
23 * @addr: virtual address at which to install the probepoint
24 * Return 0 on success or a -ve number on error.
26 int arch_uprobe_analyze_insn(struct arch_uprobe *aup,
27 struct mm_struct *mm, unsigned long addr)
29 union mips_instruction inst;
32 * For the time being this also blocks attempts to use uprobes with
33 * MIPS16 and microMIPS.
38 inst.word = aup->insn[0];
40 if (__insn_is_compact_branch(inst)) {
41 pr_notice("Uprobes for compact branches are not supported\n");
45 aup->ixol[0] = aup->insn[insn_has_delay_slot(inst)];
46 aup->ixol[1] = UPROBE_BRK_UPROBE_XOL; /* NOP */
52 * is_trap_insn - check if the instruction is a trap variant
53 * @insn: instruction to be checked.
54 * Returns true if @insn is a trap variant.
56 * This definition overrides the weak definition in kernel/events/uprobes.c.
57 * and is needed for the case where an architecture has multiple trap
58 * instructions (like PowerPC or MIPS). We treat BREAK just like the more
59 * modern conditional trap instructions.
61 bool is_trap_insn(uprobe_opcode_t *insn)
63 union mips_instruction inst;
67 switch (inst.i_format.opcode) {
69 switch (inst.r_format.func) {
81 case bcond_op: /* Yes, really ... */
82 switch (inst.u_format.rt) {
97 #define UPROBE_TRAP_NR ULONG_MAX
100 * arch_uprobe_pre_xol - prepare to execute out of line.
101 * @auprobe: the probepoint information.
102 * @regs: reflects the saved user state of current task.
104 int arch_uprobe_pre_xol(struct arch_uprobe *aup, struct pt_regs *regs)
106 struct uprobe_task *utask = current->utask;
109 * Now find the EPC where to resume after the breakpoint has been
110 * dealt with. This may require emulation of a branch.
112 aup->resume_epc = regs->cp0_epc + 4;
113 if (insn_has_delay_slot((union mips_instruction) aup->insn[0])) {
117 __compute_return_epc_for_insn(regs,
118 (union mips_instruction) aup->insn[0]);
119 aup->resume_epc = regs->cp0_epc;
121 utask->autask.saved_trap_nr = current->thread.trap_nr;
122 current->thread.trap_nr = UPROBE_TRAP_NR;
123 regs->cp0_epc = current->utask->xol_vaddr;
128 int arch_uprobe_post_xol(struct arch_uprobe *aup, struct pt_regs *regs)
130 struct uprobe_task *utask = current->utask;
132 current->thread.trap_nr = utask->autask.saved_trap_nr;
133 regs->cp0_epc = aup->resume_epc;
139 * If xol insn itself traps and generates a signal(Say,
140 * SIGILL/SIGSEGV/etc), then detect the case where a singlestepped
141 * instruction jumps back to its own address. It is assumed that anything
142 * like do_page_fault/do_trap/etc sets thread.trap_nr != -1.
144 * arch_uprobe_pre_xol/arch_uprobe_post_xol save/restore thread.trap_nr,
145 * arch_uprobe_xol_was_trapped() simply checks that ->trap_nr is not equal to
146 * UPROBE_TRAP_NR == -1 set by arch_uprobe_pre_xol().
148 bool arch_uprobe_xol_was_trapped(struct task_struct *tsk)
150 if (tsk->thread.trap_nr != UPROBE_TRAP_NR)
156 int arch_uprobe_exception_notify(struct notifier_block *self,
157 unsigned long val, void *data)
159 struct die_args *args = data;
160 struct pt_regs *regs = args->regs;
162 /* regs == NULL is a kernel bug */
166 /* We are only interested in userspace traps */
167 if (!user_mode(regs))
172 if (uprobe_pre_sstep_notifier(regs))
176 if (uprobe_post_sstep_notifier(regs))
186 * This function gets called when XOL instruction either gets trapped or
187 * the thread has a fatal signal. Reset the instruction pointer to its
188 * probed address for the potential restart or for post mortem analysis.
190 void arch_uprobe_abort_xol(struct arch_uprobe *aup,
191 struct pt_regs *regs)
193 struct uprobe_task *utask = current->utask;
195 instruction_pointer_set(regs, utask->vaddr);
198 unsigned long arch_uretprobe_hijack_return_addr(
199 unsigned long trampoline_vaddr, struct pt_regs *regs)
205 /* Replace the return address with the trampoline address */
206 regs->regs[31] = trampoline_vaddr;
212 * set_swbp - store breakpoint at a given address.
213 * @auprobe: arch specific probepoint information.
214 * @mm: the probed process address space.
215 * @vaddr: the virtual address to insert the opcode.
217 * For mm @mm, store the breakpoint instruction at @vaddr.
218 * Return 0 (success) or a negative errno.
220 * This version overrides the weak version in kernel/events/uprobes.c.
221 * It is required to handle MIPS16 and microMIPS.
223 int __weak set_swbp(struct arch_uprobe *auprobe, struct mm_struct *mm,
226 return uprobe_write_opcode(mm, vaddr, UPROBE_SWBP_INSN);
229 void __weak arch_uprobe_copy_ixol(struct page *page, unsigned long vaddr,
230 void *src, unsigned long len)
232 unsigned long kaddr, kstart;
234 /* Initialize the slot */
235 kaddr = (unsigned long)kmap_atomic(page);
236 kstart = kaddr + (vaddr & ~PAGE_MASK);
237 memcpy((void *)kstart, src, len);
238 flush_icache_range(kstart, kstart + len);
239 kunmap_atomic((void *)kaddr);
243 * uprobe_get_swbp_addr - compute address of swbp given post-swbp regs
244 * @regs: Reflects the saved state of the task after it has hit a breakpoint
246 * Return the address of the breakpoint instruction.
248 * This overrides the weak version in kernel/events/uprobes.c.
250 unsigned long uprobe_get_swbp_addr(struct pt_regs *regs)
252 return instruction_pointer(regs);
256 * See if the instruction can be emulated.
257 * Returns true if instruction was emulated, false otherwise.
259 * For now we always emulate so this function just returns 0.
261 bool arch_uprobe_skip_sstep(struct arch_uprobe *auprobe, struct pt_regs *regs)