2 * Copyright (C) 2006 - 2008 Lemote Inc. & Insititute of Computing Technology
3 * Author: Yanhua, yanh@lemote.com
5 * This file is subject to the terms and conditions of the GNU General Public
6 * License. See the file "COPYING" in the main directory of this archive
10 #include <linux/cpufreq.h>
11 #include <linux/errno.h>
12 #include <linux/export.h>
13 #include <linux/list.h>
14 #include <linux/mutex.h>
15 #include <linux/spinlock.h>
17 #include <asm/clock.h>
18 #include <asm/mach-loongson/loongson.h>
20 static LIST_HEAD(clock_list);
21 static DEFINE_SPINLOCK(clock_lock);
22 static DEFINE_MUTEX(clock_list_sem);
24 /* Minimum CLK support */
26 DC_ZERO, DC_25PT = 2, DC_37PT, DC_50PT, DC_62PT, DC_75PT,
27 DC_87PT, DC_DISABLE, DC_RESV
30 struct cpufreq_frequency_table loongson2_clockmod_table[] = {
31 {0, DC_RESV, CPUFREQ_ENTRY_INVALID},
32 {0, DC_ZERO, CPUFREQ_ENTRY_INVALID},
40 {0, DC_RESV, CPUFREQ_TABLE_END},
42 EXPORT_SYMBOL_GPL(loongson2_clockmod_table);
44 static struct clk cpu_clk = {
46 .flags = CLK_ALWAYS_ENABLED | CLK_RATE_PROPAGATES,
50 struct clk *clk_get(struct device *dev, const char *id)
54 EXPORT_SYMBOL(clk_get);
56 static void propagate_rate(struct clk *clk)
60 list_for_each_entry(clkp, &clock_list, node) {
61 if (likely(clkp->parent != clk))
63 if (likely(clkp->ops && clkp->ops->recalc))
64 clkp->ops->recalc(clkp);
65 if (unlikely(clkp->flags & CLK_RATE_PROPAGATES))
70 int clk_enable(struct clk *clk)
74 EXPORT_SYMBOL(clk_enable);
76 void clk_disable(struct clk *clk)
79 EXPORT_SYMBOL(clk_disable);
81 unsigned long clk_get_rate(struct clk *clk)
83 return (unsigned long)clk->rate;
85 EXPORT_SYMBOL(clk_get_rate);
87 void clk_put(struct clk *clk)
90 EXPORT_SYMBOL(clk_put);
92 int clk_set_rate(struct clk *clk, unsigned long rate)
94 unsigned int rate_khz = rate / 1000;
99 if (likely(clk->ops && clk->ops->set_rate)) {
102 spin_lock_irqsave(&clock_lock, flags);
103 ret = clk->ops->set_rate(clk, rate, 0);
104 spin_unlock_irqrestore(&clock_lock, flags);
107 if (unlikely(clk->flags & CLK_RATE_PROPAGATES))
110 for (i = 0; loongson2_clockmod_table[i].frequency != CPUFREQ_TABLE_END;
112 if (loongson2_clockmod_table[i].frequency ==
113 CPUFREQ_ENTRY_INVALID)
115 if (rate_khz == loongson2_clockmod_table[i].frequency)
118 if (rate_khz != loongson2_clockmod_table[i].frequency)
123 regval = LOONGSON_CHIPCFG0;
124 regval = (regval & ~0x7) |
125 (loongson2_clockmod_table[i].driver_data - 1);
126 LOONGSON_CHIPCFG0 = regval;
130 EXPORT_SYMBOL_GPL(clk_set_rate);
132 long clk_round_rate(struct clk *clk, unsigned long rate)
134 if (likely(clk->ops && clk->ops->round_rate)) {
135 unsigned long flags, rounded;
137 spin_lock_irqsave(&clock_lock, flags);
138 rounded = clk->ops->round_rate(clk, rate);
139 spin_unlock_irqrestore(&clock_lock, flags);
146 EXPORT_SYMBOL_GPL(clk_round_rate);