arch/mips/mti-malta/malta-time.c

   1 /*
   2  * Carsten Langgaard, carstenl@mips.com
   3  * Copyright (C) 1999,2000 MIPS Technologies, Inc.  All rights reserved.
   4  *
   5  *  This program is free software; you can distribute it and/or modify it
   6  *  under the terms of the GNU General Public License (Version 2) as
   7  *  published by the Free Software Foundation.
   8  *
   9  *  This program is distributed in the hope it will be useful, but WITHOUT
  10  *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  *  for more details.
  13  *
  14  *  You should have received a copy of the GNU General Public License along
  15  *  with this program; if not, write to the Free Software Foundation, Inc.,
  16  *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
  17  *
  18  * Setting up the clock on the MIPS boards.
  19  */
  20 #include <linux/types.h>
  21 #include <linux/i8253.h>
  22 #include <linux/init.h>
  23 #include <linux/kernel_stat.h>
  24 #include <linux/sched.h>
  25 #include <linux/spinlock.h>
  26 #include <linux/interrupt.h>
  27 #include <linux/timex.h>
  28 #include <linux/mc146818rtc.h>
  29
  30 #include <asm/mipsregs.h>
  31 #include <asm/mipsmtregs.h>
  32 #include <asm/hardirq.h>
  33 #include <asm/irq.h>
  34 #include <asm/div64.h>
  35 #include <asm/setup.h>
  36 #include <asm/time.h>
  37 #include <asm/mc146818-time.h>
  38 #include <asm/msc01_ic.h>
  39 #include <asm/gic.h>
  40
  41 #include <asm/mips-boards/generic.h>
  42 #include <asm/mips-boards/maltaint.h>
  43
  44 unsigned long cpu_khz;
  45
  46 static int mips_cpu_timer_irq;
  47 static int mips_cpu_perf_irq;
  48 extern int cp0_perfcount_irq;
  49
  50 static void mips_timer_dispatch(void)
  51 {
  52         do_IRQ(mips_cpu_timer_irq);
  53 }
  54
  55 static void mips_perf_dispatch(void)
  56 {
  57         do_IRQ(mips_cpu_perf_irq);
  58 }
  59
  60 static unsigned int freqround(unsigned int freq, unsigned int amount)
  61 {
  62         freq += amount;
  63         freq -= freq % (amount*2);
  64         return freq;
  65 }
  66
  67 /*
  68  * Estimate CPU and GIC frequencies.
  69  */
  70 static void __init estimate_frequencies(void)
  71 {
  72         unsigned long flags;
  73         unsigned int count, start;
  74 #ifdef CONFIG_IRQ_GIC
  75         unsigned int giccount = 0, gicstart = 0;
  76 #endif
  77
  78 #if defined (CONFIG_KVM_GUEST) && defined (CONFIG_KVM_HOST_FREQ)
  79         unsigned int prid = read_c0_prid() & 0xffff00;
  80
  81         /*
  82          * XXXKYMA: hardwire the CPU frequency to Host Freq/4
  83          */
  84         count = (CONFIG_KVM_HOST_FREQ * 1000000) >> 3;
  85         if ((prid != (PRID_COMP_MIPS | PRID_IMP_20KC)) &&
  86             (prid != (PRID_COMP_MIPS | PRID_IMP_25KF)))
  87                 count *= 2;
  88
  89         mips_hpt_frequency = count;
  90         return;
  91 #endif
  92
  93         local_irq_save(flags);
  94
  95         /* Start counter exactly on falling edge of update flag. */
  96         while (CMOS_READ(RTC_REG_A) & RTC_UIP);
  97         while (!(CMOS_READ(RTC_REG_A) & RTC_UIP));
  98
  99         /* Initialize counters. */
 100         start = read_c0_count();
 101 #ifdef CONFIG_IRQ_GIC
 102         if (gic_present)
 103                 GICREAD(GIC_REG(SHARED, GIC_SH_COUNTER_31_00), gicstart);
 104 #endif
 105
 106         /* Read counter exactly on falling edge of update flag. */
 107         while (CMOS_READ(RTC_REG_A) & RTC_UIP);
 108         while (!(CMOS_READ(RTC_REG_A) & RTC_UIP));
 109
 110         count = read_c0_count();
 111 #ifdef CONFIG_IRQ_GIC
 112         if (gic_present)
 113                 GICREAD(GIC_REG(SHARED, GIC_SH_COUNTER_31_00), giccount);
 114 #endif
 115
 116         local_irq_restore(flags);
 117
 118         count -= start;
 119         mips_hpt_frequency = count;
 120
 121 #ifdef CONFIG_IRQ_GIC
 122         if (gic_present) {
 123                 giccount -= gicstart;
 124                 gic_frequency = giccount;
 125         }
 126 #endif
 127 }
 128
 129 void read_persistent_clock(struct timespec *ts)
 130 {
 131         ts->tv_sec = mc146818_get_cmos_time();
 132         ts->tv_nsec = 0;
 133 }
 134
 135 static void __init plat_perf_setup(void)
 136 {
 137 #ifdef MSC01E_INT_BASE
 138         if (cpu_has_veic) {
 139                 set_vi_handler(MSC01E_INT_PERFCTR, mips_perf_dispatch);
 140                 mips_cpu_perf_irq = MSC01E_INT_BASE + MSC01E_INT_PERFCTR;
 141         } else
 142 #endif
 143         if (cp0_perfcount_irq >= 0) {
 144                 if (cpu_has_vint)
 145                         set_vi_handler(cp0_perfcount_irq, mips_perf_dispatch);
 146                 mips_cpu_perf_irq = MIPS_CPU_IRQ_BASE + cp0_perfcount_irq;
 147 #ifdef CONFIG_SMP
 148                 irq_set_handler(mips_cpu_perf_irq, handle_percpu_irq);
 149 #endif
 150         }
 151 }
 152
 153 unsigned int get_c0_compare_int(void)
 154 {
 155 #ifdef MSC01E_INT_BASE
 156         if (cpu_has_veic) {
 157                 set_vi_handler(MSC01E_INT_CPUCTR, mips_timer_dispatch);
 158                 mips_cpu_timer_irq = MSC01E_INT_BASE + MSC01E_INT_CPUCTR;
 159         } else
 160 #endif
 161         {
 162                 if (cpu_has_vint)
 163                         set_vi_handler(cp0_compare_irq, mips_timer_dispatch);
 164                 mips_cpu_timer_irq = MIPS_CPU_IRQ_BASE + cp0_compare_irq;
 165         }
 166
 167         return mips_cpu_timer_irq;
 168 }
 169
 170 void __init plat_time_init(void)
 171 {
 172         unsigned int prid = read_c0_prid() & 0xffff00;
 173         unsigned int freq;
 174
 175         estimate_frequencies();
 176
 177         freq = mips_hpt_frequency;
 178         if ((prid != (PRID_COMP_MIPS | PRID_IMP_20KC)) &&
 179             (prid != (PRID_COMP_MIPS | PRID_IMP_25KF)))
 180                 freq *= 2;
 181         freq = freqround(freq, 5000);
 182         printk("CPU frequency %d.%02d MHz\n", freq/1000000,
 183                (freq%1000000)*100/1000000);
 184         cpu_khz = freq / 1000;
 185
 186         mips_scroll_message();
 187
 188 #ifdef CONFIG_I8253
 189         /* Only Malta has a PIT. */
 190         setup_pit_timer();
 191 #endif
 192
 193 #ifdef CONFIG_IRQ_GIC
 194         if (gic_present) {
 195                 freq = freqround(gic_frequency, 5000);
 196                 printk("GIC frequency %d.%02d MHz\n", freq/1000000,
 197                        (freq%1000000)*100/1000000);
 198 #ifdef CONFIG_CSRC_GIC
 199                 gic_clocksource_init(gic_frequency);
 200 #endif
 201         }
 202 #endif
 203
 204         plat_perf_setup();
 205 }