2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * Copyright (C) 2012 MIPS Technologies, Inc. All rights reserved.
8 #include <linux/init.h>
11 #include <asm/bootinfo.h>
12 #include <asm/cacheflush.h>
13 #include <asm/traps.h>
14 #include <asm/mips-boards/generic.h>
15 #include <asm/fw/fw.h>
17 extern char except_vec_nmi;
18 extern char except_vec_ejtag_debug;
20 #ifdef CONFIG_SERIAL_8250_CONSOLE
21 static void __init console_config(void)
23 char console_string[40];
25 char parity = '\0', bits = '\0', flow = '\0';
28 if ((strstr(fw_getcmdline(), "console=")) == NULL) {
29 s = fw_getenv("modetty0");
31 while (*s >= '0' && *s <= '9')
32 baud = baud*10 + *s++ - '0';
48 if (parity != 'n' && parity != 'o' && parity != 'e')
50 if (bits != '7' && bits != '8')
54 sprintf(console_string, " console=ttyS0,%d%c%c%c", baud,
56 strcat(fw_getcmdline(), console_string);
61 static void __init mips_nmi_setup(void)
66 (void *)(CAC_BASE + 0xa80) :
67 (void *)(CAC_BASE + 0x380);
68 #ifdef CONFIG_CPU_MICROMIPS
70 * Decrement the exception vector address by one for microMIPS.
72 memcpy(base, (&except_vec_nmi - 1), 0x80);
75 * This is a hack. We do not know if the boot loader was built with
76 * microMIPS instructions or not. If it was not, the NMI exception
77 * code at 0x80000a80 will be taken in MIPS32 mode. The hand coded
78 * assembly below forces us into microMIPS mode if we are a pure
79 * microMIPS kernel. The assembly instructions are:
81 * 3C1A8000 lui k0,0x8000
82 * 375A0381 ori k0,k0,0x381
86 * The mode switch occurs by jumping to the unaligned exception
87 * vector address at 0x80000381 which would have been 0x80000380
88 * in MIPS32 mode. The jump to the unaligned address transitions
89 * us into microMIPS mode.
92 void *base2 = (void *)(CAC_BASE + 0xa80);
93 *((unsigned int *)base2) = 0x3c1a8000;
94 *((unsigned int *)base2 + 1) = 0x375a0381;
95 *((unsigned int *)base2 + 2) = 0x03400008;
96 *((unsigned int *)base2 + 3) = 0x00000000;
97 flush_icache_range((unsigned long)base2,
98 (unsigned long)base2 + 0x10);
101 memcpy(base, &except_vec_nmi, 0x80);
103 flush_icache_range((unsigned long)base, (unsigned long)base + 0x80);
106 static void __init mips_ejtag_setup(void)
110 base = cpu_has_veic ?
111 (void *)(CAC_BASE + 0xa00) :
112 (void *)(CAC_BASE + 0x300);
113 #ifdef CONFIG_CPU_MICROMIPS
115 memcpy(base, (&except_vec_ejtag_debug - 1), 0x80);
117 void *base2 = (void *)(CAC_BASE + 0xa00);
118 *((unsigned int *)base2) = 0x3c1a8000;
119 *((unsigned int *)base2 + 1) = 0x375a0301;
120 *((unsigned int *)base2 + 2) = 0x03400008;
121 *((unsigned int *)base2 + 3) = 0x00000000;
122 flush_icache_range((unsigned long)base2,
123 (unsigned long)base2 + 0x10);
126 memcpy(base, &except_vec_ejtag_debug, 0x80);
128 flush_icache_range((unsigned long)base, (unsigned long)base + 0x80);
131 void __init prom_init(void)
133 board_nmi_handler_setup = mips_nmi_setup;
134 board_ejtag_handler_setup = mips_ejtag_setup;
137 #ifdef CONFIG_EARLY_PRINTK
138 if ((strstr(fw_getcmdline(), "console=ttyS0")) != NULL)
139 fw_init_early_console(0);
140 else if ((strstr(fw_getcmdline(), "console=ttyS1")) != NULL)
141 fw_init_early_console(1);
143 #ifdef CONFIG_SERIAL_8250_CONSOLE
144 if ((strstr(fw_getcmdline(), "console=")) == NULL)
145 strcat(fw_getcmdline(), " console=ttyS0,38400n8r");
150 void __init prom_free_prom_memory(void)