2 * Platform device support for NXP PNX8550 SoCs
4 * Copyright 2005, Embedded Alley Solutions, Inc
6 * Based on arch/mips/au1000/common/platform.c
7 * Platform device support for Au1x00 SoCs.
9 * Copyright 2004, Matt Porter <mporter@kernel.crashing.org>
11 * This file is licensed under the terms of the GNU General Public
12 * License version 2. This program is licensed "as is" without any
13 * warranty of any kind, whether express or implied.
15 #include <linux/device.h>
16 #include <linux/dma-mapping.h>
17 #include <linux/kernel.h>
18 #include <linux/init.h>
19 #include <linux/resource.h>
20 #include <linux/serial.h>
21 #include <linux/serial_pnx8xxx.h>
22 #include <linux/platform_device.h>
23 #include <linux/usb/ohci_pdriver.h>
29 static struct resource pnx8550_usb_ohci_resources[] = {
31 .start = PNX8550_USB_OHCI_OP_BASE,
32 .end = PNX8550_USB_OHCI_OP_BASE +
33 PNX8550_USB_OHCI_OP_LEN,
34 .flags = IORESOURCE_MEM,
37 .start = PNX8550_INT_USB,
38 .end = PNX8550_INT_USB,
39 .flags = IORESOURCE_IRQ,
43 static struct resource pnx8550_uart_resources[] = {
45 .start = PNX8550_UART_PORT0,
46 .end = PNX8550_UART_PORT0 + 0xfff,
47 .flags = IORESOURCE_MEM,
50 .start = PNX8550_UART_INT(0),
51 .end = PNX8550_UART_INT(0),
52 .flags = IORESOURCE_IRQ,
55 .start = PNX8550_UART_PORT1,
56 .end = PNX8550_UART_PORT1 + 0xfff,
57 .flags = IORESOURCE_MEM,
60 .start = PNX8550_UART_INT(1),
61 .end = PNX8550_UART_INT(1),
62 .flags = IORESOURCE_IRQ,
66 struct pnx8xxx_port pnx8xxx_ports[] = {
71 .membase = (void __iomem *)PNX8550_UART_PORT0,
72 .mapbase = PNX8550_UART_PORT0,
73 .irq = PNX8550_UART_INT(0),
76 .flags = UPF_BOOT_AUTOCONF,
84 .membase = (void __iomem *)PNX8550_UART_PORT1,
85 .mapbase = PNX8550_UART_PORT1,
86 .irq = PNX8550_UART_INT(1),
89 .flags = UPF_BOOT_AUTOCONF,
95 /* The dmamask must be set for OHCI to work */
96 static u64 ohci_dmamask = DMA_BIT_MASK(32);
98 static u64 uart_dmamask = DMA_BIT_MASK(32);
100 static int pnx8550_usb_ohci_power_on(struct platform_device *pdev)
103 * Set register CLK48CTL to enable and 48MHz
105 outl(0x00000003, PCI_BASE | 0x0004770c);
108 * Set register CLK12CTL to enable and 48MHz
110 outl(0x00000003, PCI_BASE | 0x00047710);
117 static void pnx8550_usb_ohci_power_off(struct platform_device *pdev)
122 static struct usb_ohci_pdata pnx8550_usb_ohci_pdata = {
123 .power_on = pnx8550_usb_ohci_power_on,
124 .power_off = pnx8550_usb_ohci_power_off,
127 static struct platform_device pnx8550_usb_ohci_device = {
128 .name = "ohci-platform",
131 .dma_mask = &ohci_dmamask,
132 .coherent_dma_mask = DMA_BIT_MASK(32),
133 .platform_data = &pnx8550_usb_ohci_pdata,
135 .num_resources = ARRAY_SIZE(pnx8550_usb_ohci_resources),
136 .resource = pnx8550_usb_ohci_resources,
139 static struct platform_device pnx8550_uart_device = {
140 .name = "pnx8xxx-uart",
143 .dma_mask = &uart_dmamask,
144 .coherent_dma_mask = DMA_BIT_MASK(32),
145 .platform_data = pnx8xxx_ports,
147 .num_resources = ARRAY_SIZE(pnx8550_uart_resources),
148 .resource = pnx8550_uart_resources,
151 static struct platform_device *pnx8550_platform_devices[] __initdata = {
152 &pnx8550_usb_ohci_device,
153 &pnx8550_uart_device,
156 static int __init pnx8550_platform_init(void)
158 return platform_add_devices(pnx8550_platform_devices,
159 ARRAY_SIZE(pnx8550_platform_devices));
162 arch_initcall(pnx8550_platform_init);