1 /* MN10300 Low level time management
3 * Copyright (C) 2007-2008 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 * - Derived from arch/i386/kernel/time.c
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
12 #include <linux/sched.h>
13 #include <linux/kernel.h>
14 #include <linux/interrupt.h>
15 #include <linux/time.h>
16 #include <linux/init.h>
17 #include <linux/smp.h>
18 #include <linux/profile.h>
19 #include <linux/cnt32_to_63.h>
20 #include <linux/clocksource.h>
21 #include <linux/clockchips.h>
23 #include <asm/div64.h>
24 #include <asm/processor.h>
25 #include <asm/intctl-regs.h>
29 static unsigned long mn10300_last_tsc; /* time-stamp counter at last time
30 * interrupt occurred */
32 static unsigned long sched_clock_multiplier;
35 * scheduler clock - returns current time in nanosec units.
37 unsigned long long sched_clock(void)
40 unsigned long long ll;
44 unsigned product[3]; /* 96-bit intermediate value */
46 /* cnt32_to_63() is not safe with preemption */
49 /* expand the tsc to 64-bits.
50 * - sched_clock() must be called once a minute or better or the
51 * following will go horribly wrong - see cnt32_to_63()
53 tsc64.ll = cnt32_to_63(get_cycles()) & 0x7fffffffffffffffULL;
57 /* scale the 64-bit TSC value to a nanosecond value via a 96-bit
60 asm("mulu %2,%0,%3,%0 \n" /* LSW * mult -> 0:%3:%0 */
61 "mulu %2,%1,%2,%1 \n" /* MSW * mult -> %2:%1:0 */
63 "addc 0,%2 \n" /* result in %2:%1:%0 */
64 : "=r"(product[0]), "=r"(product[1]), "=r"(product[2]), "=r"(tmp)
65 : "0"(tsc64.l[0]), "1"(tsc64.l[1]), "2"(sched_clock_multiplier)
68 result.l[0] = product[1] << 16 | product[0] >> 16;
69 result.l[1] = product[2] << 16 | product[1] >> 16;
75 * initialise the scheduler clock
77 static void __init mn10300_sched_clock_init(void)
79 sched_clock_multiplier =
80 __muldiv64u(NSEC_PER_SEC, 1 << 16, MN10300_TSCCLK);
84 * local_timer_interrupt - Local timer interrupt handler
86 * Handle local timer interrupts for this CPU. They may have been propagated
87 * to this CPU from the CPU that actually gets them by way of an IPI.
89 irqreturn_t local_timer_interrupt(void)
91 profile_tick(CPU_PROFILING);
92 update_process_times(user_mode(get_irq_regs()));
96 #ifndef CONFIG_GENERIC_TIME
98 * advance the kernel's time keeping clocks (xtime and jiffies)
99 * - we use Timer 0 & 1 cascaded as a clock to nudge us the next time
100 * there's a need to update
102 static irqreturn_t timer_interrupt(int irq, void *dev_id)
104 unsigned tsc, elapse;
107 write_seqlock(&xtime_lock);
109 while (tsc = get_cycles(),
110 elapse = tsc - mn10300_last_tsc, /* time elapsed since last
112 elapse > MN10300_TSC_PER_HZ
114 mn10300_last_tsc += MN10300_TSC_PER_HZ;
116 /* advance the kernel's time tracking system */
120 write_sequnlock(&xtime_lock);
122 ret = local_timer_interrupt();
124 send_IPI_allbutself(LOCAL_TIMER_IPI);
129 static struct irqaction timer_irq = {
130 .handler = timer_interrupt,
131 .flags = IRQF_DISABLED | IRQF_SHARED | IRQF_TIMER,
134 #endif /* CONFIG_GENERIC_TIME */
136 #ifdef CONFIG_CSRC_MN10300
137 void __init clocksource_set_clock(struct clocksource *cs, unsigned int clock)
142 /* Find a shift value */
143 for (shift = 32; shift > 0; shift--) {
144 temp = (u64) NSEC_PER_SEC << shift;
146 if ((temp >> 32) == 0)
150 cs->mult = (u32) temp;
154 #if CONFIG_CEVT_MN10300
155 void __cpuinit clockevent_set_clock(struct clock_event_device *cd,
161 /* Find a shift value */
162 for (shift = 32; shift > 0; shift--) {
163 temp = (u64) clock << shift;
164 do_div(temp, NSEC_PER_SEC);
165 if ((temp >> 32) == 0)
169 cd->mult = (u32) temp;
174 * initialise the various timers used by the main part of the kernel
176 void __init time_init(void)
178 /* we need the prescalar running to be able to use IOCLK/8
179 * - IOCLK runs at 1/4 (ST5 open) or 1/8 (ST5 closed) internal CPU clock
180 * - IOCLK runs at Fosc rate (crystal speed)
182 TMPSCNT |= TMPSCNT_ENABLE;
184 #ifdef CONFIG_GENERIC_TIME
187 startup_timestamp_counter();
191 "timestamp counter I/O clock running at %lu.%02lu"
192 " (calibrated against RTC)\n",
193 MN10300_TSCCLK / 1000000, (MN10300_TSCCLK / 10000) % 100);
195 mn10300_last_tsc = read_timestamp_counter();
197 #ifdef CONFIG_GENERIC_CLOCKEVENTS
200 reload_jiffies_counter(MN10300_JC_PER_HZ - 1);
201 setup_jiffies_interrupt(TMJCIRQ, &timer_irq, CONFIG_TIMER_IRQ_LEVEL);
204 #ifdef CONFIG_MN10300_WD_TIMER
205 /* start the watchdog timer */
209 mn10300_sched_clock_init();