2 * B4420DS Device Tree Source
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37 compatible = "fsl,B4QDS";
40 interrupt-parent = <&mpic>;
42 ifc: localbus@ffe124000 {
43 reg = <0xf 0xfe124000 0 0x2000>;
44 ranges = <0 0 0xf 0xe8000000 0x08000000
45 2 0 0xf 0xff800000 0x00010000
46 3 0 0xf 0xffdf0000 0x00008000>;
51 compatible = "cfi-flash";
52 reg = <0x0 0x0 0x8000000>;
60 compatible = "fsl,ifc-nand";
61 reg = <0x2 0x0 0x10000>;
64 /* This location must not be altered */
65 /* 1MB for u-boot Bootloader Image */
66 reg = <0x0 0x00100000>;
67 label = "NAND U-Boot Image";
72 /* 1MB for DTB Image */
73 reg = <0x00100000 0x00100000>;
74 label = "NAND DTB Image";
78 /* 10MB for Linux Kernel Image */
79 reg = <0x00200000 0x00A00000>;
80 label = "NAND Linux Kernel Image";
84 /* 500MB for Root file System Image */
85 reg = <0x00c00000 0x1F400000>;
86 label = "NAND RFS Image";
91 compatible = "fsl,b4qds-fpga", "fsl,fpga-qixis";
97 device_type = "memory";
101 #address-cells = <2>;
105 bman_fbpr: bman-fbpr {
106 size = <0 0x1000000>;
107 alignment = <0 0x1000000>;
111 alignment = <0 0x400000>;
113 qman_pfdr: qman-pfdr {
114 size = <0 0x2000000>;
115 alignment = <0 0x2000000>;
119 dcsr: dcsr@f00000000 {
120 ranges = <0x00000000 0xf 0x00000000 0x01052000>;
123 bportals: bman-portals@ff4000000 {
124 ranges = <0x0 0xf 0xf4000000 0x2000000>;
127 qportals: qman-portals@ff6000000 {
128 ranges = <0x0 0xf 0xf6000000 0x2000000>;
132 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
133 reg = <0xf 0xfe000000 0 0x00001000>;
136 #address-cells = <1>;
138 compatible = "sst,sst25wf040";
140 spi-max-frequency = <40000000>; /* input clock */
145 /*Disabled as there is no sdhc connector on B4420QDS board*/
151 compatible = "nxp,pca9547";
153 #address-cells = <1>;
157 #address-cells = <1>;
162 compatible = "at24,24c64";
166 compatible = "at24,24c256";
170 compatible = "at24,24c256";
174 compatible = "at24,24c256";
178 compatible = "dallas,ds3232";
184 #address-cells = <1>;
189 compatible = "ti,ina220";
191 shunt-resistor = <1000>;
196 #address-cells = <1>;
201 compatible = "adi,adt7461";
215 pci0: pcie@ffe200000 {
216 reg = <0xf 0xfe200000 0 0x10000>;
217 ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000
218 0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>;
220 ranges = <0x02000000 0 0xe0000000
221 0x02000000 0 0xe0000000
224 0x01000000 0 0x00000000
225 0x01000000 0 0x00000000
232 /include/ "b4si-post.dtsi"