arch/powerpc/boot/dts/mpc5121ads.dts

   1 /*
   2  * MPC5121E ADS Device Tree Source
   3  *
   4  * Copyright 2007,2008 Freescale Semiconductor Inc.
   5  *
   6  * This program is free software; you can redistribute  it and/or modify it
   7  * under  the terms of  the GNU General  Public License as published by the
   8  * Free Software Foundation;  either version 2 of the  License, or (at your
   9  * option) any later version.
  10  */
  11
  12 /dts-v1/;
  13
  14 / {
  15         model = "mpc5121ads";
  16         compatible = "fsl,mpc5121ads";
  17         #address-cells = <1>;
  18         #size-cells = <1>;
  19
  20         aliases {
  21                 pci = &pci;
  22         };
  23
  24         cpus {
  25                 #address-cells = <1>;
  26                 #size-cells = <0>;
  27
  28                 PowerPC,5121@0 {
  29                         device_type = "cpu";
  30                         reg = <0>;
  31                         d-cache-line-size = <0x20>;     // 32 bytes
  32                         i-cache-line-size = <0x20>;     // 32 bytes
  33                         d-cache-size = <0x8000>;        // L1, 32K
  34                         i-cache-size = <0x8000>;        // L1, 32K
  35                         timebase-frequency = <49500000>;// 49.5 MHz (csb/4)
  36                         bus-frequency = <198000000>;    // 198 MHz csb bus
  37                         clock-frequency = <396000000>;  // 396 MHz ppc core
  38                 };
  39         };
  40
  41         memory {
  42                 device_type = "memory";
  43                 reg = <0x00000000 0x10000000>;  // 256MB at 0
  44         };
  45
  46         mbx@20000000 {
  47                 compatible = "fsl,mpc5121-mbx";
  48                 reg = <0x20000000 0x4000>;
  49                 interrupts = <66 0x8>;
  50                 interrupt-parent = < &ipic >;
  51         };
  52
  53         sram@30000000 {
  54                 compatible = "fsl,mpc5121-sram";
  55                 reg = <0x30000000 0x20000>;             // 128K at 0x30000000
  56         };
  57
  58         nfc@40000000 {
  59                 compatible = "fsl,mpc5121-nfc";
  60                 reg = <0x40000000 0x100000>;    // 1M at 0x40000000
  61                 interrupts = <6 8>;
  62                 interrupt-parent = < &ipic >;
  63                 #address-cells = <1>;
  64                 #size-cells = <1>;
  65                 bank-width = <1>;
  66                 // ADS has two Hynix 512MB Nand flash chips in a single
  67                 // stacked package .
  68                 chips = <2>;
  69                 nand0@0 {
  70                         label = "nand0";
  71                         reg = <0x00000000 0x02000000>;  // first 32 MB of chip 0
  72                 };
  73                 nand1@20000000 {
  74                         label = "nand1";
  75                         reg = <0x20000000 0x02000000>;  // first 32 MB of chip 1
  76                 };
  77         };
  78
  79         localbus@80000020 {
  80                 compatible = "fsl,mpc5121-localbus";
  81                 #address-cells = <2>;
  82                 #size-cells = <1>;
  83                 reg = <0x80000020 0x40>;
  84
  85                 ranges = <0x0 0x0 0xfc000000 0x04000000
  86                           0x2 0x0 0x82000000 0x00008000>;
  87
  88                 flash@0,0 {
  89                         compatible = "cfi-flash";
  90                         reg = <0 0x0 0x4000000>;
  91                         #address-cells = <1>;
  92                         #size-cells = <1>;
  93                         bank-width = <4>;
  94                         device-width = <2>;
  95                         protected@0 {
  96                                 label = "protected";
  97                                 reg = <0x00000000 0x00040000>;  // first sector is protected
  98                                 read-only;
  99                         };
 100                         filesystem@40000 {
 101                                 label = "filesystem";
 102                                 reg = <0x00040000 0x03c00000>;  // 60M for filesystem
 103                         };
 104                         kernel@3c40000 {
 105                                 label = "kernel";
 106                                 reg = <0x03c40000 0x00280000>;  // 2.5M for kernel
 107                         };
 108                         device-tree@3ec0000 {
 109                                 label = "device-tree";
 110                                 reg = <0x03ec0000 0x00040000>;  // one sector for device tree
 111                         };
 112                         u-boot@3f00000 {
 113                                 label = "u-boot";
 114                                 reg = <0x03f00000 0x00100000>;  // 1M for u-boot
 115                                 read-only;
 116                         };
 117                 };
 118
 119                 board-control@2,0 {
 120                         compatible = "fsl,mpc5121ads-cpld";
 121                         reg = <0x2 0x0 0x8000>;
 122                 };
 123
 124                 cpld_pic: pic@2,a {
 125                         compatible = "fsl,mpc5121ads-cpld-pic";
 126                         interrupt-controller;
 127                         #interrupt-cells = <2>;
 128                         reg = <0x2 0xa 0x5>;
 129                         interrupt-parent = < &ipic >;
 130                         // irq routing
 131                         //      all irqs but touch screen are routed to irq0 (ipic 48)
 132                         //      touch screen is statically routed to irq1 (ipic 17)
 133                         //      so don't use it here
 134                         interrupts = <48 0x8>;
 135                 };
 136         };
 137
 138         soc@80000000 {
 139                 compatible = "fsl,mpc5121-immr";
 140                 #address-cells = <1>;
 141                 #size-cells = <1>;
 142                 #interrupt-cells = <2>;
 143                 ranges = <0x0 0x80000000 0x400000>;
 144                 reg = <0x80000000 0x400000>;
 145                 bus-frequency = <66000000>;     // 66 MHz ips bus
 146
 147
 148                 // IPIC
 149                 // interrupts cell = <intr #, sense>
 150                 // sense values match linux IORESOURCE_IRQ_* defines:
 151                 // sense == 8: Level, low assertion
 152                 // sense == 2: Edge, high-to-low change
 153                 //
 154                 ipic: interrupt-controller@c00 {
 155                         compatible = "fsl,mpc5121-ipic", "fsl,ipic";
 156                         interrupt-controller;
 157                         #address-cells = <0>;
 158                         #interrupt-cells = <2>;
 159                         reg = <0xc00 0x100>;
 160                 };
 161
 162                 rtc@a00 {       // Real time clock
 163                         compatible = "fsl,mpc5121-rtc";
 164                         reg = <0xa00 0x100>;
 165                         interrupts = <79 0x8 80 0x8>;
 166                         interrupt-parent = < &ipic >;
 167                 };
 168
 169                 clock@f00 {     // Clock control
 170                         compatible = "fsl,mpc5121-clock";
 171                         reg = <0xf00 0x100>;
 172                 };
 173
 174                 pmc@1000{  //Power Management Controller
 175                         compatible = "fsl,mpc5121-pmc";
 176                         reg = <0x1000 0x100>;
 177                         interrupts = <83 0x2>;
 178                         interrupt-parent = < &ipic >;
 179                 };
 180
 181                 gpio@1100 {
 182                         compatible = "fsl,mpc5121-gpio";
 183                         reg = <0x1100 0x100>;
 184                         interrupts = <78 0x8>;
 185                         interrupt-parent = < &ipic >;
 186                 };
 187
 188                 mscan@1300 {
 189                         compatible = "fsl,mpc5121-mscan";
 190                         cell-index = <0>;
 191                         interrupts = <12 0x8>;
 192                         interrupt-parent = < &ipic >;
 193                         reg = <0x1300 0x80>;
 194                 };
 195
 196                 mscan@1380 {
 197                         compatible = "fsl,mpc5121-mscan";
 198                         cell-index = <1>;
 199                         interrupts = <13 0x8>;
 200                         interrupt-parent = < &ipic >;
 201                         reg = <0x1380 0x80>;
 202                 };
 203
 204                 i2c@1700 {
 205                         #address-cells = <1>;
 206                         #size-cells = <0>;
 207                         compatible = "fsl,mpc5121-i2c", "fsl-i2c";
 208                         cell-index = <0>;
 209                         reg = <0x1700 0x20>;
 210                         interrupts = <9 0x8>;
 211                         interrupt-parent = < &ipic >;
 212                 };
 213
 214                 i2c@1720 {
 215                         #address-cells = <1>;
 216                         #size-cells = <0>;
 217                         compatible = "fsl,mpc5121-i2c", "fsl-i2c";
 218                         cell-index = <1>;
 219                         reg = <0x1720 0x20>;
 220                         interrupts = <10 0x8>;
 221                         interrupt-parent = < &ipic >;
 222                 };
 223
 224                 i2c@1740 {
 225                         #address-cells = <1>;
 226                         #size-cells = <0>;
 227                         compatible = "fsl,mpc5121-i2c", "fsl-i2c";
 228                         cell-index = <2>;
 229                         reg = <0x1740 0x20>;
 230                         interrupts = <11 0x8>;
 231                         interrupt-parent = < &ipic >;
 232                 };
 233
 234                 i2ccontrol@1760 {
 235                         compatible = "fsl,mpc5121-i2c-ctrl";
 236                         reg = <0x1760 0x8>;
 237                 };
 238
 239                 axe@2000 {
 240                         compatible = "fsl,mpc5121-axe";
 241                         reg = <0x2000 0x100>;
 242                         interrupts = <42 0x8>;
 243                         interrupt-parent = < &ipic >;
 244                 };
 245
 246                 display@2100 {
 247                         compatible = "fsl,mpc5121-diu", "fsl-diu";
 248                         reg = <0x2100 0x100>;
 249                         interrupts = <64 0x8>;
 250                         interrupt-parent = < &ipic >;
 251                 };
 252
 253                 mdio@2800 {
 254                         compatible = "fsl,mpc5121-fec-mdio";
 255                         reg = <0x2800 0x800>;
 256                         #address-cells = <1>;
 257                         #size-cells = <0>;
 258                         phy: ethernet-phy@0 {
 259                                 reg = <1>;
 260                                 device_type = "ethernet-phy";
 261                         };
 262                 };
 263
 264                 ethernet@2800 {
 265                         device_type = "network";
 266                         compatible = "fsl,mpc5121-fec";
 267                         reg = <0x2800 0x800>;
 268                         local-mac-address = [ 00 00 00 00 00 00 ];
 269                         interrupts = <4 0x8>;
 270                         interrupt-parent = < &ipic >;
 271                         phy-handle = < &phy >;
 272                         fsl,align-tx-packets = <4>;
 273                 };
 274
 275                 // 5121e has two dr usb modules
 276                 // mpc5121_ads only uses USB0
 277
 278                 // USB1 using external ULPI PHY
 279                 //usb@3000 {
 280                 //      compatible = "fsl,mpc5121-usb2-dr", "fsl-usb2-dr";
 281                 //      reg = <0x3000 0x1000>;
 282                 //      #address-cells = <1>;
 283                 //      #size-cells = <0>;
 284                 //      interrupt-parent = < &ipic >;
 285                 //      interrupts = <43 0x8>;
 286                 //      dr_mode = "otg";
 287                 //      phy_type = "ulpi";
 288                 //      port1;
 289                 //};
 290
 291                 // USB0 using internal UTMI PHY
 292                 usb@4000 {
 293                         compatible = "fsl,mpc5121-usb2-dr", "fsl-usb2-dr";
 294                         reg = <0x4000 0x1000>;
 295                         #address-cells = <1>;
 296                         #size-cells = <0>;
 297                         interrupt-parent = < &ipic >;
 298                         interrupts = <44 0x8>;
 299                         dr_mode = "otg";
 300                         phy_type = "utmi_wide";
 301                         port0;
 302                 };
 303
 304                 // IO control
 305                 ioctl@a000 {
 306                         compatible = "fsl,mpc5121-ioctl";
 307                         reg = <0xA000 0x1000>;
 308                 };
 309
 310                 pata@10200 {
 311                         compatible = "fsl,mpc5121-pata";
 312                         reg = <0x10200 0x100>;
 313                         interrupts = <5 0x8>;
 314                         interrupt-parent = < &ipic >;
 315                 };
 316
 317                 // 512x PSCs are not 52xx PSC compatible
 318                 // PSC3 serial port A aka ttyPSC0
 319                 serial@11300 {
 320                         device_type = "serial";
 321                         compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc";
 322                         // Logical port assignment needed until driver
 323                         // learns to use aliases
 324                         port-number = <0>;
 325                         cell-index = <3>;
 326                         reg = <0x11300 0x100>;
 327                         interrupts = <40 0x8>;
 328                         interrupt-parent = < &ipic >;
 329                         rx-fifo-size = <16>;
 330                         tx-fifo-size = <16>;
 331                 };
 332
 333                 // PSC4 serial port B aka ttyPSC1
 334                 serial@11400 {
 335                         device_type = "serial";
 336                         compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc";
 337                         // Logical port assignment needed until driver
 338                         // learns to use aliases
 339                         port-number = <1>;
 340                         cell-index = <4>;
 341                         reg = <0x11400 0x100>;
 342                         interrupts = <40 0x8>;
 343                         interrupt-parent = < &ipic >;
 344                         rx-fifo-size = <16>;
 345                         tx-fifo-size = <16>;
 346                 };
 347
 348                 // PSC5 in ac97 mode
 349                 ac97@11500 {
 350                         compatible = "fsl,mpc5121-psc-ac97", "fsl,mpc5121-psc";
 351                         cell-index = <5>;
 352                         reg = <0x11500 0x100>;
 353                         interrupts = <40 0x8>;
 354                         interrupt-parent = < &ipic >;
 355                         fsl,mode = "ac97-slave";
 356                         rx-fifo-size = <384>;
 357                         tx-fifo-size = <384>;
 358                 };
 359
 360                 pscfifo@11f00 {
 361                         compatible = "fsl,mpc5121-psc-fifo";
 362                         reg = <0x11f00 0x100>;
 363                         interrupts = <40 0x8>;
 364                         interrupt-parent = < &ipic >;
 365                 };
 366
 367                 dma@14000 {
 368                         compatible = "fsl,mpc5121-dma2";
 369                         reg = <0x14000 0x1800>;
 370                         interrupts = <65 0x8>;
 371                         interrupt-parent = < &ipic >;
 372                 };
 373
 374         };
 375
 376         pci: pci@80008500 {
 377                 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
 378                 interrupt-map = <
 379                                 // IDSEL 0x15 - Slot 1 PCI
 380                                  0xa800 0x0 0x0 0x1 &cpld_pic 0x0 0x8
 381                                  0xa800 0x0 0x0 0x2 &cpld_pic 0x1 0x8
 382                                  0xa800 0x0 0x0 0x3 &cpld_pic 0x2 0x8
 383                                  0xa800 0x0 0x0 0x4 &cpld_pic 0x3 0x8
 384
 385                                 // IDSEL 0x16 - Slot 2 MiniPCI
 386                                  0xb000 0x0 0x0 0x1 &cpld_pic 0x4 0x8
 387                                  0xb000 0x0 0x0 0x2 &cpld_pic 0x5 0x8
 388
 389                                 // IDSEL 0x17 - Slot 3 MiniPCI
 390                                  0xb800 0x0 0x0 0x1 &cpld_pic 0x6 0x8
 391                                  0xb800 0x0 0x0 0x2 &cpld_pic 0x7 0x8
 392                                 >;
 393                 interrupt-parent = < &ipic >;
 394                 interrupts = <1 0x8>;
 395                 bus-range = <0 0>;
 396                 ranges = <0x42000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
 397                           0x02000000 0x0 0xb0000000 0xb0000000 0x0 0x10000000
 398                           0x01000000 0x0 0x00000000 0x84000000 0x0 0x01000000>;
 399                 clock-frequency = <0>;
 400                 #interrupt-cells = <1>;
 401                 #size-cells = <2>;
 402                 #address-cells = <3>;
 403                 reg = <0x80008500 0x100         /* internal registers */
 404                        0x80008300 0x8>;         /* config space access registers */
 405                 compatible = "fsl,mpc5121-pci";
 406                 device_type = "pci";
 407         };
 408 };