arch/powerpc/boot/dts/t4240qds.dts

   1 /*
   2  * T4240QDS Device Tree Source
   3  *
   4  * Copyright 2012 Freescale Semiconductor Inc.
   5  *
   6  * Redistribution and use in source and binary forms, with or without
   7  * modification, are permitted provided that the following conditions are met:
   8  *     * Redistributions of source code must retain the above copyright
   9  *       notice, this list of conditions and the following disclaimer.
  10  *     * Redistributions in binary form must reproduce the above copyright
  11  *       notice, this list of conditions and the following disclaimer in the
  12  *       documentation and/or other materials provided with the distribution.
  13  *     * Neither the name of Freescale Semiconductor nor the
  14  *       names of its contributors may be used to endorse or promote products
  15  *       derived from this software without specific prior written permission.
  16  *
  17  *
  18  * ALTERNATIVELY, this software may be distributed under the terms of the
  19  * GNU General Public License ("GPL") as published by the Free Software
  20  * Foundation, either version 2 of that License or (at your option) any
  21  * later version.
  22  *
  23  * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  24  * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  25  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  26  * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  27  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  28  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  29  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  30  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  31  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  32  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  33  */
  34
  35 /include/ "fsl/t4240si-pre.dtsi"
  36
  37 / {
  38         model = "fsl,T4240QDS";
  39         compatible = "fsl,T4240QDS";
  40         #address-cells = <2>;
  41         #size-cells = <2>;
  42         interrupt-parent = <&mpic>;
  43
  44         ifc: localbus@ffe124000 {
  45                 reg = <0xf 0xfe124000 0 0x2000>;
  46                 ranges = <0 0 0xf 0xe8000000 0x08000000
  47                           2 0 0xf 0xff800000 0x00010000
  48                           3 0 0xf 0xffdf0000 0x00008000>;
  49
  50                 nor@0,0 {
  51                         #address-cells = <1>;
  52                         #size-cells = <1>;
  53                         compatible = "cfi-flash";
  54                         reg = <0x0 0x0 0x8000000>;
  55
  56                         bank-width = <2>;
  57                         device-width = <1>;
  58                 };
  59
  60                 nand@2,0 {
  61                         #address-cells = <1>;
  62                         #size-cells = <1>;
  63                         compatible = "fsl,ifc-nand";
  64                         reg = <0x2 0x0 0x10000>;
  65
  66                         partition@0 {
  67                                 /* This location must not be altered  */
  68                                 /* 1MB for u-boot Bootloader Image */
  69                                 reg = <0x0 0x00100000>;
  70                                 label = "NAND U-Boot Image";
  71                                 read-only;
  72                         };
  73
  74                         partition@100000 {
  75                                 /* 1MB for DTB Image */
  76                                 reg = <0x00100000 0x00100000>;
  77                                 label = "NAND DTB Image";
  78                         };
  79
  80                         partition@200000 {
  81                                 /* 10MB for Linux Kernel Image */
  82                                 reg = <0x00200000 0x00A00000>;
  83                                 label = "NAND Linux Kernel Image";
  84                         };
  85
  86                         partition@C00000 {
  87                                 /* 500MB for Root file System Image */
  88                                 reg = <0x00c00000 0x1F400000>;
  89                                 label = "NAND RFS Image";
  90                         };
  91                 };
  92
  93                 board-control@3,0 {
  94                         compatible = "fsl,t4240qds-fpga", "fsl,fpga-qixis";
  95                         reg = <3 0 0x300>;
  96                 };
  97         };
  98
  99         memory {
 100                 device_type = "memory";
 101         };
 102
 103         dcsr: dcsr@f00000000 {
 104                 ranges = <0x00000000 0xf 0x00000000 0x01072000>;
 105         };
 106
 107         soc: soc@ffe000000 {
 108                 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
 109                 reg = <0xf 0xfe000000 0 0x00001000>;
 110                 spi@110000 {
 111                         flash@0 {
 112                                 #address-cells = <1>;
 113                                 #size-cells = <1>;
 114                                 compatible = "sst,sst25wf040";
 115                                 reg = <0>;
 116                                 spi-max-frequency = <40000000>; /* input clock */
 117                         };
 118                 };
 119
 120                 i2c@118000 {
 121                         eeprom@51 {
 122                                 compatible = "at24,24c256";
 123                                 reg = <0x51>;
 124                         };
 125                         eeprom@52 {
 126                                 compatible = "at24,24c256";
 127                                 reg = <0x52>;
 128                         };
 129                         eeprom@53 {
 130                                 compatible = "at24,24c256";
 131                                 reg = <0x53>;
 132                         };
 133                         eeprom@54 {
 134                                 compatible = "at24,24c256";
 135                                 reg = <0x54>;
 136                         };
 137                         eeprom@55 {
 138                                 compatible = "at24,24c256";
 139                                 reg = <0x55>;
 140                         };
 141                         eeprom@56 {
 142                                 compatible = "at24,24c256";
 143                                 reg = <0x56>;
 144                         };
 145                         rtc@68 {
 146                                 compatible = "dallas,ds3232";
 147                                 reg = <0x68>;
 148                                 interrupts = <0x1 0x1 0 0>;
 149                         };
 150                 };
 151         };
 152
 153         pci0: pcie@ffe240000 {
 154                 reg = <0xf 0xfe240000 0 0x10000>;
 155                 ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000
 156                           0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>;
 157                 pcie@0 {
 158                         ranges = <0x02000000 0 0xe0000000
 159                                   0x02000000 0 0xe0000000
 160                                   0 0x20000000
 161
 162                                   0x01000000 0 0x00000000
 163                                   0x01000000 0 0x00000000
 164                                   0 0x00010000>;
 165                 };
 166         };
 167
 168         pci1: pcie@ffe250000 {
 169                 reg = <0xf 0xfe250000 0 0x10000>;
 170                 ranges = <0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
 171                           0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000>;
 172                 pcie@0 {
 173                         ranges = <0x02000000 0 0xe0000000
 174                                   0x02000000 0 0xe0000000
 175                                   0 0x20000000
 176
 177                                   0x01000000 0 0x00000000
 178                                   0x01000000 0 0x00000000
 179                                   0 0x00010000>;
 180                 };
 181         };
 182
 183         pci2: pcie@ffe260000 {
 184                 reg = <0xf 0xfe260000 0 0x1000>;
 185                 ranges = <0x02000000 0 0xe0000000 0xc 0x40000000 0 0x20000000
 186                           0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>;
 187                 pcie@0 {
 188                         ranges = <0x02000000 0 0xe0000000
 189                                   0x02000000 0 0xe0000000
 190                                   0 0x20000000
 191
 192                                   0x01000000 0 0x00000000
 193                                   0x01000000 0 0x00000000
 194                                   0 0x00010000>;
 195                 };
 196         };
 197
 198         pci3: pcie@ffe270000 {
 199                 reg = <0xf 0xfe270000 0 0x10000>;
 200                 ranges = <0x02000000 0 0xe0000000 0xc 0x60000000 0 0x20000000
 201                           0x01000000 0 0x00000000 0xf 0xf8030000 0 0x00010000>;
 202                 pcie@0 {
 203                         ranges = <0x02000000 0 0xe0000000
 204                                   0x02000000 0 0xe0000000
 205                                   0 0x20000000
 206
 207                                   0x01000000 0 0x00000000
 208                                   0x01000000 0 0x00000000
 209                                   0 0x00010000>;
 210                 };
 211         };
 212         rio: rapidio@ffe0c0000 {
 213                 reg = <0xf 0xfe0c0000 0 0x11000>;
 214
 215                 port1 {
 216                         ranges = <0 0 0xc 0x20000000 0 0x10000000>;
 217                 };
 218                 port2 {
 219                         ranges = <0 0 0xc 0x30000000 0 0x10000000>;
 220                 };
 221         };
 222 };
 223
 224 /include/ "fsl/t4240si-post.dtsi"