2 * Device Tree Source for IBM Walnut
4 * Copyright 2007 IBM Corp.
5 * Josh Boyer <jwboyer@linux.vnet.ibm.com>
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without
9 * any warranty of any kind, whether express or implied.
16 compatible = "ibm,walnut";
17 dcr-parent = <&/cpus/cpu@0>;
31 model = "PowerPC,405GP";
33 clock-frequency = <bebc200>; /* Filled in by zImage */
34 timebase-frequency = <0>; /* Filled in by zImage */
35 i-cache-line-size = <20>;
36 d-cache-line-size = <20>;
37 i-cache-size = <4000>;
38 d-cache-size = <4000>;
40 dcr-access-method = "native";
45 device_type = "memory";
46 reg = <0 0>; /* Filled in by zImage */
49 UIC0: interrupt-controller {
50 compatible = "ibm,uic";
56 #interrupt-cells = <2>;
60 compatible = "ibm,plb3";
64 clock-frequency = <0>; /* Filled in by zImage */
66 SDRAM0: memory-controller {
67 compatible = "ibm,sdram-405gp";
72 compatible = "ibm,mcmal-405gp", "ibm,mcmal";
76 interrupt-parent = <&UIC0>;
86 compatible = "ibm,opb-405gp", "ibm,opb";
89 ranges = <ef600000 ef600000 a00000>;
91 clock-frequency = <0>; /* Filled in by zImage */
93 UART0: serial@ef600300 {
94 device_type = "serial";
95 compatible = "ns16550";
97 virtual-reg = <ef600300>;
98 clock-frequency = <0>; /* Filled in by zImage */
99 current-speed = <2580>;
100 interrupt-parent = <&UIC0>;
104 UART1: serial@ef600400 {
105 device_type = "serial";
106 compatible = "ns16550";
108 virtual-reg = <ef600400>;
109 clock-frequency = <0>; /* Filled in by zImage */
110 current-speed = <2580>;
111 interrupt-parent = <&UIC0>;
116 compatible = "ibm,iic-405gp", "ibm,iic";
118 interrupt-parent = <&UIC0>;
122 GPIO: gpio@ef600700 {
123 compatible = "ibm,gpio-405gp";
127 EMAC: ethernet@ef600800 {
128 linux,network-index = <0>;
129 device_type = "network";
130 compatible = "ibm,emac-405gp", "ibm,emac";
131 interrupt-parent = <&UIC0>;
134 9 4 /* Ethernet Wake Up */>;
135 local-mac-address = [000000000000]; /* Filled in by zImage */
138 mal-tx-channel = <0>;
139 mal-rx-channel = <0>;
141 max-frame-size = <5dc>;
142 rx-fifo-size = <1000>;
143 tx-fifo-size = <800>;
145 phy-map = <00000001>;
151 compatible = "ibm,ebc-405gp", "ibm,ebc";
153 #address-cells = <2>;
155 /* The ranges property is supplied by the bootwrapper
156 * and is based on the firmware's configuration of the
159 clock-frequency = <0>; /* Filled in by zImage */
166 compatible = "jedec-flash";
168 reg = <0 80000 80000>;
169 #address-cells = <1>;
180 compatible = "ds1743";
185 compatible = "intel,82C42PC";
190 compatible = "ti,TIR2000PAG";
195 compatible = "Walnut-FPGA";
197 virtual-reg = <f0300005>;
203 #interrupt-cells = <1>;
205 #address-cells = <3>;
206 compatible = "ibm,plb405gp-pci", "ibm,plb-pci";
208 reg = <eec00000 8 /* Config space access */
209 eed80000 4 /* IACK */
210 eed80000 4 /* Special cycle */
211 ef480000 40>; /* Internal registers */
213 /* Outbound ranges, one memory and one IO,
214 * later cannot be changed. Chip supports a second
215 * IO range but we don't use it for now
217 ranges = <02000000 0 80000000 80000000 0 20000000
218 01000000 0 00000000 e8000000 0 00010000>;
220 /* Inbound 2GB range starting at 0 */
221 dma-ranges = <42000000 0 0 0 0 80000000>;
223 /* Walnut has all 4 IRQ pins tied together per slot */
224 interrupt-map-mask = <f800 0 0 0>;
227 0800 0 0 0 &UIC0 1c 8
230 1000 0 0 0 &UIC0 1d 8
233 1800 0 0 0 &UIC0 1e 8
236 2000 0 0 0 &UIC0 1f 8
242 linux,stdout-path = "/plb/opb/serial@ef600300";