2 * Copyright (C) 2001 Dave Engebretsen & Todd Inglett IBM Corporation.
3 * Copyright 2001-2012 IBM Corporation.
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 #ifndef _POWERPC_EEH_H
21 #define _POWERPC_EEH_H
24 #include <linux/init.h>
25 #include <linux/list.h>
26 #include <linux/string.h>
27 #include <linux/time.h>
36 * The struct is used to trace PE related EEH functionality.
37 * In theory, there will have one instance of the struct to
38 * be created against particular PE. In nature, PEs corelate
39 * to each other. the struct has to reflect that hierarchy in
40 * order to easily pick up those affected PEs when one particular
43 * Also, one particular PE might be composed of PCI device, PCI
44 * bus and its subordinate components. The struct also need ship
45 * the information. Further more, one particular PE is only meaingful
46 * in the corresponding PHB. Therefore, the root PEs should be created
47 * against existing PHBs in on-to-one fashion.
49 #define EEH_PE_INVALID (1 << 0) /* Invalid */
50 #define EEH_PE_PHB (1 << 1) /* PHB PE */
51 #define EEH_PE_DEVICE (1 << 2) /* Device PE */
52 #define EEH_PE_BUS (1 << 3) /* Bus PE */
54 #define EEH_PE_ISOLATED (1 << 0) /* Isolated PE */
55 #define EEH_PE_RECOVERING (1 << 1) /* Recovering PE */
56 #define EEH_PE_RESET (1 << 2) /* PE reset in progress */
58 #define EEH_PE_KEEP (1 << 8) /* Keep PE on hotplug */
61 int type; /* PE type: PHB/Bus/Device */
62 int state; /* PE EEH dependent mode */
63 int config_addr; /* Traditional PCI address */
64 int addr; /* PE configuration address */
65 struct pci_controller *phb; /* Associated PHB */
66 struct pci_bus *bus; /* Top PCI bus for bus PE */
67 int check_count; /* Times of ignored error */
68 int freeze_count; /* Times of froze up */
69 struct timeval tstamp; /* Time on first-time freeze */
70 int false_positives; /* Times of reported #ff's */
71 struct eeh_pe *parent; /* Parent PE */
72 struct list_head child_list; /* Link PE to the child list */
73 struct list_head edevs; /* Link list of EEH devices */
74 struct list_head child; /* Child PEs */
77 #define eeh_pe_for_each_dev(pe, edev, tmp) \
78 list_for_each_entry_safe(edev, tmp, &pe->edevs, list)
81 * The struct is used to trace EEH state for the associated
82 * PCI device node or PCI device. In future, it might
83 * represent PE as well so that the EEH device to form
84 * another tree except the currently existing tree of PCI
85 * buses and PCI devices
87 #define EEH_DEV_BRIDGE (1 << 0) /* PCI bridge */
88 #define EEH_DEV_ROOT_PORT (1 << 1) /* PCIe root port */
89 #define EEH_DEV_DS_PORT (1 << 2) /* Downstream port */
90 #define EEH_DEV_IRQ_DISABLED (1 << 3) /* Interrupt disabled */
91 #define EEH_DEV_DISCONNECTED (1 << 4) /* Removing from PE */
93 #define EEH_DEV_NO_HANDLER (1 << 8) /* No error handler */
94 #define EEH_DEV_SYSFS (1 << 9) /* Sysfs created */
97 int mode; /* EEH mode */
98 int class_code; /* Class code of the device */
99 int config_addr; /* Config address */
100 int pe_config_addr; /* PE config address */
101 u32 config_space[16]; /* Saved PCI config space */
102 int pcix_cap; /* Saved PCIx capability */
103 int pcie_cap; /* Saved PCIe capability */
104 int aer_cap; /* Saved AER capability */
105 struct eeh_pe *pe; /* Associated PE */
106 struct list_head list; /* Form link list in the PE */
107 struct pci_controller *phb; /* Associated PHB */
108 struct device_node *dn; /* Associated device node */
109 struct pci_dev *pdev; /* Associated PCI device */
110 struct pci_bus *bus; /* PCI bus for partial hotplug */
113 static inline struct device_node *eeh_dev_to_of_node(struct eeh_dev *edev)
115 return edev ? edev->dn : NULL;
118 static inline struct pci_dev *eeh_dev_to_pci_dev(struct eeh_dev *edev)
120 return edev ? edev->pdev : NULL;
123 /* Return values from eeh_ops::next_error */
125 EEH_NEXT_ERR_NONE = 0,
127 EEH_NEXT_ERR_FROZEN_PE,
128 EEH_NEXT_ERR_FENCED_PHB,
129 EEH_NEXT_ERR_DEAD_PHB,
130 EEH_NEXT_ERR_DEAD_IOC
134 * The struct is used to trace the registered EEH operation
135 * callback functions. Actually, those operation callback
136 * functions are heavily platform dependent. That means the
137 * platform should register its own EEH operation callback
138 * functions before any EEH further operations.
140 #define EEH_OPT_DISABLE 0 /* EEH disable */
141 #define EEH_OPT_ENABLE 1 /* EEH enable */
142 #define EEH_OPT_THAW_MMIO 2 /* MMIO enable */
143 #define EEH_OPT_THAW_DMA 3 /* DMA enable */
144 #define EEH_STATE_UNAVAILABLE (1 << 0) /* State unavailable */
145 #define EEH_STATE_NOT_SUPPORT (1 << 1) /* EEH not supported */
146 #define EEH_STATE_RESET_ACTIVE (1 << 2) /* Active reset */
147 #define EEH_STATE_MMIO_ACTIVE (1 << 3) /* Active MMIO */
148 #define EEH_STATE_DMA_ACTIVE (1 << 4) /* Active DMA */
149 #define EEH_STATE_MMIO_ENABLED (1 << 5) /* MMIO enabled */
150 #define EEH_STATE_DMA_ENABLED (1 << 6) /* DMA enabled */
151 #define EEH_RESET_DEACTIVATE 0 /* Deactivate the PE reset */
152 #define EEH_RESET_HOT 1 /* Hot reset */
153 #define EEH_RESET_FUNDAMENTAL 3 /* Fundamental reset */
154 #define EEH_LOG_TEMP 1 /* EEH temporary error log */
155 #define EEH_LOG_PERM 2 /* EEH permanent error log */
160 int (*post_init)(void);
161 void* (*of_probe)(struct device_node *dn, void *flag);
162 int (*dev_probe)(struct pci_dev *dev, void *flag);
163 int (*set_option)(struct eeh_pe *pe, int option);
164 int (*get_pe_addr)(struct eeh_pe *pe);
165 int (*get_state)(struct eeh_pe *pe, int *state);
166 int (*reset)(struct eeh_pe *pe, int option);
167 int (*wait_state)(struct eeh_pe *pe, int max_wait);
168 int (*get_log)(struct eeh_pe *pe, int severity, char *drv_log, unsigned long len);
169 int (*configure_bridge)(struct eeh_pe *pe);
170 int (*read_config)(struct device_node *dn, int where, int size, u32 *val);
171 int (*write_config)(struct device_node *dn, int where, int size, u32 val);
172 int (*next_error)(struct eeh_pe **pe);
173 int (*restore_config)(struct device_node *dn);
176 extern struct eeh_ops *eeh_ops;
177 extern bool eeh_subsystem_enabled;
178 extern raw_spinlock_t confirm_error_lock;
179 extern int eeh_probe_mode;
181 static inline bool eeh_enabled(void)
183 return eeh_subsystem_enabled;
186 static inline void eeh_set_enable(bool mode)
188 eeh_subsystem_enabled = mode;
191 #define EEH_PROBE_MODE_DEV (1<<0) /* From PCI device */
192 #define EEH_PROBE_MODE_DEVTREE (1<<1) /* From device tree */
194 static inline void eeh_probe_mode_set(int flag)
196 eeh_probe_mode = flag;
199 static inline int eeh_probe_mode_devtree(void)
201 return (eeh_probe_mode == EEH_PROBE_MODE_DEVTREE);
204 static inline int eeh_probe_mode_dev(void)
206 return (eeh_probe_mode == EEH_PROBE_MODE_DEV);
209 static inline void eeh_serialize_lock(unsigned long *flags)
211 raw_spin_lock_irqsave(&confirm_error_lock, *flags);
214 static inline void eeh_serialize_unlock(unsigned long flags)
216 raw_spin_unlock_irqrestore(&confirm_error_lock, flags);
220 * Max number of EEH freezes allowed before we consider the device
221 * to be permanently disabled.
223 #define EEH_MAX_ALLOWED_FREEZES 5
225 typedef void *(*eeh_traverse_func)(void *data, void *flag);
226 int eeh_phb_pe_create(struct pci_controller *phb);
227 struct eeh_pe *eeh_phb_pe_get(struct pci_controller *phb);
228 struct eeh_pe *eeh_pe_get(struct eeh_dev *edev);
229 int eeh_add_to_parent_pe(struct eeh_dev *edev);
230 int eeh_rmv_from_parent_pe(struct eeh_dev *edev);
231 void eeh_pe_update_time_stamp(struct eeh_pe *pe);
232 void *eeh_pe_traverse(struct eeh_pe *root,
233 eeh_traverse_func fn, void *flag);
234 void *eeh_pe_dev_traverse(struct eeh_pe *root,
235 eeh_traverse_func fn, void *flag);
236 void eeh_pe_restore_bars(struct eeh_pe *pe);
237 struct pci_bus *eeh_pe_bus_get(struct eeh_pe *pe);
239 void *eeh_dev_init(struct device_node *dn, void *data);
240 void eeh_dev_phb_init_dynamic(struct pci_controller *phb);
242 int __init eeh_ops_register(struct eeh_ops *ops);
243 int __exit eeh_ops_unregister(const char *name);
244 unsigned long eeh_check_failure(const volatile void __iomem *token,
246 int eeh_dev_check_failure(struct eeh_dev *edev);
247 void eeh_addr_cache_build(void);
248 void eeh_add_device_early(struct device_node *);
249 void eeh_add_device_tree_early(struct device_node *);
250 void eeh_add_device_late(struct pci_dev *);
251 void eeh_add_device_tree_late(struct pci_bus *);
252 void eeh_add_sysfs_files(struct pci_bus *);
253 void eeh_remove_device(struct pci_dev *);
256 * EEH_POSSIBLE_ERROR() -- test for possible MMIO failure.
258 * If this macro yields TRUE, the caller relays to eeh_check_failure()
259 * which does further tests out of line.
261 #define EEH_POSSIBLE_ERROR(val, type) ((val) == (type)~0 && eeh_enabled())
264 * Reads from a device which has been isolated by EEH will return
265 * all 1s. This macro gives an all-1s value of the given size (in
266 * bytes: 1, 2, or 4) for comparing with the result of a read.
268 #define EEH_IO_ERROR_VALUE(size) (~0U >> ((4 - (size)) * 8))
270 #else /* !CONFIG_EEH */
272 static inline bool eeh_enabled(void)
277 static inline void eeh_set_enable(bool mode) { }
279 static inline int eeh_init(void)
284 static inline void *eeh_dev_init(struct device_node *dn, void *data)
289 static inline void eeh_dev_phb_init_dynamic(struct pci_controller *phb) { }
291 static inline unsigned long eeh_check_failure(const volatile void __iomem *token, unsigned long val)
296 #define eeh_dev_check_failure(x) (0)
298 static inline void eeh_addr_cache_build(void) { }
300 static inline void eeh_add_device_early(struct device_node *dn) { }
302 static inline void eeh_add_device_tree_early(struct device_node *dn) { }
304 static inline void eeh_add_device_late(struct pci_dev *dev) { }
306 static inline void eeh_add_device_tree_late(struct pci_bus *bus) { }
308 static inline void eeh_add_sysfs_files(struct pci_bus *bus) { }
310 static inline void eeh_remove_device(struct pci_dev *dev) { }
312 #define EEH_POSSIBLE_ERROR(val, type) (0)
313 #define EEH_IO_ERROR_VALUE(size) (-1UL)
314 #endif /* CONFIG_EEH */
318 * MMIO read/write operations with EEH support.
320 static inline u8 eeh_readb(const volatile void __iomem *addr)
323 if (EEH_POSSIBLE_ERROR(val, u8))
324 return eeh_check_failure(addr, val);
328 static inline u16 eeh_readw(const volatile void __iomem *addr)
330 u16 val = in_le16(addr);
331 if (EEH_POSSIBLE_ERROR(val, u16))
332 return eeh_check_failure(addr, val);
336 static inline u32 eeh_readl(const volatile void __iomem *addr)
338 u32 val = in_le32(addr);
339 if (EEH_POSSIBLE_ERROR(val, u32))
340 return eeh_check_failure(addr, val);
344 static inline u64 eeh_readq(const volatile void __iomem *addr)
346 u64 val = in_le64(addr);
347 if (EEH_POSSIBLE_ERROR(val, u64))
348 return eeh_check_failure(addr, val);
352 static inline u16 eeh_readw_be(const volatile void __iomem *addr)
354 u16 val = in_be16(addr);
355 if (EEH_POSSIBLE_ERROR(val, u16))
356 return eeh_check_failure(addr, val);
360 static inline u32 eeh_readl_be(const volatile void __iomem *addr)
362 u32 val = in_be32(addr);
363 if (EEH_POSSIBLE_ERROR(val, u32))
364 return eeh_check_failure(addr, val);
368 static inline u64 eeh_readq_be(const volatile void __iomem *addr)
370 u64 val = in_be64(addr);
371 if (EEH_POSSIBLE_ERROR(val, u64))
372 return eeh_check_failure(addr, val);
376 static inline void eeh_memcpy_fromio(void *dest, const
377 volatile void __iomem *src,
380 _memcpy_fromio(dest, src, n);
382 /* Look for ffff's here at dest[n]. Assume that at least 4 bytes
383 * were copied. Check all four bytes.
385 if (n >= 4 && EEH_POSSIBLE_ERROR(*((u32 *)(dest + n - 4)), u32))
386 eeh_check_failure(src, *((u32 *)(dest + n - 4)));
389 /* in-string eeh macros */
390 static inline void eeh_readsb(const volatile void __iomem *addr, void * buf,
393 _insb(addr, buf, ns);
394 if (EEH_POSSIBLE_ERROR((*(((u8*)buf)+ns-1)), u8))
395 eeh_check_failure(addr, *(u8*)buf);
398 static inline void eeh_readsw(const volatile void __iomem *addr, void * buf,
401 _insw(addr, buf, ns);
402 if (EEH_POSSIBLE_ERROR((*(((u16*)buf)+ns-1)), u16))
403 eeh_check_failure(addr, *(u16*)buf);
406 static inline void eeh_readsl(const volatile void __iomem *addr, void * buf,
409 _insl(addr, buf, nl);
410 if (EEH_POSSIBLE_ERROR((*(((u32*)buf)+nl-1)), u32))
411 eeh_check_failure(addr, *(u32*)buf);
414 #endif /* CONFIG_PPC64 */
415 #endif /* __KERNEL__ */
416 #endif /* _POWERPC_EEH_H */