1 #ifndef _ASM_POWERPC_EXCEPTION_H
2 #define _ASM_POWERPC_EXCEPTION_H
4 * Extracted from head_64.S
7 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
9 * Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP
10 * Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu>
11 * Adapted for Power Macintosh by Paul Mackerras.
12 * Low-level exception handlers and MMU support
13 * rewritten by Paul Mackerras.
14 * Copyright (C) 1996 Paul Mackerras.
16 * Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and
17 * Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com
19 * This file contains the low-level support and setup for the
20 * PowerPC-64 platform, including trap and interrupt dispatch.
22 * This program is free software; you can redistribute it and/or
23 * modify it under the terms of the GNU General Public License
24 * as published by the Free Software Foundation; either version
25 * 2 of the License, or (at your option) any later version.
28 * The following macros define the code that appears as
29 * the prologue to each of the exception handlers. They
30 * are split into two parts to allow a single kernel binary
31 * to be used for pSeries and iSeries.
33 * We make as much of the exception code common between native
34 * exception handlers (including pSeries LPAR) and iSeries LPAR
35 * implementations as possible.
50 #define EX_PPR 88 /* SMT thread status register (priority) */
52 #ifdef CONFIG_RELOCATABLE
53 #define __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \
54 ld r12,PACAKBASE(r13); /* get high part of &label */ \
55 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \
56 LOAD_HANDLER(r12,label); \
58 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \
60 mtmsrd r10,1; /* Set RI (EE=0) */ \
63 /* If not relocatable, we can jump directly -- and save messing with LR */
64 #define __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \
65 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \
66 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \
68 mtmsrd r10,1; /* Set RI (EE=0) */ \
71 #define EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \
72 __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \
75 * As EXCEPTION_PROLOG_PSERIES(), except we've already got relocation on
76 * so no need to rfid. Save lr in case we're CONFIG_RELOCATABLE, in which
77 * case EXCEPTION_RELON_PROLOG_PSERIES_1 will be using lr.
79 #define EXCEPTION_RELON_PROLOG_PSERIES(area, label, h, extra, vec) \
80 EXCEPTION_PROLOG_0(area); \
81 EXCEPTION_PROLOG_1(area, extra, vec); \
82 EXCEPTION_RELON_PROLOG_PSERIES_1(label, h)
85 * We're short on space and time in the exception prolog, so we can't
86 * use the normal SET_REG_IMMEDIATE macro. Normally we just need the
87 * low halfword of the address, but for Kdump we need the whole low
90 #define LOAD_HANDLER(reg, label) \
91 /* Handlers must be within 64K of kbase, which must be 64k aligned */ \
92 ori reg,reg,(label)-_stext; /* virt addr of handler ... */
94 /* Exception register prefixes */
98 #if defined(CONFIG_RELOCATABLE)
100 * If we support interrupts with relocation on AND we're a relocatable
101 * kernel, we need to use LR to get to the 2nd level handler. So, save/restore
104 #define SAVE_LR(reg, area) mflr reg ; std reg,area+EX_LR(r13)
105 #define GET_LR(reg, area) ld reg,area+EX_LR(r13)
106 #define RESTORE_LR(reg, area) ld reg,area+EX_LR(r13) ; mtlr reg
108 /* ...else LR is unused and in register. */
109 #define SAVE_LR(reg, area)
110 #define GET_LR(reg, area) mflr reg
111 #define RESTORE_LR(reg, area)
115 * PPR save/restore macros used in exceptions_64s.S
116 * Used for P7 or later processors
118 #define SAVE_PPR(area, ra, rb) \
119 BEGIN_FTR_SECTION_NESTED(940) \
120 ld ra,PACACURRENT(r13); \
121 ld rb,area+EX_PPR(r13); /* Read PPR from paca */ \
122 std rb,TASKTHREADPPR(ra); \
123 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,940)
125 #define RESTORE_PPR_PACA(area, ra) \
126 BEGIN_FTR_SECTION_NESTED(941) \
127 ld ra,area+EX_PPR(r13); \
129 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,941)
132 * Increase the priority on systems where PPR save/restore is not
133 * implemented/ supported.
135 #define HMT_MEDIUM_PPR_DISCARD \
136 BEGIN_FTR_SECTION_NESTED(942) \
138 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,0,942) /*non P7*/
141 * Get an SPR into a register if the CPU has the given feature
143 #define OPT_GET_SPR(ra, spr, ftr) \
144 BEGIN_FTR_SECTION_NESTED(943) \
146 END_FTR_SECTION_NESTED(ftr,ftr,943)
149 * Save a register to the PACA if the CPU has the given feature
151 #define OPT_SAVE_REG_TO_PACA(offset, ra, ftr) \
152 BEGIN_FTR_SECTION_NESTED(943) \
153 std ra,offset(r13); \
154 END_FTR_SECTION_NESTED(ftr,ftr,943)
156 #define EXCEPTION_PROLOG_0(area) \
158 std r9,area+EX_R9(r13); /* save r9 */ \
159 OPT_GET_SPR(r9, SPRN_PPR, CPU_FTR_HAS_PPR); \
161 std r10,area+EX_R10(r13); /* save r10 - r12 */ \
162 OPT_GET_SPR(r10, SPRN_CFAR, CPU_FTR_CFAR)
164 #define __EXCEPTION_PROLOG_1(area, extra, vec) \
165 OPT_SAVE_REG_TO_PACA(area+EX_PPR, r9, CPU_FTR_HAS_PPR); \
166 OPT_SAVE_REG_TO_PACA(area+EX_CFAR, r10, CPU_FTR_CFAR); \
167 SAVE_LR(r10, area); \
170 std r11,area+EX_R11(r13); \
171 std r12,area+EX_R12(r13); \
173 std r10,area+EX_R13(r13)
174 #define EXCEPTION_PROLOG_1(area, extra, vec) \
175 __EXCEPTION_PROLOG_1(area, extra, vec)
177 #define __EXCEPTION_PROLOG_PSERIES_1(label, h) \
178 ld r12,PACAKBASE(r13); /* get high part of &label */ \
179 ld r10,PACAKMSR(r13); /* get MSR value for kernel */ \
180 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \
181 LOAD_HANDLER(r12,label) \
182 mtspr SPRN_##h##SRR0,r12; \
183 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \
184 mtspr SPRN_##h##SRR1,r10; \
186 b . /* prevent speculative execution */
187 #define EXCEPTION_PROLOG_PSERIES_1(label, h) \
188 __EXCEPTION_PROLOG_PSERIES_1(label, h)
190 #define EXCEPTION_PROLOG_PSERIES(area, label, h, extra, vec) \
191 EXCEPTION_PROLOG_0(area); \
192 EXCEPTION_PROLOG_1(area, extra, vec); \
193 EXCEPTION_PROLOG_PSERIES_1(label, h);
195 #define __KVMTEST(n) \
196 lbz r10,HSTATE_IN_GUEST(r13); \
200 #define __KVM_HANDLER(area, h, n) \
202 ld r10,area+EX_R10(r13); \
203 stw r9,HSTATE_SCRATCH1(r13); \
204 ld r9,area+EX_R9(r13); \
205 std r12,HSTATE_SCRATCH0(r13); \
209 #define __KVM_HANDLER_SKIP(area, h, n) \
211 cmpwi r10,KVM_GUEST_MODE_SKIP; \
212 ld r10,area+EX_R10(r13); \
214 stw r9,HSTATE_SCRATCH1(r13); \
215 ld r9,area+EX_R9(r13); \
216 std r12,HSTATE_SCRATCH0(r13); \
218 b kvmppc_interrupt; \
219 89: mtocrf 0x80,r9; \
220 ld r9,area+EX_R9(r13); \
221 b kvmppc_skip_##h##interrupt
223 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER
224 #define KVMTEST(n) __KVMTEST(n)
225 #define KVM_HANDLER(area, h, n) __KVM_HANDLER(area, h, n)
226 #define KVM_HANDLER_SKIP(area, h, n) __KVM_HANDLER_SKIP(area, h, n)
230 #define KVM_HANDLER(area, h, n)
231 #define KVM_HANDLER_SKIP(area, h, n)
234 #ifdef CONFIG_KVM_BOOK3S_PR
235 #define KVMTEST_PR(n) __KVMTEST(n)
236 #define KVM_HANDLER_PR(area, h, n) __KVM_HANDLER(area, h, n)
237 #define KVM_HANDLER_PR_SKIP(area, h, n) __KVM_HANDLER_SKIP(area, h, n)
240 #define KVMTEST_PR(n)
241 #define KVM_HANDLER_PR(area, h, n)
242 #define KVM_HANDLER_PR_SKIP(area, h, n)
248 * The common exception prolog is used for all except a few exceptions
249 * such as a segment miss on a kernel address. We have to be prepared
250 * to take another exception from the point where we first touch the
251 * kernel stack onwards.
253 * On entry r13 points to the paca, r9-r13 are saved in the paca,
254 * r9 contains the saved CR, r11 and r12 contain the saved SRR0 and
255 * SRR1, and relocation is on.
257 #define EXCEPTION_PROLOG_COMMON(n, area) \
258 andi. r10,r12,MSR_PR; /* See if coming from user */ \
259 mr r10,r1; /* Save r1 */ \
260 subi r1,r1,INT_FRAME_SIZE; /* alloc frame on kernel stack */ \
262 ld r1,PACAKSAVE(r13); /* kernel stack to use */ \
263 1: cmpdi cr1,r1,0; /* check if r1 is in userspace */ \
264 blt+ cr1,3f; /* abort if it is */ \
265 li r1,(n); /* will be reloaded later */ \
266 sth r1,PACA_TRAP_SAVE(r13); \
267 std r3,area+EX_R3(r13); \
268 addi r3,r13,area; /* r3 -> where regs are saved*/ \
269 RESTORE_LR(r1, area); \
271 3: std r9,_CCR(r1); /* save CR in stackframe */ \
272 std r11,_NIP(r1); /* save SRR0 in stackframe */ \
273 std r12,_MSR(r1); /* save SRR1 in stackframe */ \
274 std r10,0(r1); /* make stack chain pointer */ \
275 std r0,GPR0(r1); /* save r0 in stackframe */ \
276 std r10,GPR1(r1); /* save r1 in stackframe */ \
277 beq 4f; /* if from kernel mode */ \
278 ACCOUNT_CPU_USER_ENTRY(r9, r10); \
279 SAVE_PPR(area, r9, r10); \
280 4: std r2,GPR2(r1); /* save r2 in stackframe */ \
281 SAVE_4GPRS(3, r1); /* save r3 - r6 in stackframe */ \
282 SAVE_2GPRS(7, r1); /* save r7, r8 in stackframe */ \
283 ld r9,area+EX_R9(r13); /* move r9, r10 to stackframe */ \
284 ld r10,area+EX_R10(r13); \
287 ld r9,area+EX_R11(r13); /* move r11 - r13 to stackframe */ \
288 ld r10,area+EX_R12(r13); \
289 ld r11,area+EX_R13(r13); \
293 BEGIN_FTR_SECTION_NESTED(66); \
294 ld r10,area+EX_CFAR(r13); \
295 std r10,ORIG_GPR3(r1); \
296 END_FTR_SECTION_NESTED(CPU_FTR_CFAR, CPU_FTR_CFAR, 66); \
297 GET_LR(r9,area); /* Get LR, later save to stack */ \
298 ld r2,PACATOC(r13); /* get kernel TOC into r2 */ \
300 mfctr r10; /* save CTR in stackframe */ \
302 lbz r10,PACASOFTIRQEN(r13); \
303 mfspr r11,SPRN_XER; /* save XER in stackframe */ \
307 std r9,_TRAP(r1); /* set trap number */ \
309 ld r11,exception_marker@toc(r2); \
310 std r10,RESULT(r1); /* clear regs->result */ \
311 std r11,STACK_FRAME_OVERHEAD-16(r1); /* mark the frame */ \
317 #define STD_EXCEPTION_PSERIES(loc, vec, label) \
319 .globl label##_pSeries; \
321 HMT_MEDIUM_PPR_DISCARD; \
322 SET_SCRATCH0(r13); /* save r13 */ \
323 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common, \
324 EXC_STD, KVMTEST_PR, vec)
326 /* Version of above for when we have to branch out-of-line */
327 #define STD_EXCEPTION_PSERIES_OOL(vec, label) \
328 .globl label##_pSeries; \
330 EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_PR, vec); \
331 EXCEPTION_PROLOG_PSERIES_1(label##_common, EXC_STD)
333 #define STD_EXCEPTION_HV(loc, vec, label) \
337 HMT_MEDIUM_PPR_DISCARD; \
338 SET_SCRATCH0(r13); /* save r13 */ \
339 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common, \
340 EXC_HV, KVMTEST, vec)
342 /* Version of above for when we have to branch out-of-line */
343 #define STD_EXCEPTION_HV_OOL(vec, label) \
346 EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST, vec); \
347 EXCEPTION_PROLOG_PSERIES_1(label##_common, EXC_HV)
349 #define STD_RELON_EXCEPTION_PSERIES(loc, vec, label) \
351 .globl label##_relon_pSeries; \
352 label##_relon_pSeries: \
353 HMT_MEDIUM_PPR_DISCARD; \
354 /* No guest interrupts come through here */ \
355 SET_SCRATCH0(r13); /* save r13 */ \
356 EXCEPTION_RELON_PROLOG_PSERIES(PACA_EXGEN, label##_common, \
357 EXC_STD, KVMTEST_PR, vec)
359 #define STD_RELON_EXCEPTION_PSERIES_OOL(vec, label) \
360 .globl label##_relon_pSeries; \
361 label##_relon_pSeries: \
362 EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_PR, vec); \
363 EXCEPTION_RELON_PROLOG_PSERIES_1(label##_common, EXC_STD)
365 #define STD_RELON_EXCEPTION_HV(loc, vec, label) \
367 .globl label##_relon_hv; \
369 HMT_MEDIUM_PPR_DISCARD; \
370 /* No guest interrupts come through here */ \
371 SET_SCRATCH0(r13); /* save r13 */ \
372 EXCEPTION_RELON_PROLOG_PSERIES(PACA_EXGEN, label##_common, \
373 EXC_HV, KVMTEST, vec)
375 #define STD_RELON_EXCEPTION_HV_OOL(vec, label) \
376 .globl label##_relon_hv; \
378 EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST, vec); \
379 EXCEPTION_RELON_PROLOG_PSERIES_1(label##_common, EXC_HV)
381 /* This associate vector numbers with bits in paca->irq_happened */
382 #define SOFTEN_VALUE_0x500 PACA_IRQ_EE
383 #define SOFTEN_VALUE_0x502 PACA_IRQ_EE
384 #define SOFTEN_VALUE_0x900 PACA_IRQ_DEC
385 #define SOFTEN_VALUE_0x982 PACA_IRQ_DEC
386 #define SOFTEN_VALUE_0xa00 PACA_IRQ_DBELL
387 #define SOFTEN_VALUE_0xe80 PACA_IRQ_DBELL
388 #define SOFTEN_VALUE_0xe82 PACA_IRQ_DBELL
390 #define __SOFTEN_TEST(h, vec) \
391 lbz r10,PACASOFTIRQEN(r13); \
393 li r10,SOFTEN_VALUE_##vec; \
394 beq masked_##h##interrupt
395 #define _SOFTEN_TEST(h, vec) __SOFTEN_TEST(h, vec)
397 #define SOFTEN_TEST_PR(vec) \
399 _SOFTEN_TEST(EXC_STD, vec)
401 #define SOFTEN_TEST_HV(vec) \
403 _SOFTEN_TEST(EXC_HV, vec)
405 #define SOFTEN_TEST_HV_201(vec) \
407 _SOFTEN_TEST(EXC_STD, vec)
409 #define SOFTEN_NOTEST_PR(vec) _SOFTEN_TEST(EXC_STD, vec)
410 #define SOFTEN_NOTEST_HV(vec) _SOFTEN_TEST(EXC_HV, vec)
412 #define __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) \
413 HMT_MEDIUM_PPR_DISCARD; \
414 SET_SCRATCH0(r13); /* save r13 */ \
415 EXCEPTION_PROLOG_0(PACA_EXGEN); \
416 __EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec); \
417 EXCEPTION_PROLOG_PSERIES_1(label##_common, h);
419 #define _MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) \
420 __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra)
422 #define MASKABLE_EXCEPTION_PSERIES(loc, vec, label) \
424 .globl label##_pSeries; \
426 _MASKABLE_EXCEPTION_PSERIES(vec, label, \
427 EXC_STD, SOFTEN_TEST_PR)
429 #define MASKABLE_EXCEPTION_HV(loc, vec, label) \
433 _MASKABLE_EXCEPTION_PSERIES(vec, label, \
434 EXC_HV, SOFTEN_TEST_HV)
436 #define MASKABLE_EXCEPTION_HV_OOL(vec, label) \
439 EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_HV, vec); \
440 EXCEPTION_PROLOG_PSERIES_1(label##_common, EXC_HV);
442 #define __MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra) \
443 HMT_MEDIUM_PPR_DISCARD; \
444 SET_SCRATCH0(r13); /* save r13 */ \
445 EXCEPTION_PROLOG_0(PACA_EXGEN); \
446 __EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec); \
447 EXCEPTION_RELON_PROLOG_PSERIES_1(label##_common, h);
448 #define _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra) \
449 __MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra)
451 #define MASKABLE_RELON_EXCEPTION_PSERIES(loc, vec, label) \
453 .globl label##_relon_pSeries; \
454 label##_relon_pSeries: \
455 _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, \
456 EXC_STD, SOFTEN_NOTEST_PR)
458 #define MASKABLE_RELON_EXCEPTION_HV(loc, vec, label) \
460 .globl label##_relon_hv; \
462 _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, \
463 EXC_HV, SOFTEN_NOTEST_HV)
465 #define MASKABLE_RELON_EXCEPTION_HV_OOL(vec, label) \
466 .globl label##_relon_hv; \
468 EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_NOTEST_HV, vec); \
469 EXCEPTION_PROLOG_PSERIES_1(label##_common, EXC_HV);
472 * Our exception common code can be passed various "additions"
473 * to specify the behaviour of interrupts, whether to kick the
477 /* Exception addition: Hard disable interrupts */
478 #define DISABLE_INTS SOFT_DISABLE_INTS(r10,r11)
483 #define RUNLATCH_ON \
485 CURRENT_THREAD_INFO(r3, r1); \
486 ld r4,TI_LOCAL_FLAGS(r3); \
487 andi. r0,r4,_TLF_RUNLATCH; \
488 beql ppc64_runlatch_on_trampoline; \
489 END_FTR_SECTION_IFSET(CPU_FTR_CTRL)
491 #define EXCEPTION_COMMON(trap, label, hdlr, ret, additions) \
493 .globl label##_common; \
495 EXCEPTION_PROLOG_COMMON(trap, PACA_EXGEN); \
497 addi r3,r1,STACK_FRAME_OVERHEAD; \
501 #define STD_EXCEPTION_COMMON(trap, label, hdlr) \
502 EXCEPTION_COMMON(trap, label, hdlr, ret_from_except, \
503 ADD_NVGPRS;DISABLE_INTS)
506 * Like STD_EXCEPTION_COMMON, but for exceptions that can occur
507 * in the idle task and therefore need the special idle handling
508 * (finish nap and runlatch)
510 #define STD_EXCEPTION_COMMON_ASYNC(trap, label, hdlr) \
511 EXCEPTION_COMMON(trap, label, hdlr, ret_from_except_lite, \
512 FINISH_NAP;RUNLATCH_ON;DISABLE_INTS)
515 * When the idle code in power4_idle puts the CPU into NAP mode,
516 * it has to do so in a loop, and relies on the external interrupt
517 * and decrementer interrupt entry code to get it out of the loop.
518 * It sets the _TLF_NAPPING bit in current_thread_info()->local_flags
519 * to signal that it is in the loop and needs help to get out.
521 #ifdef CONFIG_PPC_970_NAP
524 CURRENT_THREAD_INFO(r11, r1); \
525 ld r9,TI_LOCAL_FLAGS(r11); \
526 andi. r10,r9,_TLF_NAPPING; \
527 bnel power4_fixup_nap; \
528 END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP)
533 #endif /* _ASM_POWERPC_EXCEPTION_H */