2 * Copyright IBM Corporation 2001, 2005, 2006
3 * Copyright Dave Engebretsen & Todd Inglett 2001
4 * Copyright Linas Vepstas 2005, 2006
5 * Copyright 2001-2012 IBM Corporation.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 * Please address comments and feedback to Linas Vepstas <linas@austin.ibm.com>
24 #include <linux/delay.h>
25 #include <linux/debugfs.h>
26 #include <linux/sched.h>
27 #include <linux/init.h>
28 #include <linux/list.h>
29 #include <linux/pci.h>
30 #include <linux/proc_fs.h>
31 #include <linux/rbtree.h>
32 #include <linux/reboot.h>
33 #include <linux/seq_file.h>
34 #include <linux/spinlock.h>
35 #include <linux/export.h>
38 #include <linux/atomic.h>
40 #include <asm/eeh_event.h>
42 #include <asm/machdep.h>
43 #include <asm/ppc-pci.h>
48 * EEH, or "Extended Error Handling" is a PCI bridge technology for
49 * dealing with PCI bus errors that can't be dealt with within the
50 * usual PCI framework, except by check-stopping the CPU. Systems
51 * that are designed for high-availability/reliability cannot afford
52 * to crash due to a "mere" PCI error, thus the need for EEH.
53 * An EEH-capable bridge operates by converting a detected error
54 * into a "slot freeze", taking the PCI adapter off-line, making
55 * the slot behave, from the OS'es point of view, as if the slot
56 * were "empty": all reads return 0xff's and all writes are silently
57 * ignored. EEH slot isolation events can be triggered by parity
58 * errors on the address or data busses (e.g. during posted writes),
59 * which in turn might be caused by low voltage on the bus, dust,
60 * vibration, humidity, radioactivity or plain-old failed hardware.
62 * Note, however, that one of the leading causes of EEH slot
63 * freeze events are buggy device drivers, buggy device microcode,
64 * or buggy device hardware. This is because any attempt by the
65 * device to bus-master data to a memory address that is not
66 * assigned to the device will trigger a slot freeze. (The idea
67 * is to prevent devices-gone-wild from corrupting system memory).
68 * Buggy hardware/drivers will have a miserable time co-existing
71 * Ideally, a PCI device driver, when suspecting that an isolation
72 * event has occurred (e.g. by reading 0xff's), will then ask EEH
73 * whether this is the case, and then take appropriate steps to
74 * reset the PCI slot, the PCI device, and then resume operations.
75 * However, until that day, the checking is done here, with the
76 * eeh_check_failure() routine embedded in the MMIO macros. If
77 * the slot is found to be isolated, an "EEH Event" is synthesized
78 * and sent out for processing.
81 /* If a device driver keeps reading an MMIO register in an interrupt
82 * handler after a slot isolation event, it might be broken.
83 * This sets the threshold for how many read attempts we allow
84 * before printing an error message.
86 #define EEH_MAX_FAILS 2100000
88 /* Time to wait for a PCI slot to report status, in milliseconds */
89 #define PCI_BUS_RESET_WAIT_MSEC (5*60*1000)
92 * EEH probe mode support, which is part of the flags,
93 * is to support multiple platforms for EEH. Some platforms
94 * like pSeries do PCI emunation based on device tree.
95 * However, other platforms like powernv probe PCI devices
96 * from hardware. The flag is used to distinguish that.
97 * In addition, struct eeh_ops::probe would be invoked for
98 * particular OF node or PCI device so that the corresponding
99 * PE would be created there.
101 int eeh_subsystem_flags;
102 EXPORT_SYMBOL(eeh_subsystem_flags);
104 /* Platform dependent EEH operations */
105 struct eeh_ops *eeh_ops = NULL;
107 /* Lock to avoid races due to multiple reports of an error */
108 DEFINE_RAW_SPINLOCK(confirm_error_lock);
110 /* Buffer for reporting pci register dumps. Its here in BSS, and
111 * not dynamically alloced, so that it ends up in RMO where RTAS
114 #define EEH_PCI_REGS_LOG_LEN 4096
115 static unsigned char pci_regs_buf[EEH_PCI_REGS_LOG_LEN];
118 * The struct is used to maintain the EEH global statistic
119 * information. Besides, the EEH global statistics will be
120 * exported to user space through procfs
123 u64 no_device; /* PCI device not found */
124 u64 no_dn; /* OF node not found */
125 u64 no_cfg_addr; /* Config address not found */
126 u64 ignored_check; /* EEH check skipped */
127 u64 total_mmio_ffs; /* Total EEH checks */
128 u64 false_positives; /* Unnecessary EEH checks */
129 u64 slot_resets; /* PE reset */
132 static struct eeh_stats eeh_stats;
134 #define IS_BRIDGE(class_code) (((class_code)<<16) == PCI_BASE_CLASS_BRIDGE)
136 static int __init eeh_setup(char *str)
138 if (!strcmp(str, "off"))
139 eeh_subsystem_flags |= EEH_FORCE_DISABLED;
143 __setup("eeh=", eeh_setup);
146 * eeh_gather_pci_data - Copy assorted PCI config space registers to buff
147 * @edev: device to report data for
148 * @buf: point to buffer in which to log
149 * @len: amount of room in buffer
151 * This routine captures assorted PCI configuration space data,
152 * and puts them into a buffer for RTAS error logging.
154 static size_t eeh_gather_pci_data(struct eeh_dev *edev, char * buf, size_t len)
156 struct device_node *dn = eeh_dev_to_of_node(edev);
161 n += scnprintf(buf+n, len-n, "%s\n", dn->full_name);
162 pr_warn("EEH: of node=%s\n", dn->full_name);
164 eeh_ops->read_config(dn, PCI_VENDOR_ID, 4, &cfg);
165 n += scnprintf(buf+n, len-n, "dev/vend:%08x\n", cfg);
166 pr_warn("EEH: PCI device/vendor: %08x\n", cfg);
168 eeh_ops->read_config(dn, PCI_COMMAND, 4, &cfg);
169 n += scnprintf(buf+n, len-n, "cmd/stat:%x\n", cfg);
170 pr_warn("EEH: PCI cmd/status register: %08x\n", cfg);
172 /* Gather bridge-specific registers */
173 if (edev->mode & EEH_DEV_BRIDGE) {
174 eeh_ops->read_config(dn, PCI_SEC_STATUS, 2, &cfg);
175 n += scnprintf(buf+n, len-n, "sec stat:%x\n", cfg);
176 pr_warn("EEH: Bridge secondary status: %04x\n", cfg);
178 eeh_ops->read_config(dn, PCI_BRIDGE_CONTROL, 2, &cfg);
179 n += scnprintf(buf+n, len-n, "brdg ctl:%x\n", cfg);
180 pr_warn("EEH: Bridge control: %04x\n", cfg);
183 /* Dump out the PCI-X command and status regs */
184 cap = edev->pcix_cap;
186 eeh_ops->read_config(dn, cap, 4, &cfg);
187 n += scnprintf(buf+n, len-n, "pcix-cmd:%x\n", cfg);
188 pr_warn("EEH: PCI-X cmd: %08x\n", cfg);
190 eeh_ops->read_config(dn, cap+4, 4, &cfg);
191 n += scnprintf(buf+n, len-n, "pcix-stat:%x\n", cfg);
192 pr_warn("EEH: PCI-X status: %08x\n", cfg);
195 /* If PCI-E capable, dump PCI-E cap 10 */
196 cap = edev->pcie_cap;
198 n += scnprintf(buf+n, len-n, "pci-e cap10:\n");
199 pr_warn("EEH: PCI-E capabilities and status follow:\n");
201 for (i=0; i<=8; i++) {
202 eeh_ops->read_config(dn, cap+4*i, 4, &cfg);
203 n += scnprintf(buf+n, len-n, "%02x:%x\n", 4*i, cfg);
204 pr_warn("EEH: PCI-E %02x: %08x\n", i, cfg);
208 /* If AER capable, dump it */
211 n += scnprintf(buf+n, len-n, "pci-e AER:\n");
212 pr_warn("EEH: PCI-E AER capability register set follows:\n");
214 for (i=0; i<14; i++) {
215 eeh_ops->read_config(dn, cap+4*i, 4, &cfg);
216 n += scnprintf(buf+n, len-n, "%02x:%x\n", 4*i, cfg);
217 pr_warn("EEH: PCI-E AER %02x: %08x\n", i, cfg);
225 * eeh_slot_error_detail - Generate combined log including driver log and error log
227 * @severity: temporary or permanent error log
229 * This routine should be called to generate the combined log, which
230 * is comprised of driver log and error log. The driver log is figured
231 * out from the config space of the corresponding PCI device, while
232 * the error log is fetched through platform dependent function call.
234 void eeh_slot_error_detail(struct eeh_pe *pe, int severity)
237 struct eeh_dev *edev, *tmp;
240 * When the PHB is fenced or dead, it's pointless to collect
241 * the data from PCI config space because it should return
242 * 0xFF's. For ER, we still retrieve the data from the PCI
245 * For pHyp, we have to enable IO for log retrieval. Otherwise,
246 * 0xFF's is always returned from PCI config space.
248 if (!(pe->type & EEH_PE_PHB)) {
249 if (eeh_probe_mode_devtree())
250 eeh_pci_enable(pe, EEH_OPT_THAW_MMIO);
251 eeh_ops->configure_bridge(pe);
252 eeh_pe_restore_bars(pe);
255 eeh_pe_for_each_dev(pe, edev, tmp) {
256 loglen += eeh_gather_pci_data(edev, pci_regs_buf + loglen,
257 EEH_PCI_REGS_LOG_LEN - loglen);
261 eeh_ops->get_log(pe, severity, pci_regs_buf, loglen);
265 * eeh_token_to_phys - Convert EEH address token to phys address
266 * @token: I/O token, should be address in the form 0xA....
268 * This routine should be called to convert virtual I/O address
271 static inline unsigned long eeh_token_to_phys(unsigned long token)
278 * We won't find hugepages here, iomem
280 ptep = find_linux_pte_or_hugepte(init_mm.pgd, token, &hugepage_shift);
283 WARN_ON(hugepage_shift);
284 pa = pte_pfn(*ptep) << PAGE_SHIFT;
286 return pa | (token & (PAGE_SIZE-1));
290 * On PowerNV platform, we might already have fenced PHB there.
291 * For that case, it's meaningless to recover frozen PE. Intead,
292 * We have to handle fenced PHB firstly.
294 static int eeh_phb_check_failure(struct eeh_pe *pe)
296 struct eeh_pe *phb_pe;
300 if (!eeh_probe_mode_dev())
303 /* Find the PHB PE */
304 phb_pe = eeh_phb_pe_get(pe->phb);
306 pr_warning("%s Can't find PE for PHB#%d\n",
307 __func__, pe->phb->global_number);
311 /* If the PHB has been in problematic state */
312 eeh_serialize_lock(&flags);
313 if (phb_pe->state & EEH_PE_ISOLATED) {
318 /* Check PHB state */
319 ret = eeh_ops->get_state(phb_pe, NULL);
321 (ret == EEH_STATE_NOT_SUPPORT) ||
322 (ret & (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE)) ==
323 (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE)) {
328 /* Isolate the PHB and send event */
329 eeh_pe_state_mark(phb_pe, EEH_PE_ISOLATED);
330 eeh_serialize_unlock(flags);
332 pr_err("EEH: PHB#%x failure detected\n",
333 phb_pe->phb->global_number);
335 eeh_send_failure_event(phb_pe);
339 eeh_serialize_unlock(flags);
344 * eeh_dev_check_failure - Check if all 1's data is due to EEH slot freeze
347 * Check for an EEH failure for the given device node. Call this
348 * routine if the result of a read was all 0xff's and you want to
349 * find out if this is due to an EEH slot freeze. This routine
350 * will query firmware for the EEH status.
352 * Returns 0 if there has not been an EEH error; otherwise returns
353 * a non-zero value and queues up a slot isolation event notification.
355 * It is safe to call this routine in an interrupt context.
357 int eeh_dev_check_failure(struct eeh_dev *edev)
361 struct device_node *dn;
365 const char *location;
367 eeh_stats.total_mmio_ffs++;
376 dn = eeh_dev_to_of_node(edev);
377 dev = eeh_dev_to_pci_dev(edev);
380 /* Access to IO BARs might get this far and still not want checking. */
382 eeh_stats.ignored_check++;
383 pr_debug("EEH: Ignored check for %s %s\n",
384 eeh_pci_name(dev), dn->full_name);
388 if (!pe->addr && !pe->config_addr) {
389 eeh_stats.no_cfg_addr++;
394 * On PowerNV platform, we might already have fenced PHB
395 * there and we need take care of that firstly.
397 ret = eeh_phb_check_failure(pe);
401 /* If we already have a pending isolation event for this
402 * slot, we know it's bad already, we don't need to check.
403 * Do this checking under a lock; as multiple PCI devices
404 * in one slot might report errors simultaneously, and we
405 * only want one error recovery routine running.
407 eeh_serialize_lock(&flags);
409 if (pe->state & EEH_PE_ISOLATED) {
411 if (pe->check_count % EEH_MAX_FAILS == 0) {
412 location = of_get_property(dn, "ibm,loc-code", NULL);
413 printk(KERN_ERR "EEH: %d reads ignored for recovering device at "
414 "location=%s driver=%s pci addr=%s\n",
415 pe->check_count, location,
416 eeh_driver_name(dev), eeh_pci_name(dev));
417 printk(KERN_ERR "EEH: Might be infinite loop in %s driver\n",
418 eeh_driver_name(dev));
425 * Now test for an EEH failure. This is VERY expensive.
426 * Note that the eeh_config_addr may be a parent device
427 * in the case of a device behind a bridge, or it may be
428 * function zero of a multi-function device.
429 * In any case they must share a common PHB.
431 ret = eeh_ops->get_state(pe, NULL);
433 /* Note that config-io to empty slots may fail;
434 * they are empty when they don't have children.
435 * We will punt with the following conditions: Failure to get
436 * PE's state, EEH not support and Permanently unavailable
437 * state, PE is in good state.
440 (ret == EEH_STATE_NOT_SUPPORT) ||
441 (ret & (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE)) ==
442 (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE)) {
443 eeh_stats.false_positives++;
444 pe->false_positives++;
449 eeh_stats.slot_resets++;
451 /* Avoid repeated reports of this failure, including problems
452 * with other functions on this device, and functions under
455 eeh_pe_state_mark(pe, EEH_PE_ISOLATED);
456 eeh_serialize_unlock(flags);
458 /* Most EEH events are due to device driver bugs. Having
459 * a stack trace will help the device-driver authors figure
460 * out what happened. So print that out.
462 pr_err("EEH: Frozen PE#%x detected on PHB#%x\n",
463 pe->addr, pe->phb->global_number);
466 eeh_send_failure_event(pe);
471 eeh_serialize_unlock(flags);
475 EXPORT_SYMBOL_GPL(eeh_dev_check_failure);
478 * eeh_check_failure - Check if all 1's data is due to EEH slot freeze
479 * @token: I/O token, should be address in the form 0xA....
480 * @val: value, should be all 1's (XXX why do we need this arg??)
482 * Check for an EEH failure at the given token address. Call this
483 * routine if the result of a read was all 0xff's and you want to
484 * find out if this is due to an EEH slot freeze event. This routine
485 * will query firmware for the EEH status.
487 * Note this routine is safe to call in an interrupt context.
489 unsigned long eeh_check_failure(const volatile void __iomem *token, unsigned long val)
492 struct eeh_dev *edev;
494 /* Finding the phys addr + pci device; this is pretty quick. */
495 addr = eeh_token_to_phys((unsigned long __force) token);
496 edev = eeh_addr_cache_get_dev(addr);
498 eeh_stats.no_device++;
502 eeh_dev_check_failure(edev);
506 EXPORT_SYMBOL(eeh_check_failure);
510 * eeh_pci_enable - Enable MMIO or DMA transfers for this slot
513 * This routine should be called to reenable frozen MMIO or DMA
514 * so that it would work correctly again. It's useful while doing
515 * recovery or log collection on the indicated device.
517 int eeh_pci_enable(struct eeh_pe *pe, int function)
519 int rc, flags = (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE);
522 * pHyp doesn't allow to enable IO or DMA on unfrozen PE.
523 * Also, it's pointless to enable them on unfrozen PE. So
524 * we have the check here.
526 if (function == EEH_OPT_THAW_MMIO ||
527 function == EEH_OPT_THAW_DMA) {
528 rc = eeh_ops->get_state(pe, NULL);
532 /* Needn't to enable or already enabled */
533 if ((rc == EEH_STATE_NOT_SUPPORT) ||
534 ((rc & flags) == flags))
538 rc = eeh_ops->set_option(pe, function);
540 pr_warn("%s: Unexpected state change %d on "
541 "PHB#%d-PE#%x, err=%d\n",
542 __func__, function, pe->phb->global_number,
545 rc = eeh_ops->wait_state(pe, PCI_BUS_RESET_WAIT_MSEC);
549 if ((function == EEH_OPT_THAW_MMIO) &&
550 (rc & EEH_STATE_MMIO_ENABLED))
553 if ((function == EEH_OPT_THAW_DMA) &&
554 (rc & EEH_STATE_DMA_ENABLED))
561 * pcibios_set_pcie_slot_reset - Set PCI-E reset state
562 * @dev: pci device struct
563 * @state: reset state to enter
568 int pcibios_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state state)
570 struct eeh_dev *edev = pci_dev_to_eeh_dev(dev);
571 struct eeh_pe *pe = edev->pe;
574 pr_err("%s: No PE found on PCI device %s\n",
575 __func__, pci_name(dev));
580 case pcie_deassert_reset:
581 eeh_ops->reset(pe, EEH_RESET_DEACTIVATE);
584 eeh_ops->reset(pe, EEH_RESET_HOT);
586 case pcie_warm_reset:
587 eeh_ops->reset(pe, EEH_RESET_FUNDAMENTAL);
597 * eeh_set_pe_freset - Check the required reset for the indicated device
599 * @flag: return value
601 * Each device might have its preferred reset type: fundamental or
602 * hot reset. The routine is used to collected the information for
603 * the indicated device and its children so that the bunch of the
604 * devices could be reset properly.
606 static void *eeh_set_dev_freset(void *data, void *flag)
609 unsigned int *freset = (unsigned int *)flag;
610 struct eeh_dev *edev = (struct eeh_dev *)data;
612 dev = eeh_dev_to_pci_dev(edev);
614 *freset |= dev->needs_freset;
620 * eeh_reset_pe_once - Assert the pci #RST line for 1/4 second
623 * Assert the PCI #RST line for 1/4 second.
625 static void eeh_reset_pe_once(struct eeh_pe *pe)
627 unsigned int freset = 0;
629 /* Determine type of EEH reset required for
630 * Partitionable Endpoint, a hot-reset (1)
631 * or a fundamental reset (3).
632 * A fundamental reset required by any device under
633 * Partitionable Endpoint trumps hot-reset.
635 eeh_pe_dev_traverse(pe, eeh_set_dev_freset, &freset);
638 eeh_ops->reset(pe, EEH_RESET_FUNDAMENTAL);
640 eeh_ops->reset(pe, EEH_RESET_HOT);
642 /* The PCI bus requires that the reset be held high for at least
643 * a 100 milliseconds. We wait a bit longer 'just in case'.
645 #define PCI_BUS_RST_HOLD_TIME_MSEC 250
646 msleep(PCI_BUS_RST_HOLD_TIME_MSEC);
648 eeh_ops->reset(pe, EEH_RESET_DEACTIVATE);
650 /* After a PCI slot has been reset, the PCI Express spec requires
651 * a 1.5 second idle time for the bus to stabilize, before starting
654 #define PCI_BUS_SETTLE_TIME_MSEC 1800
655 msleep(PCI_BUS_SETTLE_TIME_MSEC);
659 * eeh_reset_pe - Reset the indicated PE
662 * This routine should be called to reset indicated device, including
663 * PE. A PE might include multiple PCI devices and sometimes PCI bridges
664 * might be involved as well.
666 int eeh_reset_pe(struct eeh_pe *pe)
668 int flags = (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE);
671 /* Take three shots at resetting the bus */
672 for (i=0; i<3; i++) {
673 eeh_reset_pe_once(pe);
676 * EEH_PE_ISOLATED is expected to be removed after
679 rc = eeh_ops->wait_state(pe, PCI_BUS_RESET_WAIT_MSEC);
680 if ((rc & flags) == flags)
684 pr_err("%s: Unrecoverable slot failure on PHB#%d-PE#%x",
685 __func__, pe->phb->global_number, pe->addr);
688 pr_err("EEH: bus reset %d failed on PHB#%d-PE#%x, rc=%d\n",
689 i+1, pe->phb->global_number, pe->addr, rc);
696 * eeh_save_bars - Save device bars
697 * @edev: PCI device associated EEH device
699 * Save the values of the device bars. Unlike the restore
700 * routine, this routine is *not* recursive. This is because
701 * PCI devices are added individually; but, for the restore,
702 * an entire slot is reset at a time.
704 void eeh_save_bars(struct eeh_dev *edev)
707 struct device_node *dn;
711 dn = eeh_dev_to_of_node(edev);
713 for (i = 0; i < 16; i++)
714 eeh_ops->read_config(dn, i * 4, 4, &edev->config_space[i]);
717 * For PCI bridges including root port, we need enable bus
718 * master explicitly. Otherwise, it can't fetch IODA table
719 * entries correctly. So we cache the bit in advance so that
720 * we can restore it after reset, either PHB range or PE range.
722 if (edev->mode & EEH_DEV_BRIDGE)
723 edev->config_space[1] |= PCI_COMMAND_MASTER;
727 * eeh_ops_register - Register platform dependent EEH operations
728 * @ops: platform dependent EEH operations
730 * Register the platform dependent EEH operation callback
731 * functions. The platform should call this function before
732 * any other EEH operations.
734 int __init eeh_ops_register(struct eeh_ops *ops)
737 pr_warning("%s: Invalid EEH ops name for %p\n",
742 if (eeh_ops && eeh_ops != ops) {
743 pr_warning("%s: EEH ops of platform %s already existing (%s)\n",
744 __func__, eeh_ops->name, ops->name);
754 * eeh_ops_unregister - Unreigster platform dependent EEH operations
755 * @name: name of EEH platform operations
757 * Unregister the platform dependent EEH operation callback
760 int __exit eeh_ops_unregister(const char *name)
762 if (!name || !strlen(name)) {
763 pr_warning("%s: Invalid EEH ops name\n",
768 if (eeh_ops && !strcmp(eeh_ops->name, name)) {
776 static int eeh_reboot_notifier(struct notifier_block *nb,
777 unsigned long action, void *unused)
779 eeh_set_enable(false);
783 static struct notifier_block eeh_reboot_nb = {
784 .notifier_call = eeh_reboot_notifier,
788 * eeh_init - EEH initialization
790 * Initialize EEH by trying to enable it for all of the adapters in the system.
791 * As a side effect we can determine here if eeh is supported at all.
792 * Note that we leave EEH on so failed config cycles won't cause a machine
793 * check. If a user turns off EEH for a particular adapter they are really
794 * telling Linux to ignore errors. Some hardware (e.g. POWER5) won't
795 * grant access to a slot if EEH isn't enabled, and so we always enable
796 * EEH for all slots/all devices.
798 * The eeh-force-off option disables EEH checking globally, for all slots.
799 * Even if force-off is set, the EEH hardware is still enabled, so that
800 * newer systems can boot.
804 struct pci_controller *hose, *tmp;
805 struct device_node *phb;
810 * We have to delay the initialization on PowerNV after
811 * the PCI hierarchy tree has been built because the PEs
812 * are figured out based on PCI devices instead of device
815 if (machine_is(powernv) && cnt++ <= 0)
818 /* Register reboot notifier */
819 ret = register_reboot_notifier(&eeh_reboot_nb);
821 pr_warn("%s: Failed to register notifier (%d)\n",
826 /* call platform initialization function */
828 pr_warning("%s: Platform EEH operation not found\n",
831 } else if ((ret = eeh_ops->init())) {
832 pr_warning("%s: Failed to call platform init function (%d)\n",
837 /* Initialize EEH event */
838 ret = eeh_event_init();
842 /* Enable EEH for all adapters */
843 if (eeh_probe_mode_devtree()) {
844 list_for_each_entry_safe(hose, tmp,
845 &hose_list, list_node) {
847 traverse_pci_devices(phb, eeh_ops->of_probe, NULL);
849 } else if (eeh_probe_mode_dev()) {
850 list_for_each_entry_safe(hose, tmp,
851 &hose_list, list_node)
852 pci_walk_bus(hose->bus, eeh_ops->dev_probe, NULL);
854 pr_warn("%s: Invalid probe mode %x",
855 __func__, eeh_subsystem_flags);
860 * Call platform post-initialization. Actually, It's good chance
861 * to inform platform that EEH is ready to supply service if the
862 * I/O cache stuff has been built up.
864 if (eeh_ops->post_init) {
865 ret = eeh_ops->post_init();
871 pr_info("EEH: PCI Enhanced I/O Error Handling Enabled\n");
873 pr_warning("EEH: No capable adapters found\n");
878 core_initcall_sync(eeh_init);
881 * eeh_add_device_early - Enable EEH for the indicated device_node
882 * @dn: device node for which to set up EEH
884 * This routine must be used to perform EEH initialization for PCI
885 * devices that were added after system boot (e.g. hotplug, dlpar).
886 * This routine must be called before any i/o is performed to the
887 * adapter (inluding any config-space i/o).
888 * Whether this actually enables EEH or not for this device depends
889 * on the CEC architecture, type of the device, on earlier boot
890 * command-line arguments & etc.
892 void eeh_add_device_early(struct device_node *dn)
894 struct pci_controller *phb;
897 * If we're doing EEH probe based on PCI device, we
898 * would delay the probe until late stage because
899 * the PCI device isn't available this moment.
901 if (!eeh_probe_mode_devtree())
904 if (!of_node_to_eeh_dev(dn))
906 phb = of_node_to_eeh_dev(dn)->phb;
908 /* USB Bus children of PCI devices will not have BUID's */
909 if (NULL == phb || 0 == phb->buid)
912 eeh_ops->of_probe(dn, NULL);
916 * eeh_add_device_tree_early - Enable EEH for the indicated device
919 * This routine must be used to perform EEH initialization for the
920 * indicated PCI device that was added after system boot (e.g.
923 void eeh_add_device_tree_early(struct device_node *dn)
925 struct device_node *sib;
927 for_each_child_of_node(dn, sib)
928 eeh_add_device_tree_early(sib);
929 eeh_add_device_early(dn);
931 EXPORT_SYMBOL_GPL(eeh_add_device_tree_early);
934 * eeh_add_device_late - Perform EEH initialization for the indicated pci device
935 * @dev: pci device for which to set up EEH
937 * This routine must be used to complete EEH initialization for PCI
938 * devices that were added after system boot (e.g. hotplug, dlpar).
940 void eeh_add_device_late(struct pci_dev *dev)
942 struct device_node *dn;
943 struct eeh_dev *edev;
945 if (!dev || !eeh_enabled())
948 pr_debug("EEH: Adding device %s\n", pci_name(dev));
950 dn = pci_device_to_OF_node(dev);
951 edev = of_node_to_eeh_dev(dn);
952 if (edev->pdev == dev) {
953 pr_debug("EEH: Already referenced !\n");
958 * The EEH cache might not be removed correctly because of
959 * unbalanced kref to the device during unplug time, which
960 * relies on pcibios_release_device(). So we have to remove
961 * that here explicitly.
964 eeh_rmv_from_parent_pe(edev);
965 eeh_addr_cache_rmv_dev(edev->pdev);
966 eeh_sysfs_remove_device(edev->pdev);
967 edev->mode &= ~EEH_DEV_SYSFS;
970 * We definitely should have the PCI device removed
971 * though it wasn't correctly. So we needn't call
972 * into error handler afterwards.
974 edev->mode |= EEH_DEV_NO_HANDLER;
977 dev->dev.archdata.edev = NULL;
981 dev->dev.archdata.edev = edev;
984 * We have to do the EEH probe here because the PCI device
985 * hasn't been created yet in the early stage.
987 if (eeh_probe_mode_dev())
988 eeh_ops->dev_probe(dev, NULL);
990 eeh_addr_cache_insert_dev(dev);
994 * eeh_add_device_tree_late - Perform EEH initialization for the indicated PCI bus
997 * This routine must be used to perform EEH initialization for PCI
998 * devices which are attached to the indicated PCI bus. The PCI bus
999 * is added after system boot through hotplug or dlpar.
1001 void eeh_add_device_tree_late(struct pci_bus *bus)
1003 struct pci_dev *dev;
1005 list_for_each_entry(dev, &bus->devices, bus_list) {
1006 eeh_add_device_late(dev);
1007 if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) {
1008 struct pci_bus *subbus = dev->subordinate;
1010 eeh_add_device_tree_late(subbus);
1014 EXPORT_SYMBOL_GPL(eeh_add_device_tree_late);
1017 * eeh_add_sysfs_files - Add EEH sysfs files for the indicated PCI bus
1020 * This routine must be used to add EEH sysfs files for PCI
1021 * devices which are attached to the indicated PCI bus. The PCI bus
1022 * is added after system boot through hotplug or dlpar.
1024 void eeh_add_sysfs_files(struct pci_bus *bus)
1026 struct pci_dev *dev;
1028 list_for_each_entry(dev, &bus->devices, bus_list) {
1029 eeh_sysfs_add_device(dev);
1030 if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) {
1031 struct pci_bus *subbus = dev->subordinate;
1033 eeh_add_sysfs_files(subbus);
1037 EXPORT_SYMBOL_GPL(eeh_add_sysfs_files);
1040 * eeh_remove_device - Undo EEH setup for the indicated pci device
1041 * @dev: pci device to be removed
1043 * This routine should be called when a device is removed from
1044 * a running system (e.g. by hotplug or dlpar). It unregisters
1045 * the PCI device from the EEH subsystem. I/O errors affecting
1046 * this device will no longer be detected after this call; thus,
1047 * i/o errors affecting this slot may leave this device unusable.
1049 void eeh_remove_device(struct pci_dev *dev)
1051 struct eeh_dev *edev;
1053 if (!dev || !eeh_enabled())
1055 edev = pci_dev_to_eeh_dev(dev);
1057 /* Unregister the device with the EEH/PCI address search system */
1058 pr_debug("EEH: Removing device %s\n", pci_name(dev));
1060 if (!edev || !edev->pdev || !edev->pe) {
1061 pr_debug("EEH: Not referenced !\n");
1066 * During the hotplug for EEH error recovery, we need the EEH
1067 * device attached to the parent PE in order for BAR restore
1068 * a bit later. So we keep it for BAR restore and remove it
1069 * from the parent PE during the BAR resotre.
1072 dev->dev.archdata.edev = NULL;
1073 if (!(edev->pe->state & EEH_PE_KEEP))
1074 eeh_rmv_from_parent_pe(edev);
1076 edev->mode |= EEH_DEV_DISCONNECTED;
1079 * We're removing from the PCI subsystem, that means
1080 * the PCI device driver can't support EEH or not
1081 * well. So we rely on hotplug completely to do recovery
1082 * for the specific PCI device.
1084 edev->mode |= EEH_DEV_NO_HANDLER;
1086 eeh_addr_cache_rmv_dev(dev);
1087 eeh_sysfs_remove_device(dev);
1088 edev->mode &= ~EEH_DEV_SYSFS;
1091 static int proc_eeh_show(struct seq_file *m, void *v)
1093 if (!eeh_enabled()) {
1094 seq_printf(m, "EEH Subsystem is globally disabled\n");
1095 seq_printf(m, "eeh_total_mmio_ffs=%llu\n", eeh_stats.total_mmio_ffs);
1097 seq_printf(m, "EEH Subsystem is enabled\n");
1100 "no device node=%llu\n"
1101 "no config address=%llu\n"
1102 "check not wanted=%llu\n"
1103 "eeh_total_mmio_ffs=%llu\n"
1104 "eeh_false_positives=%llu\n"
1105 "eeh_slot_resets=%llu\n",
1106 eeh_stats.no_device,
1108 eeh_stats.no_cfg_addr,
1109 eeh_stats.ignored_check,
1110 eeh_stats.total_mmio_ffs,
1111 eeh_stats.false_positives,
1112 eeh_stats.slot_resets);
1118 static int proc_eeh_open(struct inode *inode, struct file *file)
1120 return single_open(file, proc_eeh_show, NULL);
1123 static const struct file_operations proc_eeh_operations = {
1124 .open = proc_eeh_open,
1126 .llseek = seq_lseek,
1127 .release = single_release,
1130 #ifdef CONFIG_DEBUG_FS
1131 static int eeh_enable_dbgfs_set(void *data, u64 val)
1134 eeh_subsystem_flags &= ~EEH_FORCE_DISABLED;
1136 eeh_subsystem_flags |= EEH_FORCE_DISABLED;
1138 /* Notify the backend */
1139 if (eeh_ops->post_init)
1140 eeh_ops->post_init();
1145 static int eeh_enable_dbgfs_get(void *data, u64 *val)
1154 DEFINE_SIMPLE_ATTRIBUTE(eeh_enable_dbgfs_ops, eeh_enable_dbgfs_get,
1155 eeh_enable_dbgfs_set, "0x%llx\n");
1158 static int __init eeh_init_proc(void)
1160 if (machine_is(pseries) || machine_is(powernv)) {
1161 proc_create("powerpc/eeh", 0, NULL, &proc_eeh_operations);
1162 #ifdef CONFIG_DEBUG_FS
1163 debugfs_create_file("eeh_enable", 0600,
1164 powerpc_debugfs_root, NULL,
1165 &eeh_enable_dbgfs_ops);
1171 __initcall(eeh_init_proc);