2 * Copyright IBM Corporation 2001, 2005, 2006
3 * Copyright Dave Engebretsen & Todd Inglett 2001
4 * Copyright Linas Vepstas 2005, 2006
5 * Copyright 2001-2012 IBM Corporation.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 * Please address comments and feedback to Linas Vepstas <linas@austin.ibm.com>
24 #include <linux/delay.h>
25 #include <linux/sched.h>
26 #include <linux/init.h>
27 #include <linux/list.h>
28 #include <linux/pci.h>
29 #include <linux/proc_fs.h>
30 #include <linux/rbtree.h>
31 #include <linux/reboot.h>
32 #include <linux/seq_file.h>
33 #include <linux/spinlock.h>
34 #include <linux/export.h>
37 #include <linux/atomic.h>
39 #include <asm/eeh_event.h>
41 #include <asm/machdep.h>
42 #include <asm/ppc-pci.h>
47 * EEH, or "Extended Error Handling" is a PCI bridge technology for
48 * dealing with PCI bus errors that can't be dealt with within the
49 * usual PCI framework, except by check-stopping the CPU. Systems
50 * that are designed for high-availability/reliability cannot afford
51 * to crash due to a "mere" PCI error, thus the need for EEH.
52 * An EEH-capable bridge operates by converting a detected error
53 * into a "slot freeze", taking the PCI adapter off-line, making
54 * the slot behave, from the OS'es point of view, as if the slot
55 * were "empty": all reads return 0xff's and all writes are silently
56 * ignored. EEH slot isolation events can be triggered by parity
57 * errors on the address or data busses (e.g. during posted writes),
58 * which in turn might be caused by low voltage on the bus, dust,
59 * vibration, humidity, radioactivity or plain-old failed hardware.
61 * Note, however, that one of the leading causes of EEH slot
62 * freeze events are buggy device drivers, buggy device microcode,
63 * or buggy device hardware. This is because any attempt by the
64 * device to bus-master data to a memory address that is not
65 * assigned to the device will trigger a slot freeze. (The idea
66 * is to prevent devices-gone-wild from corrupting system memory).
67 * Buggy hardware/drivers will have a miserable time co-existing
70 * Ideally, a PCI device driver, when suspecting that an isolation
71 * event has occurred (e.g. by reading 0xff's), will then ask EEH
72 * whether this is the case, and then take appropriate steps to
73 * reset the PCI slot, the PCI device, and then resume operations.
74 * However, until that day, the checking is done here, with the
75 * eeh_check_failure() routine embedded in the MMIO macros. If
76 * the slot is found to be isolated, an "EEH Event" is synthesized
77 * and sent out for processing.
80 /* If a device driver keeps reading an MMIO register in an interrupt
81 * handler after a slot isolation event, it might be broken.
82 * This sets the threshold for how many read attempts we allow
83 * before printing an error message.
85 #define EEH_MAX_FAILS 2100000
87 /* Time to wait for a PCI slot to report status, in milliseconds */
88 #define PCI_BUS_RESET_WAIT_MSEC (5*60*1000)
90 /* Platform dependent EEH operations */
91 struct eeh_ops *eeh_ops = NULL;
93 bool eeh_subsystem_enabled = false;
94 EXPORT_SYMBOL(eeh_subsystem_enabled);
97 * EEH probe mode support. The intention is to support multiple
98 * platforms for EEH. Some platforms like pSeries do PCI emunation
99 * based on device tree. However, other platforms like powernv probe
100 * PCI devices from hardware. The flag is used to distinguish that.
101 * In addition, struct eeh_ops::probe would be invoked for particular
102 * OF node or PCI device so that the corresponding PE would be created
107 /* Lock to avoid races due to multiple reports of an error */
108 DEFINE_RAW_SPINLOCK(confirm_error_lock);
110 /* Buffer for reporting pci register dumps. Its here in BSS, and
111 * not dynamically alloced, so that it ends up in RMO where RTAS
114 #define EEH_PCI_REGS_LOG_LEN 4096
115 static unsigned char pci_regs_buf[EEH_PCI_REGS_LOG_LEN];
118 * The struct is used to maintain the EEH global statistic
119 * information. Besides, the EEH global statistics will be
120 * exported to user space through procfs
123 u64 no_device; /* PCI device not found */
124 u64 no_dn; /* OF node not found */
125 u64 no_cfg_addr; /* Config address not found */
126 u64 ignored_check; /* EEH check skipped */
127 u64 total_mmio_ffs; /* Total EEH checks */
128 u64 false_positives; /* Unnecessary EEH checks */
129 u64 slot_resets; /* PE reset */
132 static struct eeh_stats eeh_stats;
134 #define IS_BRIDGE(class_code) (((class_code)<<16) == PCI_BASE_CLASS_BRIDGE)
137 * eeh_gather_pci_data - Copy assorted PCI config space registers to buff
138 * @edev: device to report data for
139 * @buf: point to buffer in which to log
140 * @len: amount of room in buffer
142 * This routine captures assorted PCI configuration space data,
143 * and puts them into a buffer for RTAS error logging.
145 static size_t eeh_gather_pci_data(struct eeh_dev *edev, char * buf, size_t len)
147 struct device_node *dn = eeh_dev_to_of_node(edev);
148 struct pci_dev *dev = eeh_dev_to_pci_dev(edev);
153 n += scnprintf(buf+n, len-n, "%s\n", dn->full_name);
154 printk(KERN_WARNING "EEH: of node=%s\n", dn->full_name);
156 eeh_ops->read_config(dn, PCI_VENDOR_ID, 4, &cfg);
157 n += scnprintf(buf+n, len-n, "dev/vend:%08x\n", cfg);
158 printk(KERN_WARNING "EEH: PCI device/vendor: %08x\n", cfg);
160 eeh_ops->read_config(dn, PCI_COMMAND, 4, &cfg);
161 n += scnprintf(buf+n, len-n, "cmd/stat:%x\n", cfg);
162 printk(KERN_WARNING "EEH: PCI cmd/status register: %08x\n", cfg);
165 printk(KERN_WARNING "EEH: no PCI device for this of node\n");
169 /* Gather bridge-specific registers */
170 if (dev->class >> 16 == PCI_BASE_CLASS_BRIDGE) {
171 eeh_ops->read_config(dn, PCI_SEC_STATUS, 2, &cfg);
172 n += scnprintf(buf+n, len-n, "sec stat:%x\n", cfg);
173 printk(KERN_WARNING "EEH: Bridge secondary status: %04x\n", cfg);
175 eeh_ops->read_config(dn, PCI_BRIDGE_CONTROL, 2, &cfg);
176 n += scnprintf(buf+n, len-n, "brdg ctl:%x\n", cfg);
177 printk(KERN_WARNING "EEH: Bridge control: %04x\n", cfg);
180 /* Dump out the PCI-X command and status regs */
181 cap = pci_find_capability(dev, PCI_CAP_ID_PCIX);
183 eeh_ops->read_config(dn, cap, 4, &cfg);
184 n += scnprintf(buf+n, len-n, "pcix-cmd:%x\n", cfg);
185 printk(KERN_WARNING "EEH: PCI-X cmd: %08x\n", cfg);
187 eeh_ops->read_config(dn, cap+4, 4, &cfg);
188 n += scnprintf(buf+n, len-n, "pcix-stat:%x\n", cfg);
189 printk(KERN_WARNING "EEH: PCI-X status: %08x\n", cfg);
192 /* If PCI-E capable, dump PCI-E cap 10, and the AER */
193 if (pci_is_pcie(dev)) {
194 n += scnprintf(buf+n, len-n, "pci-e cap10:\n");
196 "EEH: PCI-E capabilities and status follow:\n");
198 for (i=0; i<=8; i++) {
199 eeh_ops->read_config(dn, dev->pcie_cap+4*i, 4, &cfg);
200 n += scnprintf(buf+n, len-n, "%02x:%x\n", 4*i, cfg);
201 printk(KERN_WARNING "EEH: PCI-E %02x: %08x\n", i, cfg);
204 cap = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
206 n += scnprintf(buf+n, len-n, "pci-e AER:\n");
208 "EEH: PCI-E AER capability register set follows:\n");
210 for (i=0; i<14; i++) {
211 eeh_ops->read_config(dn, cap+4*i, 4, &cfg);
212 n += scnprintf(buf+n, len-n, "%02x:%x\n", 4*i, cfg);
213 printk(KERN_WARNING "EEH: PCI-E AER %02x: %08x\n", i, cfg);
222 * eeh_slot_error_detail - Generate combined log including driver log and error log
224 * @severity: temporary or permanent error log
226 * This routine should be called to generate the combined log, which
227 * is comprised of driver log and error log. The driver log is figured
228 * out from the config space of the corresponding PCI device, while
229 * the error log is fetched through platform dependent function call.
231 void eeh_slot_error_detail(struct eeh_pe *pe, int severity)
234 struct eeh_dev *edev, *tmp;
237 * When the PHB is fenced or dead, it's pointless to collect
238 * the data from PCI config space because it should return
239 * 0xFF's. For ER, we still retrieve the data from the PCI
242 * For pHyp, we have to enable IO for log retrieval. Otherwise,
243 * 0xFF's is always returned from PCI config space.
245 if (!(pe->type & EEH_PE_PHB)) {
246 if (eeh_probe_mode_devtree())
247 eeh_pci_enable(pe, EEH_OPT_THAW_MMIO);
248 eeh_ops->configure_bridge(pe);
249 eeh_pe_restore_bars(pe);
252 eeh_pe_for_each_dev(pe, edev, tmp) {
253 loglen += eeh_gather_pci_data(edev, pci_regs_buf + loglen,
254 EEH_PCI_REGS_LOG_LEN - loglen);
258 eeh_ops->get_log(pe, severity, pci_regs_buf, loglen);
262 * eeh_token_to_phys - Convert EEH address token to phys address
263 * @token: I/O token, should be address in the form 0xA....
265 * This routine should be called to convert virtual I/O address
268 static inline unsigned long eeh_token_to_phys(unsigned long token)
275 * We won't find hugepages here, iomem
277 ptep = find_linux_pte_or_hugepte(init_mm.pgd, token, &hugepage_shift);
280 WARN_ON(hugepage_shift);
281 pa = pte_pfn(*ptep) << PAGE_SHIFT;
283 return pa | (token & (PAGE_SIZE-1));
287 * On PowerNV platform, we might already have fenced PHB there.
288 * For that case, it's meaningless to recover frozen PE. Intead,
289 * We have to handle fenced PHB firstly.
291 static int eeh_phb_check_failure(struct eeh_pe *pe)
293 struct eeh_pe *phb_pe;
297 if (!eeh_probe_mode_dev())
300 /* Find the PHB PE */
301 phb_pe = eeh_phb_pe_get(pe->phb);
303 pr_warning("%s Can't find PE for PHB#%d\n",
304 __func__, pe->phb->global_number);
308 /* If the PHB has been in problematic state */
309 eeh_serialize_lock(&flags);
310 if (phb_pe->state & EEH_PE_ISOLATED) {
315 /* Check PHB state */
316 ret = eeh_ops->get_state(phb_pe, NULL);
318 (ret == EEH_STATE_NOT_SUPPORT) ||
319 (ret & (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE)) ==
320 (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE)) {
325 /* Isolate the PHB and send event */
326 eeh_pe_state_mark(phb_pe, EEH_PE_ISOLATED);
327 eeh_serialize_unlock(flags);
329 pr_err("EEH: PHB#%x failure detected\n",
330 phb_pe->phb->global_number);
332 eeh_send_failure_event(phb_pe);
336 eeh_serialize_unlock(flags);
341 * eeh_dev_check_failure - Check if all 1's data is due to EEH slot freeze
344 * Check for an EEH failure for the given device node. Call this
345 * routine if the result of a read was all 0xff's and you want to
346 * find out if this is due to an EEH slot freeze. This routine
347 * will query firmware for the EEH status.
349 * Returns 0 if there has not been an EEH error; otherwise returns
350 * a non-zero value and queues up a slot isolation event notification.
352 * It is safe to call this routine in an interrupt context.
354 int eeh_dev_check_failure(struct eeh_dev *edev)
358 struct device_node *dn;
362 const char *location;
364 eeh_stats.total_mmio_ffs++;
373 dn = eeh_dev_to_of_node(edev);
374 dev = eeh_dev_to_pci_dev(edev);
377 /* Access to IO BARs might get this far and still not want checking. */
379 eeh_stats.ignored_check++;
380 pr_debug("EEH: Ignored check for %s %s\n",
381 eeh_pci_name(dev), dn->full_name);
385 if (!pe->addr && !pe->config_addr) {
386 eeh_stats.no_cfg_addr++;
391 * On PowerNV platform, we might already have fenced PHB
392 * there and we need take care of that firstly.
394 ret = eeh_phb_check_failure(pe);
398 /* If we already have a pending isolation event for this
399 * slot, we know it's bad already, we don't need to check.
400 * Do this checking under a lock; as multiple PCI devices
401 * in one slot might report errors simultaneously, and we
402 * only want one error recovery routine running.
404 eeh_serialize_lock(&flags);
406 if (pe->state & EEH_PE_ISOLATED) {
408 if (pe->check_count % EEH_MAX_FAILS == 0) {
409 location = of_get_property(dn, "ibm,loc-code", NULL);
410 printk(KERN_ERR "EEH: %d reads ignored for recovering device at "
411 "location=%s driver=%s pci addr=%s\n",
412 pe->check_count, location,
413 eeh_driver_name(dev), eeh_pci_name(dev));
414 printk(KERN_ERR "EEH: Might be infinite loop in %s driver\n",
415 eeh_driver_name(dev));
422 * Now test for an EEH failure. This is VERY expensive.
423 * Note that the eeh_config_addr may be a parent device
424 * in the case of a device behind a bridge, or it may be
425 * function zero of a multi-function device.
426 * In any case they must share a common PHB.
428 ret = eeh_ops->get_state(pe, NULL);
430 /* Note that config-io to empty slots may fail;
431 * they are empty when they don't have children.
432 * We will punt with the following conditions: Failure to get
433 * PE's state, EEH not support and Permanently unavailable
434 * state, PE is in good state.
437 (ret == EEH_STATE_NOT_SUPPORT) ||
438 (ret & (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE)) ==
439 (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE)) {
440 eeh_stats.false_positives++;
441 pe->false_positives++;
446 eeh_stats.slot_resets++;
448 /* Avoid repeated reports of this failure, including problems
449 * with other functions on this device, and functions under
452 eeh_pe_state_mark(pe, EEH_PE_ISOLATED);
453 eeh_serialize_unlock(flags);
455 /* Most EEH events are due to device driver bugs. Having
456 * a stack trace will help the device-driver authors figure
457 * out what happened. So print that out.
459 pr_err("EEH: Frozen PE#%x detected on PHB#%x\n",
460 pe->addr, pe->phb->global_number);
463 eeh_send_failure_event(pe);
468 eeh_serialize_unlock(flags);
472 EXPORT_SYMBOL_GPL(eeh_dev_check_failure);
475 * eeh_check_failure - Check if all 1's data is due to EEH slot freeze
476 * @token: I/O token, should be address in the form 0xA....
477 * @val: value, should be all 1's (XXX why do we need this arg??)
479 * Check for an EEH failure at the given token address. Call this
480 * routine if the result of a read was all 0xff's and you want to
481 * find out if this is due to an EEH slot freeze event. This routine
482 * will query firmware for the EEH status.
484 * Note this routine is safe to call in an interrupt context.
486 unsigned long eeh_check_failure(const volatile void __iomem *token, unsigned long val)
489 struct eeh_dev *edev;
491 /* Finding the phys addr + pci device; this is pretty quick. */
492 addr = eeh_token_to_phys((unsigned long __force) token);
493 edev = eeh_addr_cache_get_dev(addr);
495 eeh_stats.no_device++;
499 eeh_dev_check_failure(edev);
503 EXPORT_SYMBOL(eeh_check_failure);
507 * eeh_pci_enable - Enable MMIO or DMA transfers for this slot
510 * This routine should be called to reenable frozen MMIO or DMA
511 * so that it would work correctly again. It's useful while doing
512 * recovery or log collection on the indicated device.
514 int eeh_pci_enable(struct eeh_pe *pe, int function)
516 int rc, flags = (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE);
519 * pHyp doesn't allow to enable IO or DMA on unfrozen PE.
520 * Also, it's pointless to enable them on unfrozen PE. So
521 * we have the check here.
523 if (function == EEH_OPT_THAW_MMIO ||
524 function == EEH_OPT_THAW_DMA) {
525 rc = eeh_ops->get_state(pe, NULL);
529 /* Needn't to enable or already enabled */
530 if ((rc == EEH_STATE_NOT_SUPPORT) ||
531 ((rc & flags) == flags))
535 rc = eeh_ops->set_option(pe, function);
537 pr_warn("%s: Unexpected state change %d on "
538 "PHB#%d-PE#%x, err=%d\n",
539 __func__, function, pe->phb->global_number,
542 rc = eeh_ops->wait_state(pe, PCI_BUS_RESET_WAIT_MSEC);
546 if ((function == EEH_OPT_THAW_MMIO) &&
547 (rc & EEH_STATE_MMIO_ENABLED))
550 if ((function == EEH_OPT_THAW_DMA) &&
551 (rc & EEH_STATE_DMA_ENABLED))
558 * pcibios_set_pcie_slot_reset - Set PCI-E reset state
559 * @dev: pci device struct
560 * @state: reset state to enter
565 int pcibios_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state state)
567 struct eeh_dev *edev = pci_dev_to_eeh_dev(dev);
568 struct eeh_pe *pe = edev->pe;
571 pr_err("%s: No PE found on PCI device %s\n",
572 __func__, pci_name(dev));
577 case pcie_deassert_reset:
578 eeh_ops->reset(pe, EEH_RESET_DEACTIVATE);
581 eeh_ops->reset(pe, EEH_RESET_HOT);
583 case pcie_warm_reset:
584 eeh_ops->reset(pe, EEH_RESET_FUNDAMENTAL);
594 * eeh_set_pe_freset - Check the required reset for the indicated device
596 * @flag: return value
598 * Each device might have its preferred reset type: fundamental or
599 * hot reset. The routine is used to collected the information for
600 * the indicated device and its children so that the bunch of the
601 * devices could be reset properly.
603 static void *eeh_set_dev_freset(void *data, void *flag)
606 unsigned int *freset = (unsigned int *)flag;
607 struct eeh_dev *edev = (struct eeh_dev *)data;
609 dev = eeh_dev_to_pci_dev(edev);
611 *freset |= dev->needs_freset;
617 * eeh_reset_pe_once - Assert the pci #RST line for 1/4 second
620 * Assert the PCI #RST line for 1/4 second.
622 static void eeh_reset_pe_once(struct eeh_pe *pe)
624 unsigned int freset = 0;
626 /* Determine type of EEH reset required for
627 * Partitionable Endpoint, a hot-reset (1)
628 * or a fundamental reset (3).
629 * A fundamental reset required by any device under
630 * Partitionable Endpoint trumps hot-reset.
632 eeh_pe_dev_traverse(pe, eeh_set_dev_freset, &freset);
635 eeh_ops->reset(pe, EEH_RESET_FUNDAMENTAL);
637 eeh_ops->reset(pe, EEH_RESET_HOT);
639 /* The PCI bus requires that the reset be held high for at least
640 * a 100 milliseconds. We wait a bit longer 'just in case'.
642 #define PCI_BUS_RST_HOLD_TIME_MSEC 250
643 msleep(PCI_BUS_RST_HOLD_TIME_MSEC);
645 eeh_ops->reset(pe, EEH_RESET_DEACTIVATE);
647 /* After a PCI slot has been reset, the PCI Express spec requires
648 * a 1.5 second idle time for the bus to stabilize, before starting
651 #define PCI_BUS_SETTLE_TIME_MSEC 1800
652 msleep(PCI_BUS_SETTLE_TIME_MSEC);
656 * eeh_reset_pe - Reset the indicated PE
659 * This routine should be called to reset indicated device, including
660 * PE. A PE might include multiple PCI devices and sometimes PCI bridges
661 * might be involved as well.
663 int eeh_reset_pe(struct eeh_pe *pe)
665 int flags = (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE);
668 /* Take three shots at resetting the bus */
669 for (i=0; i<3; i++) {
670 eeh_reset_pe_once(pe);
673 * EEH_PE_ISOLATED is expected to be removed after
676 rc = eeh_ops->wait_state(pe, PCI_BUS_RESET_WAIT_MSEC);
677 if ((rc & flags) == flags)
681 pr_err("%s: Unrecoverable slot failure on PHB#%d-PE#%x",
682 __func__, pe->phb->global_number, pe->addr);
685 pr_err("EEH: bus reset %d failed on PHB#%d-PE#%x, rc=%d\n",
686 i+1, pe->phb->global_number, pe->addr, rc);
693 * eeh_save_bars - Save device bars
694 * @edev: PCI device associated EEH device
696 * Save the values of the device bars. Unlike the restore
697 * routine, this routine is *not* recursive. This is because
698 * PCI devices are added individually; but, for the restore,
699 * an entire slot is reset at a time.
701 void eeh_save_bars(struct eeh_dev *edev)
704 struct device_node *dn;
708 dn = eeh_dev_to_of_node(edev);
710 for (i = 0; i < 16; i++)
711 eeh_ops->read_config(dn, i * 4, 4, &edev->config_space[i]);
714 * For PCI bridges including root port, we need enable bus
715 * master explicitly. Otherwise, it can't fetch IODA table
716 * entries correctly. So we cache the bit in advance so that
717 * we can restore it after reset, either PHB range or PE range.
719 if (edev->mode & EEH_DEV_BRIDGE)
720 edev->config_space[1] |= PCI_COMMAND_MASTER;
724 * eeh_ops_register - Register platform dependent EEH operations
725 * @ops: platform dependent EEH operations
727 * Register the platform dependent EEH operation callback
728 * functions. The platform should call this function before
729 * any other EEH operations.
731 int __init eeh_ops_register(struct eeh_ops *ops)
734 pr_warning("%s: Invalid EEH ops name for %p\n",
739 if (eeh_ops && eeh_ops != ops) {
740 pr_warning("%s: EEH ops of platform %s already existing (%s)\n",
741 __func__, eeh_ops->name, ops->name);
751 * eeh_ops_unregister - Unreigster platform dependent EEH operations
752 * @name: name of EEH platform operations
754 * Unregister the platform dependent EEH operation callback
757 int __exit eeh_ops_unregister(const char *name)
759 if (!name || !strlen(name)) {
760 pr_warning("%s: Invalid EEH ops name\n",
765 if (eeh_ops && !strcmp(eeh_ops->name, name)) {
773 static int eeh_reboot_notifier(struct notifier_block *nb,
774 unsigned long action, void *unused)
776 eeh_set_enable(false);
780 static struct notifier_block eeh_reboot_nb = {
781 .notifier_call = eeh_reboot_notifier,
785 * eeh_init - EEH initialization
787 * Initialize EEH by trying to enable it for all of the adapters in the system.
788 * As a side effect we can determine here if eeh is supported at all.
789 * Note that we leave EEH on so failed config cycles won't cause a machine
790 * check. If a user turns off EEH for a particular adapter they are really
791 * telling Linux to ignore errors. Some hardware (e.g. POWER5) won't
792 * grant access to a slot if EEH isn't enabled, and so we always enable
793 * EEH for all slots/all devices.
795 * The eeh-force-off option disables EEH checking globally, for all slots.
796 * Even if force-off is set, the EEH hardware is still enabled, so that
797 * newer systems can boot.
801 struct pci_controller *hose, *tmp;
802 struct device_node *phb;
807 * We have to delay the initialization on PowerNV after
808 * the PCI hierarchy tree has been built because the PEs
809 * are figured out based on PCI devices instead of device
812 if (machine_is(powernv) && cnt++ <= 0)
815 /* Register reboot notifier */
816 ret = register_reboot_notifier(&eeh_reboot_nb);
818 pr_warn("%s: Failed to register notifier (%d)\n",
823 /* call platform initialization function */
825 pr_warning("%s: Platform EEH operation not found\n",
828 } else if ((ret = eeh_ops->init())) {
829 pr_warning("%s: Failed to call platform init function (%d)\n",
834 /* Initialize EEH event */
835 ret = eeh_event_init();
839 /* Enable EEH for all adapters */
840 if (eeh_probe_mode_devtree()) {
841 list_for_each_entry_safe(hose, tmp,
842 &hose_list, list_node) {
844 traverse_pci_devices(phb, eeh_ops->of_probe, NULL);
846 } else if (eeh_probe_mode_dev()) {
847 list_for_each_entry_safe(hose, tmp,
848 &hose_list, list_node)
849 pci_walk_bus(hose->bus, eeh_ops->dev_probe, NULL);
851 pr_warning("%s: Invalid probe mode %d\n",
852 __func__, eeh_probe_mode);
857 * Call platform post-initialization. Actually, It's good chance
858 * to inform platform that EEH is ready to supply service if the
859 * I/O cache stuff has been built up.
861 if (eeh_ops->post_init) {
862 ret = eeh_ops->post_init();
868 pr_info("EEH: PCI Enhanced I/O Error Handling Enabled\n");
870 pr_warning("EEH: No capable adapters found\n");
875 core_initcall_sync(eeh_init);
878 * eeh_add_device_early - Enable EEH for the indicated device_node
879 * @dn: device node for which to set up EEH
881 * This routine must be used to perform EEH initialization for PCI
882 * devices that were added after system boot (e.g. hotplug, dlpar).
883 * This routine must be called before any i/o is performed to the
884 * adapter (inluding any config-space i/o).
885 * Whether this actually enables EEH or not for this device depends
886 * on the CEC architecture, type of the device, on earlier boot
887 * command-line arguments & etc.
889 void eeh_add_device_early(struct device_node *dn)
891 struct pci_controller *phb;
894 * If we're doing EEH probe based on PCI device, we
895 * would delay the probe until late stage because
896 * the PCI device isn't available this moment.
898 if (!eeh_probe_mode_devtree())
901 if (!of_node_to_eeh_dev(dn))
903 phb = of_node_to_eeh_dev(dn)->phb;
905 /* USB Bus children of PCI devices will not have BUID's */
906 if (NULL == phb || 0 == phb->buid)
909 eeh_ops->of_probe(dn, NULL);
913 * eeh_add_device_tree_early - Enable EEH for the indicated device
916 * This routine must be used to perform EEH initialization for the
917 * indicated PCI device that was added after system boot (e.g.
920 void eeh_add_device_tree_early(struct device_node *dn)
922 struct device_node *sib;
924 for_each_child_of_node(dn, sib)
925 eeh_add_device_tree_early(sib);
926 eeh_add_device_early(dn);
928 EXPORT_SYMBOL_GPL(eeh_add_device_tree_early);
931 * eeh_add_device_late - Perform EEH initialization for the indicated pci device
932 * @dev: pci device for which to set up EEH
934 * This routine must be used to complete EEH initialization for PCI
935 * devices that were added after system boot (e.g. hotplug, dlpar).
937 void eeh_add_device_late(struct pci_dev *dev)
939 struct device_node *dn;
940 struct eeh_dev *edev;
942 if (!dev || !eeh_enabled())
945 pr_debug("EEH: Adding device %s\n", pci_name(dev));
947 dn = pci_device_to_OF_node(dev);
948 edev = of_node_to_eeh_dev(dn);
949 if (edev->pdev == dev) {
950 pr_debug("EEH: Already referenced !\n");
955 * The EEH cache might not be removed correctly because of
956 * unbalanced kref to the device during unplug time, which
957 * relies on pcibios_release_device(). So we have to remove
958 * that here explicitly.
961 eeh_rmv_from_parent_pe(edev);
962 eeh_addr_cache_rmv_dev(edev->pdev);
963 eeh_sysfs_remove_device(edev->pdev);
964 edev->mode &= ~EEH_DEV_SYSFS;
967 * We definitely should have the PCI device removed
968 * though it wasn't correctly. So we needn't call
969 * into error handler afterwards.
971 edev->mode |= EEH_DEV_NO_HANDLER;
974 dev->dev.archdata.edev = NULL;
978 dev->dev.archdata.edev = edev;
981 * We have to do the EEH probe here because the PCI device
982 * hasn't been created yet in the early stage.
984 if (eeh_probe_mode_dev())
985 eeh_ops->dev_probe(dev, NULL);
987 eeh_addr_cache_insert_dev(dev);
991 * eeh_add_device_tree_late - Perform EEH initialization for the indicated PCI bus
994 * This routine must be used to perform EEH initialization for PCI
995 * devices which are attached to the indicated PCI bus. The PCI bus
996 * is added after system boot through hotplug or dlpar.
998 void eeh_add_device_tree_late(struct pci_bus *bus)
1000 struct pci_dev *dev;
1002 list_for_each_entry(dev, &bus->devices, bus_list) {
1003 eeh_add_device_late(dev);
1004 if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) {
1005 struct pci_bus *subbus = dev->subordinate;
1007 eeh_add_device_tree_late(subbus);
1011 EXPORT_SYMBOL_GPL(eeh_add_device_tree_late);
1014 * eeh_add_sysfs_files - Add EEH sysfs files for the indicated PCI bus
1017 * This routine must be used to add EEH sysfs files for PCI
1018 * devices which are attached to the indicated PCI bus. The PCI bus
1019 * is added after system boot through hotplug or dlpar.
1021 void eeh_add_sysfs_files(struct pci_bus *bus)
1023 struct pci_dev *dev;
1025 list_for_each_entry(dev, &bus->devices, bus_list) {
1026 eeh_sysfs_add_device(dev);
1027 if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) {
1028 struct pci_bus *subbus = dev->subordinate;
1030 eeh_add_sysfs_files(subbus);
1034 EXPORT_SYMBOL_GPL(eeh_add_sysfs_files);
1037 * eeh_remove_device - Undo EEH setup for the indicated pci device
1038 * @dev: pci device to be removed
1040 * This routine should be called when a device is removed from
1041 * a running system (e.g. by hotplug or dlpar). It unregisters
1042 * the PCI device from the EEH subsystem. I/O errors affecting
1043 * this device will no longer be detected after this call; thus,
1044 * i/o errors affecting this slot may leave this device unusable.
1046 void eeh_remove_device(struct pci_dev *dev)
1048 struct eeh_dev *edev;
1050 if (!dev || !eeh_enabled())
1052 edev = pci_dev_to_eeh_dev(dev);
1054 /* Unregister the device with the EEH/PCI address search system */
1055 pr_debug("EEH: Removing device %s\n", pci_name(dev));
1057 if (!edev || !edev->pdev || !edev->pe) {
1058 pr_debug("EEH: Not referenced !\n");
1063 * During the hotplug for EEH error recovery, we need the EEH
1064 * device attached to the parent PE in order for BAR restore
1065 * a bit later. So we keep it for BAR restore and remove it
1066 * from the parent PE during the BAR resotre.
1069 dev->dev.archdata.edev = NULL;
1070 if (!(edev->pe->state & EEH_PE_KEEP))
1071 eeh_rmv_from_parent_pe(edev);
1073 edev->mode |= EEH_DEV_DISCONNECTED;
1076 * We're removing from the PCI subsystem, that means
1077 * the PCI device driver can't support EEH or not
1078 * well. So we rely on hotplug completely to do recovery
1079 * for the specific PCI device.
1081 edev->mode |= EEH_DEV_NO_HANDLER;
1083 eeh_addr_cache_rmv_dev(dev);
1084 eeh_sysfs_remove_device(dev);
1085 edev->mode &= ~EEH_DEV_SYSFS;
1088 static int proc_eeh_show(struct seq_file *m, void *v)
1090 if (!eeh_enabled()) {
1091 seq_printf(m, "EEH Subsystem is globally disabled\n");
1092 seq_printf(m, "eeh_total_mmio_ffs=%llu\n", eeh_stats.total_mmio_ffs);
1094 seq_printf(m, "EEH Subsystem is enabled\n");
1097 "no device node=%llu\n"
1098 "no config address=%llu\n"
1099 "check not wanted=%llu\n"
1100 "eeh_total_mmio_ffs=%llu\n"
1101 "eeh_false_positives=%llu\n"
1102 "eeh_slot_resets=%llu\n",
1103 eeh_stats.no_device,
1105 eeh_stats.no_cfg_addr,
1106 eeh_stats.ignored_check,
1107 eeh_stats.total_mmio_ffs,
1108 eeh_stats.false_positives,
1109 eeh_stats.slot_resets);
1115 static int proc_eeh_open(struct inode *inode, struct file *file)
1117 return single_open(file, proc_eeh_show, NULL);
1120 static const struct file_operations proc_eeh_operations = {
1121 .open = proc_eeh_open,
1123 .llseek = seq_lseek,
1124 .release = single_release,
1127 static int __init eeh_init_proc(void)
1129 if (machine_is(pseries) || machine_is(powernv))
1130 proc_create("powerpc/eeh", 0, NULL, &proc_eeh_operations);
1133 __initcall(eeh_init_proc);