2 * Copyright IBM Corporation 2001, 2005, 2006
3 * Copyright Dave Engebretsen & Todd Inglett 2001
4 * Copyright Linas Vepstas 2005, 2006
5 * Copyright 2001-2012 IBM Corporation.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 * Please address comments and feedback to Linas Vepstas <linas@austin.ibm.com>
24 #include <linux/delay.h>
25 #include <linux/sched.h>
26 #include <linux/init.h>
27 #include <linux/list.h>
28 #include <linux/pci.h>
29 #include <linux/proc_fs.h>
30 #include <linux/rbtree.h>
31 #include <linux/reboot.h>
32 #include <linux/seq_file.h>
33 #include <linux/spinlock.h>
34 #include <linux/export.h>
37 #include <linux/atomic.h>
39 #include <asm/eeh_event.h>
41 #include <asm/machdep.h>
42 #include <asm/ppc-pci.h>
47 * EEH, or "Extended Error Handling" is a PCI bridge technology for
48 * dealing with PCI bus errors that can't be dealt with within the
49 * usual PCI framework, except by check-stopping the CPU. Systems
50 * that are designed for high-availability/reliability cannot afford
51 * to crash due to a "mere" PCI error, thus the need for EEH.
52 * An EEH-capable bridge operates by converting a detected error
53 * into a "slot freeze", taking the PCI adapter off-line, making
54 * the slot behave, from the OS'es point of view, as if the slot
55 * were "empty": all reads return 0xff's and all writes are silently
56 * ignored. EEH slot isolation events can be triggered by parity
57 * errors on the address or data busses (e.g. during posted writes),
58 * which in turn might be caused by low voltage on the bus, dust,
59 * vibration, humidity, radioactivity or plain-old failed hardware.
61 * Note, however, that one of the leading causes of EEH slot
62 * freeze events are buggy device drivers, buggy device microcode,
63 * or buggy device hardware. This is because any attempt by the
64 * device to bus-master data to a memory address that is not
65 * assigned to the device will trigger a slot freeze. (The idea
66 * is to prevent devices-gone-wild from corrupting system memory).
67 * Buggy hardware/drivers will have a miserable time co-existing
70 * Ideally, a PCI device driver, when suspecting that an isolation
71 * event has occurred (e.g. by reading 0xff's), will then ask EEH
72 * whether this is the case, and then take appropriate steps to
73 * reset the PCI slot, the PCI device, and then resume operations.
74 * However, until that day, the checking is done here, with the
75 * eeh_check_failure() routine embedded in the MMIO macros. If
76 * the slot is found to be isolated, an "EEH Event" is synthesized
77 * and sent out for processing.
80 /* If a device driver keeps reading an MMIO register in an interrupt
81 * handler after a slot isolation event, it might be broken.
82 * This sets the threshold for how many read attempts we allow
83 * before printing an error message.
85 #define EEH_MAX_FAILS 2100000
87 /* Time to wait for a PCI slot to report status, in milliseconds */
88 #define PCI_BUS_RESET_WAIT_MSEC (5*60*1000)
90 /* Platform dependent EEH operations */
91 struct eeh_ops *eeh_ops = NULL;
93 bool eeh_subsystem_enabled = false;
94 EXPORT_SYMBOL(eeh_subsystem_enabled);
97 * EEH probe mode support. The intention is to support multiple
98 * platforms for EEH. Some platforms like pSeries do PCI emunation
99 * based on device tree. However, other platforms like powernv probe
100 * PCI devices from hardware. The flag is used to distinguish that.
101 * In addition, struct eeh_ops::probe would be invoked for particular
102 * OF node or PCI device so that the corresponding PE would be created
107 /* Lock to avoid races due to multiple reports of an error */
108 DEFINE_RAW_SPINLOCK(confirm_error_lock);
110 /* Buffer for reporting pci register dumps. Its here in BSS, and
111 * not dynamically alloced, so that it ends up in RMO where RTAS
114 #define EEH_PCI_REGS_LOG_LEN 4096
115 static unsigned char pci_regs_buf[EEH_PCI_REGS_LOG_LEN];
118 * The struct is used to maintain the EEH global statistic
119 * information. Besides, the EEH global statistics will be
120 * exported to user space through procfs
123 u64 no_device; /* PCI device not found */
124 u64 no_dn; /* OF node not found */
125 u64 no_cfg_addr; /* Config address not found */
126 u64 ignored_check; /* EEH check skipped */
127 u64 total_mmio_ffs; /* Total EEH checks */
128 u64 false_positives; /* Unnecessary EEH checks */
129 u64 slot_resets; /* PE reset */
132 static struct eeh_stats eeh_stats;
134 #define IS_BRIDGE(class_code) (((class_code)<<16) == PCI_BASE_CLASS_BRIDGE)
137 * eeh_gather_pci_data - Copy assorted PCI config space registers to buff
138 * @edev: device to report data for
139 * @buf: point to buffer in which to log
140 * @len: amount of room in buffer
142 * This routine captures assorted PCI configuration space data,
143 * and puts them into a buffer for RTAS error logging.
145 static size_t eeh_gather_pci_data(struct eeh_dev *edev, char * buf, size_t len)
147 struct device_node *dn = eeh_dev_to_of_node(edev);
152 n += scnprintf(buf+n, len-n, "%s\n", dn->full_name);
153 pr_warn("EEH: of node=%s\n", dn->full_name);
155 eeh_ops->read_config(dn, PCI_VENDOR_ID, 4, &cfg);
156 n += scnprintf(buf+n, len-n, "dev/vend:%08x\n", cfg);
157 pr_warn("EEH: PCI device/vendor: %08x\n", cfg);
159 eeh_ops->read_config(dn, PCI_COMMAND, 4, &cfg);
160 n += scnprintf(buf+n, len-n, "cmd/stat:%x\n", cfg);
161 pr_warn("EEH: PCI cmd/status register: %08x\n", cfg);
163 /* Gather bridge-specific registers */
164 if (edev->mode & EEH_DEV_BRIDGE) {
165 eeh_ops->read_config(dn, PCI_SEC_STATUS, 2, &cfg);
166 n += scnprintf(buf+n, len-n, "sec stat:%x\n", cfg);
167 pr_warn("EEH: Bridge secondary status: %04x\n", cfg);
169 eeh_ops->read_config(dn, PCI_BRIDGE_CONTROL, 2, &cfg);
170 n += scnprintf(buf+n, len-n, "brdg ctl:%x\n", cfg);
171 pr_warn("EEH: Bridge control: %04x\n", cfg);
174 /* Dump out the PCI-X command and status regs */
175 cap = edev->pcix_cap;
177 eeh_ops->read_config(dn, cap, 4, &cfg);
178 n += scnprintf(buf+n, len-n, "pcix-cmd:%x\n", cfg);
179 pr_warn("EEH: PCI-X cmd: %08x\n", cfg);
181 eeh_ops->read_config(dn, cap+4, 4, &cfg);
182 n += scnprintf(buf+n, len-n, "pcix-stat:%x\n", cfg);
183 pr_warn("EEH: PCI-X status: %08x\n", cfg);
186 /* If PCI-E capable, dump PCI-E cap 10 */
187 cap = edev->pcie_cap;
189 n += scnprintf(buf+n, len-n, "pci-e cap10:\n");
190 pr_warn("EEH: PCI-E capabilities and status follow:\n");
192 for (i=0; i<=8; i++) {
193 eeh_ops->read_config(dn, cap+4*i, 4, &cfg);
194 n += scnprintf(buf+n, len-n, "%02x:%x\n", 4*i, cfg);
195 pr_warn("EEH: PCI-E %02x: %08x\n", i, cfg);
199 /* If AER capable, dump it */
202 n += scnprintf(buf+n, len-n, "pci-e AER:\n");
203 pr_warn("EEH: PCI-E AER capability register set follows:\n");
205 for (i=0; i<14; i++) {
206 eeh_ops->read_config(dn, cap+4*i, 4, &cfg);
207 n += scnprintf(buf+n, len-n, "%02x:%x\n", 4*i, cfg);
208 pr_warn("EEH: PCI-E AER %02x: %08x\n", i, cfg);
216 * eeh_slot_error_detail - Generate combined log including driver log and error log
218 * @severity: temporary or permanent error log
220 * This routine should be called to generate the combined log, which
221 * is comprised of driver log and error log. The driver log is figured
222 * out from the config space of the corresponding PCI device, while
223 * the error log is fetched through platform dependent function call.
225 void eeh_slot_error_detail(struct eeh_pe *pe, int severity)
228 struct eeh_dev *edev, *tmp;
231 * When the PHB is fenced or dead, it's pointless to collect
232 * the data from PCI config space because it should return
233 * 0xFF's. For ER, we still retrieve the data from the PCI
236 * For pHyp, we have to enable IO for log retrieval. Otherwise,
237 * 0xFF's is always returned from PCI config space.
239 if (!(pe->type & EEH_PE_PHB)) {
240 if (eeh_probe_mode_devtree())
241 eeh_pci_enable(pe, EEH_OPT_THAW_MMIO);
242 eeh_ops->configure_bridge(pe);
243 eeh_pe_restore_bars(pe);
246 eeh_pe_for_each_dev(pe, edev, tmp) {
247 loglen += eeh_gather_pci_data(edev, pci_regs_buf + loglen,
248 EEH_PCI_REGS_LOG_LEN - loglen);
252 eeh_ops->get_log(pe, severity, pci_regs_buf, loglen);
256 * eeh_token_to_phys - Convert EEH address token to phys address
257 * @token: I/O token, should be address in the form 0xA....
259 * This routine should be called to convert virtual I/O address
262 static inline unsigned long eeh_token_to_phys(unsigned long token)
269 * We won't find hugepages here, iomem
271 ptep = find_linux_pte_or_hugepte(init_mm.pgd, token, &hugepage_shift);
274 WARN_ON(hugepage_shift);
275 pa = pte_pfn(*ptep) << PAGE_SHIFT;
277 return pa | (token & (PAGE_SIZE-1));
281 * On PowerNV platform, we might already have fenced PHB there.
282 * For that case, it's meaningless to recover frozen PE. Intead,
283 * We have to handle fenced PHB firstly.
285 static int eeh_phb_check_failure(struct eeh_pe *pe)
287 struct eeh_pe *phb_pe;
291 if (!eeh_probe_mode_dev())
294 /* Find the PHB PE */
295 phb_pe = eeh_phb_pe_get(pe->phb);
297 pr_warning("%s Can't find PE for PHB#%d\n",
298 __func__, pe->phb->global_number);
302 /* If the PHB has been in problematic state */
303 eeh_serialize_lock(&flags);
304 if (phb_pe->state & EEH_PE_ISOLATED) {
309 /* Check PHB state */
310 ret = eeh_ops->get_state(phb_pe, NULL);
312 (ret == EEH_STATE_NOT_SUPPORT) ||
313 (ret & (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE)) ==
314 (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE)) {
319 /* Isolate the PHB and send event */
320 eeh_pe_state_mark(phb_pe, EEH_PE_ISOLATED);
321 eeh_serialize_unlock(flags);
323 pr_err("EEH: PHB#%x failure detected\n",
324 phb_pe->phb->global_number);
326 eeh_send_failure_event(phb_pe);
330 eeh_serialize_unlock(flags);
335 * eeh_dev_check_failure - Check if all 1's data is due to EEH slot freeze
338 * Check for an EEH failure for the given device node. Call this
339 * routine if the result of a read was all 0xff's and you want to
340 * find out if this is due to an EEH slot freeze. This routine
341 * will query firmware for the EEH status.
343 * Returns 0 if there has not been an EEH error; otherwise returns
344 * a non-zero value and queues up a slot isolation event notification.
346 * It is safe to call this routine in an interrupt context.
348 int eeh_dev_check_failure(struct eeh_dev *edev)
352 struct device_node *dn;
356 const char *location;
358 eeh_stats.total_mmio_ffs++;
367 dn = eeh_dev_to_of_node(edev);
368 dev = eeh_dev_to_pci_dev(edev);
371 /* Access to IO BARs might get this far and still not want checking. */
373 eeh_stats.ignored_check++;
374 pr_debug("EEH: Ignored check for %s %s\n",
375 eeh_pci_name(dev), dn->full_name);
379 if (!pe->addr && !pe->config_addr) {
380 eeh_stats.no_cfg_addr++;
385 * On PowerNV platform, we might already have fenced PHB
386 * there and we need take care of that firstly.
388 ret = eeh_phb_check_failure(pe);
392 /* If we already have a pending isolation event for this
393 * slot, we know it's bad already, we don't need to check.
394 * Do this checking under a lock; as multiple PCI devices
395 * in one slot might report errors simultaneously, and we
396 * only want one error recovery routine running.
398 eeh_serialize_lock(&flags);
400 if (pe->state & EEH_PE_ISOLATED) {
402 if (pe->check_count % EEH_MAX_FAILS == 0) {
403 location = of_get_property(dn, "ibm,loc-code", NULL);
404 printk(KERN_ERR "EEH: %d reads ignored for recovering device at "
405 "location=%s driver=%s pci addr=%s\n",
406 pe->check_count, location,
407 eeh_driver_name(dev), eeh_pci_name(dev));
408 printk(KERN_ERR "EEH: Might be infinite loop in %s driver\n",
409 eeh_driver_name(dev));
416 * Now test for an EEH failure. This is VERY expensive.
417 * Note that the eeh_config_addr may be a parent device
418 * in the case of a device behind a bridge, or it may be
419 * function zero of a multi-function device.
420 * In any case they must share a common PHB.
422 ret = eeh_ops->get_state(pe, NULL);
424 /* Note that config-io to empty slots may fail;
425 * they are empty when they don't have children.
426 * We will punt with the following conditions: Failure to get
427 * PE's state, EEH not support and Permanently unavailable
428 * state, PE is in good state.
431 (ret == EEH_STATE_NOT_SUPPORT) ||
432 (ret & (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE)) ==
433 (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE)) {
434 eeh_stats.false_positives++;
435 pe->false_positives++;
440 eeh_stats.slot_resets++;
442 /* Avoid repeated reports of this failure, including problems
443 * with other functions on this device, and functions under
446 eeh_pe_state_mark(pe, EEH_PE_ISOLATED);
447 eeh_serialize_unlock(flags);
449 /* Most EEH events are due to device driver bugs. Having
450 * a stack trace will help the device-driver authors figure
451 * out what happened. So print that out.
453 pr_err("EEH: Frozen PE#%x detected on PHB#%x\n",
454 pe->addr, pe->phb->global_number);
457 eeh_send_failure_event(pe);
462 eeh_serialize_unlock(flags);
466 EXPORT_SYMBOL_GPL(eeh_dev_check_failure);
469 * eeh_check_failure - Check if all 1's data is due to EEH slot freeze
470 * @token: I/O token, should be address in the form 0xA....
471 * @val: value, should be all 1's (XXX why do we need this arg??)
473 * Check for an EEH failure at the given token address. Call this
474 * routine if the result of a read was all 0xff's and you want to
475 * find out if this is due to an EEH slot freeze event. This routine
476 * will query firmware for the EEH status.
478 * Note this routine is safe to call in an interrupt context.
480 unsigned long eeh_check_failure(const volatile void __iomem *token, unsigned long val)
483 struct eeh_dev *edev;
485 /* Finding the phys addr + pci device; this is pretty quick. */
486 addr = eeh_token_to_phys((unsigned long __force) token);
487 edev = eeh_addr_cache_get_dev(addr);
489 eeh_stats.no_device++;
493 eeh_dev_check_failure(edev);
497 EXPORT_SYMBOL(eeh_check_failure);
501 * eeh_pci_enable - Enable MMIO or DMA transfers for this slot
504 * This routine should be called to reenable frozen MMIO or DMA
505 * so that it would work correctly again. It's useful while doing
506 * recovery or log collection on the indicated device.
508 int eeh_pci_enable(struct eeh_pe *pe, int function)
510 int rc, flags = (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE);
513 * pHyp doesn't allow to enable IO or DMA on unfrozen PE.
514 * Also, it's pointless to enable them on unfrozen PE. So
515 * we have the check here.
517 if (function == EEH_OPT_THAW_MMIO ||
518 function == EEH_OPT_THAW_DMA) {
519 rc = eeh_ops->get_state(pe, NULL);
523 /* Needn't to enable or already enabled */
524 if ((rc == EEH_STATE_NOT_SUPPORT) ||
525 ((rc & flags) == flags))
529 rc = eeh_ops->set_option(pe, function);
531 pr_warn("%s: Unexpected state change %d on "
532 "PHB#%d-PE#%x, err=%d\n",
533 __func__, function, pe->phb->global_number,
536 rc = eeh_ops->wait_state(pe, PCI_BUS_RESET_WAIT_MSEC);
540 if ((function == EEH_OPT_THAW_MMIO) &&
541 (rc & EEH_STATE_MMIO_ENABLED))
544 if ((function == EEH_OPT_THAW_DMA) &&
545 (rc & EEH_STATE_DMA_ENABLED))
552 * pcibios_set_pcie_slot_reset - Set PCI-E reset state
553 * @dev: pci device struct
554 * @state: reset state to enter
559 int pcibios_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state state)
561 struct eeh_dev *edev = pci_dev_to_eeh_dev(dev);
562 struct eeh_pe *pe = edev->pe;
565 pr_err("%s: No PE found on PCI device %s\n",
566 __func__, pci_name(dev));
571 case pcie_deassert_reset:
572 eeh_ops->reset(pe, EEH_RESET_DEACTIVATE);
575 eeh_ops->reset(pe, EEH_RESET_HOT);
577 case pcie_warm_reset:
578 eeh_ops->reset(pe, EEH_RESET_FUNDAMENTAL);
588 * eeh_set_pe_freset - Check the required reset for the indicated device
590 * @flag: return value
592 * Each device might have its preferred reset type: fundamental or
593 * hot reset. The routine is used to collected the information for
594 * the indicated device and its children so that the bunch of the
595 * devices could be reset properly.
597 static void *eeh_set_dev_freset(void *data, void *flag)
600 unsigned int *freset = (unsigned int *)flag;
601 struct eeh_dev *edev = (struct eeh_dev *)data;
603 dev = eeh_dev_to_pci_dev(edev);
605 *freset |= dev->needs_freset;
611 * eeh_reset_pe_once - Assert the pci #RST line for 1/4 second
614 * Assert the PCI #RST line for 1/4 second.
616 static void eeh_reset_pe_once(struct eeh_pe *pe)
618 unsigned int freset = 0;
620 /* Determine type of EEH reset required for
621 * Partitionable Endpoint, a hot-reset (1)
622 * or a fundamental reset (3).
623 * A fundamental reset required by any device under
624 * Partitionable Endpoint trumps hot-reset.
626 eeh_pe_dev_traverse(pe, eeh_set_dev_freset, &freset);
629 eeh_ops->reset(pe, EEH_RESET_FUNDAMENTAL);
631 eeh_ops->reset(pe, EEH_RESET_HOT);
633 /* The PCI bus requires that the reset be held high for at least
634 * a 100 milliseconds. We wait a bit longer 'just in case'.
636 #define PCI_BUS_RST_HOLD_TIME_MSEC 250
637 msleep(PCI_BUS_RST_HOLD_TIME_MSEC);
639 eeh_ops->reset(pe, EEH_RESET_DEACTIVATE);
641 /* After a PCI slot has been reset, the PCI Express spec requires
642 * a 1.5 second idle time for the bus to stabilize, before starting
645 #define PCI_BUS_SETTLE_TIME_MSEC 1800
646 msleep(PCI_BUS_SETTLE_TIME_MSEC);
650 * eeh_reset_pe - Reset the indicated PE
653 * This routine should be called to reset indicated device, including
654 * PE. A PE might include multiple PCI devices and sometimes PCI bridges
655 * might be involved as well.
657 int eeh_reset_pe(struct eeh_pe *pe)
659 int flags = (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE);
662 /* Take three shots at resetting the bus */
663 for (i=0; i<3; i++) {
664 eeh_reset_pe_once(pe);
667 * EEH_PE_ISOLATED is expected to be removed after
670 rc = eeh_ops->wait_state(pe, PCI_BUS_RESET_WAIT_MSEC);
671 if ((rc & flags) == flags)
675 pr_err("%s: Unrecoverable slot failure on PHB#%d-PE#%x",
676 __func__, pe->phb->global_number, pe->addr);
679 pr_err("EEH: bus reset %d failed on PHB#%d-PE#%x, rc=%d\n",
680 i+1, pe->phb->global_number, pe->addr, rc);
687 * eeh_save_bars - Save device bars
688 * @edev: PCI device associated EEH device
690 * Save the values of the device bars. Unlike the restore
691 * routine, this routine is *not* recursive. This is because
692 * PCI devices are added individually; but, for the restore,
693 * an entire slot is reset at a time.
695 void eeh_save_bars(struct eeh_dev *edev)
698 struct device_node *dn;
702 dn = eeh_dev_to_of_node(edev);
704 for (i = 0; i < 16; i++)
705 eeh_ops->read_config(dn, i * 4, 4, &edev->config_space[i]);
708 * For PCI bridges including root port, we need enable bus
709 * master explicitly. Otherwise, it can't fetch IODA table
710 * entries correctly. So we cache the bit in advance so that
711 * we can restore it after reset, either PHB range or PE range.
713 if (edev->mode & EEH_DEV_BRIDGE)
714 edev->config_space[1] |= PCI_COMMAND_MASTER;
718 * eeh_ops_register - Register platform dependent EEH operations
719 * @ops: platform dependent EEH operations
721 * Register the platform dependent EEH operation callback
722 * functions. The platform should call this function before
723 * any other EEH operations.
725 int __init eeh_ops_register(struct eeh_ops *ops)
728 pr_warning("%s: Invalid EEH ops name for %p\n",
733 if (eeh_ops && eeh_ops != ops) {
734 pr_warning("%s: EEH ops of platform %s already existing (%s)\n",
735 __func__, eeh_ops->name, ops->name);
745 * eeh_ops_unregister - Unreigster platform dependent EEH operations
746 * @name: name of EEH platform operations
748 * Unregister the platform dependent EEH operation callback
751 int __exit eeh_ops_unregister(const char *name)
753 if (!name || !strlen(name)) {
754 pr_warning("%s: Invalid EEH ops name\n",
759 if (eeh_ops && !strcmp(eeh_ops->name, name)) {
767 static int eeh_reboot_notifier(struct notifier_block *nb,
768 unsigned long action, void *unused)
770 eeh_set_enable(false);
774 static struct notifier_block eeh_reboot_nb = {
775 .notifier_call = eeh_reboot_notifier,
779 * eeh_init - EEH initialization
781 * Initialize EEH by trying to enable it for all of the adapters in the system.
782 * As a side effect we can determine here if eeh is supported at all.
783 * Note that we leave EEH on so failed config cycles won't cause a machine
784 * check. If a user turns off EEH for a particular adapter they are really
785 * telling Linux to ignore errors. Some hardware (e.g. POWER5) won't
786 * grant access to a slot if EEH isn't enabled, and so we always enable
787 * EEH for all slots/all devices.
789 * The eeh-force-off option disables EEH checking globally, for all slots.
790 * Even if force-off is set, the EEH hardware is still enabled, so that
791 * newer systems can boot.
795 struct pci_controller *hose, *tmp;
796 struct device_node *phb;
801 * We have to delay the initialization on PowerNV after
802 * the PCI hierarchy tree has been built because the PEs
803 * are figured out based on PCI devices instead of device
806 if (machine_is(powernv) && cnt++ <= 0)
809 /* Register reboot notifier */
810 ret = register_reboot_notifier(&eeh_reboot_nb);
812 pr_warn("%s: Failed to register notifier (%d)\n",
817 /* call platform initialization function */
819 pr_warning("%s: Platform EEH operation not found\n",
822 } else if ((ret = eeh_ops->init())) {
823 pr_warning("%s: Failed to call platform init function (%d)\n",
828 /* Initialize EEH event */
829 ret = eeh_event_init();
833 /* Enable EEH for all adapters */
834 if (eeh_probe_mode_devtree()) {
835 list_for_each_entry_safe(hose, tmp,
836 &hose_list, list_node) {
838 traverse_pci_devices(phb, eeh_ops->of_probe, NULL);
840 } else if (eeh_probe_mode_dev()) {
841 list_for_each_entry_safe(hose, tmp,
842 &hose_list, list_node)
843 pci_walk_bus(hose->bus, eeh_ops->dev_probe, NULL);
845 pr_warning("%s: Invalid probe mode %d\n",
846 __func__, eeh_probe_mode);
851 * Call platform post-initialization. Actually, It's good chance
852 * to inform platform that EEH is ready to supply service if the
853 * I/O cache stuff has been built up.
855 if (eeh_ops->post_init) {
856 ret = eeh_ops->post_init();
862 pr_info("EEH: PCI Enhanced I/O Error Handling Enabled\n");
864 pr_warning("EEH: No capable adapters found\n");
869 core_initcall_sync(eeh_init);
872 * eeh_add_device_early - Enable EEH for the indicated device_node
873 * @dn: device node for which to set up EEH
875 * This routine must be used to perform EEH initialization for PCI
876 * devices that were added after system boot (e.g. hotplug, dlpar).
877 * This routine must be called before any i/o is performed to the
878 * adapter (inluding any config-space i/o).
879 * Whether this actually enables EEH or not for this device depends
880 * on the CEC architecture, type of the device, on earlier boot
881 * command-line arguments & etc.
883 void eeh_add_device_early(struct device_node *dn)
885 struct pci_controller *phb;
888 * If we're doing EEH probe based on PCI device, we
889 * would delay the probe until late stage because
890 * the PCI device isn't available this moment.
892 if (!eeh_probe_mode_devtree())
895 if (!of_node_to_eeh_dev(dn))
897 phb = of_node_to_eeh_dev(dn)->phb;
899 /* USB Bus children of PCI devices will not have BUID's */
900 if (NULL == phb || 0 == phb->buid)
903 eeh_ops->of_probe(dn, NULL);
907 * eeh_add_device_tree_early - Enable EEH for the indicated device
910 * This routine must be used to perform EEH initialization for the
911 * indicated PCI device that was added after system boot (e.g.
914 void eeh_add_device_tree_early(struct device_node *dn)
916 struct device_node *sib;
918 for_each_child_of_node(dn, sib)
919 eeh_add_device_tree_early(sib);
920 eeh_add_device_early(dn);
922 EXPORT_SYMBOL_GPL(eeh_add_device_tree_early);
925 * eeh_add_device_late - Perform EEH initialization for the indicated pci device
926 * @dev: pci device for which to set up EEH
928 * This routine must be used to complete EEH initialization for PCI
929 * devices that were added after system boot (e.g. hotplug, dlpar).
931 void eeh_add_device_late(struct pci_dev *dev)
933 struct device_node *dn;
934 struct eeh_dev *edev;
936 if (!dev || !eeh_enabled())
939 pr_debug("EEH: Adding device %s\n", pci_name(dev));
941 dn = pci_device_to_OF_node(dev);
942 edev = of_node_to_eeh_dev(dn);
943 if (edev->pdev == dev) {
944 pr_debug("EEH: Already referenced !\n");
949 * The EEH cache might not be removed correctly because of
950 * unbalanced kref to the device during unplug time, which
951 * relies on pcibios_release_device(). So we have to remove
952 * that here explicitly.
955 eeh_rmv_from_parent_pe(edev);
956 eeh_addr_cache_rmv_dev(edev->pdev);
957 eeh_sysfs_remove_device(edev->pdev);
958 edev->mode &= ~EEH_DEV_SYSFS;
961 * We definitely should have the PCI device removed
962 * though it wasn't correctly. So we needn't call
963 * into error handler afterwards.
965 edev->mode |= EEH_DEV_NO_HANDLER;
968 dev->dev.archdata.edev = NULL;
972 dev->dev.archdata.edev = edev;
975 * We have to do the EEH probe here because the PCI device
976 * hasn't been created yet in the early stage.
978 if (eeh_probe_mode_dev())
979 eeh_ops->dev_probe(dev, NULL);
981 eeh_addr_cache_insert_dev(dev);
985 * eeh_add_device_tree_late - Perform EEH initialization for the indicated PCI bus
988 * This routine must be used to perform EEH initialization for PCI
989 * devices which are attached to the indicated PCI bus. The PCI bus
990 * is added after system boot through hotplug or dlpar.
992 void eeh_add_device_tree_late(struct pci_bus *bus)
996 list_for_each_entry(dev, &bus->devices, bus_list) {
997 eeh_add_device_late(dev);
998 if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) {
999 struct pci_bus *subbus = dev->subordinate;
1001 eeh_add_device_tree_late(subbus);
1005 EXPORT_SYMBOL_GPL(eeh_add_device_tree_late);
1008 * eeh_add_sysfs_files - Add EEH sysfs files for the indicated PCI bus
1011 * This routine must be used to add EEH sysfs files for PCI
1012 * devices which are attached to the indicated PCI bus. The PCI bus
1013 * is added after system boot through hotplug or dlpar.
1015 void eeh_add_sysfs_files(struct pci_bus *bus)
1017 struct pci_dev *dev;
1019 list_for_each_entry(dev, &bus->devices, bus_list) {
1020 eeh_sysfs_add_device(dev);
1021 if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) {
1022 struct pci_bus *subbus = dev->subordinate;
1024 eeh_add_sysfs_files(subbus);
1028 EXPORT_SYMBOL_GPL(eeh_add_sysfs_files);
1031 * eeh_remove_device - Undo EEH setup for the indicated pci device
1032 * @dev: pci device to be removed
1034 * This routine should be called when a device is removed from
1035 * a running system (e.g. by hotplug or dlpar). It unregisters
1036 * the PCI device from the EEH subsystem. I/O errors affecting
1037 * this device will no longer be detected after this call; thus,
1038 * i/o errors affecting this slot may leave this device unusable.
1040 void eeh_remove_device(struct pci_dev *dev)
1042 struct eeh_dev *edev;
1044 if (!dev || !eeh_enabled())
1046 edev = pci_dev_to_eeh_dev(dev);
1048 /* Unregister the device with the EEH/PCI address search system */
1049 pr_debug("EEH: Removing device %s\n", pci_name(dev));
1051 if (!edev || !edev->pdev || !edev->pe) {
1052 pr_debug("EEH: Not referenced !\n");
1057 * During the hotplug for EEH error recovery, we need the EEH
1058 * device attached to the parent PE in order for BAR restore
1059 * a bit later. So we keep it for BAR restore and remove it
1060 * from the parent PE during the BAR resotre.
1063 dev->dev.archdata.edev = NULL;
1064 if (!(edev->pe->state & EEH_PE_KEEP))
1065 eeh_rmv_from_parent_pe(edev);
1067 edev->mode |= EEH_DEV_DISCONNECTED;
1070 * We're removing from the PCI subsystem, that means
1071 * the PCI device driver can't support EEH or not
1072 * well. So we rely on hotplug completely to do recovery
1073 * for the specific PCI device.
1075 edev->mode |= EEH_DEV_NO_HANDLER;
1077 eeh_addr_cache_rmv_dev(dev);
1078 eeh_sysfs_remove_device(dev);
1079 edev->mode &= ~EEH_DEV_SYSFS;
1082 static int proc_eeh_show(struct seq_file *m, void *v)
1084 if (!eeh_enabled()) {
1085 seq_printf(m, "EEH Subsystem is globally disabled\n");
1086 seq_printf(m, "eeh_total_mmio_ffs=%llu\n", eeh_stats.total_mmio_ffs);
1088 seq_printf(m, "EEH Subsystem is enabled\n");
1091 "no device node=%llu\n"
1092 "no config address=%llu\n"
1093 "check not wanted=%llu\n"
1094 "eeh_total_mmio_ffs=%llu\n"
1095 "eeh_false_positives=%llu\n"
1096 "eeh_slot_resets=%llu\n",
1097 eeh_stats.no_device,
1099 eeh_stats.no_cfg_addr,
1100 eeh_stats.ignored_check,
1101 eeh_stats.total_mmio_ffs,
1102 eeh_stats.false_positives,
1103 eeh_stats.slot_resets);
1109 static int proc_eeh_open(struct inode *inode, struct file *file)
1111 return single_open(file, proc_eeh_show, NULL);
1114 static const struct file_operations proc_eeh_operations = {
1115 .open = proc_eeh_open,
1117 .llseek = seq_lseek,
1118 .release = single_release,
1121 static int __init eeh_init_proc(void)
1123 if (machine_is(pseries) || machine_is(powernv))
1124 proc_create("powerpc/eeh", 0, NULL, &proc_eeh_operations);
1127 __initcall(eeh_init_proc);