2 * Copyright IBM Corporation 2001, 2005, 2006
3 * Copyright Dave Engebretsen & Todd Inglett 2001
4 * Copyright Linas Vepstas 2005, 2006
5 * Copyright 2001-2012 IBM Corporation.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 * Please address comments and feedback to Linas Vepstas <linas@austin.ibm.com>
24 #include <linux/delay.h>
25 #include <linux/debugfs.h>
26 #include <linux/sched.h>
27 #include <linux/init.h>
28 #include <linux/list.h>
29 #include <linux/pci.h>
30 #include <linux/proc_fs.h>
31 #include <linux/rbtree.h>
32 #include <linux/reboot.h>
33 #include <linux/seq_file.h>
34 #include <linux/spinlock.h>
35 #include <linux/export.h>
38 #include <linux/atomic.h>
39 #include <asm/debug.h>
41 #include <asm/eeh_event.h>
43 #include <asm/machdep.h>
44 #include <asm/ppc-pci.h>
49 * EEH, or "Extended Error Handling" is a PCI bridge technology for
50 * dealing with PCI bus errors that can't be dealt with within the
51 * usual PCI framework, except by check-stopping the CPU. Systems
52 * that are designed for high-availability/reliability cannot afford
53 * to crash due to a "mere" PCI error, thus the need for EEH.
54 * An EEH-capable bridge operates by converting a detected error
55 * into a "slot freeze", taking the PCI adapter off-line, making
56 * the slot behave, from the OS'es point of view, as if the slot
57 * were "empty": all reads return 0xff's and all writes are silently
58 * ignored. EEH slot isolation events can be triggered by parity
59 * errors on the address or data busses (e.g. during posted writes),
60 * which in turn might be caused by low voltage on the bus, dust,
61 * vibration, humidity, radioactivity or plain-old failed hardware.
63 * Note, however, that one of the leading causes of EEH slot
64 * freeze events are buggy device drivers, buggy device microcode,
65 * or buggy device hardware. This is because any attempt by the
66 * device to bus-master data to a memory address that is not
67 * assigned to the device will trigger a slot freeze. (The idea
68 * is to prevent devices-gone-wild from corrupting system memory).
69 * Buggy hardware/drivers will have a miserable time co-existing
72 * Ideally, a PCI device driver, when suspecting that an isolation
73 * event has occurred (e.g. by reading 0xff's), will then ask EEH
74 * whether this is the case, and then take appropriate steps to
75 * reset the PCI slot, the PCI device, and then resume operations.
76 * However, until that day, the checking is done here, with the
77 * eeh_check_failure() routine embedded in the MMIO macros. If
78 * the slot is found to be isolated, an "EEH Event" is synthesized
79 * and sent out for processing.
82 /* If a device driver keeps reading an MMIO register in an interrupt
83 * handler after a slot isolation event, it might be broken.
84 * This sets the threshold for how many read attempts we allow
85 * before printing an error message.
87 #define EEH_MAX_FAILS 2100000
89 /* Time to wait for a PCI slot to report status, in milliseconds */
90 #define PCI_BUS_RESET_WAIT_MSEC (5*60*1000)
93 * EEH probe mode support, which is part of the flags,
94 * is to support multiple platforms for EEH. Some platforms
95 * like pSeries do PCI emunation based on device tree.
96 * However, other platforms like powernv probe PCI devices
97 * from hardware. The flag is used to distinguish that.
98 * In addition, struct eeh_ops::probe would be invoked for
99 * particular OF node or PCI device so that the corresponding
100 * PE would be created there.
102 int eeh_subsystem_flags;
103 EXPORT_SYMBOL(eeh_subsystem_flags);
105 /* Platform dependent EEH operations */
106 struct eeh_ops *eeh_ops = NULL;
108 /* Lock to avoid races due to multiple reports of an error */
109 DEFINE_RAW_SPINLOCK(confirm_error_lock);
111 /* Buffer for reporting pci register dumps. Its here in BSS, and
112 * not dynamically alloced, so that it ends up in RMO where RTAS
115 #define EEH_PCI_REGS_LOG_LEN 4096
116 static unsigned char pci_regs_buf[EEH_PCI_REGS_LOG_LEN];
119 * The struct is used to maintain the EEH global statistic
120 * information. Besides, the EEH global statistics will be
121 * exported to user space through procfs
124 u64 no_device; /* PCI device not found */
125 u64 no_dn; /* OF node not found */
126 u64 no_cfg_addr; /* Config address not found */
127 u64 ignored_check; /* EEH check skipped */
128 u64 total_mmio_ffs; /* Total EEH checks */
129 u64 false_positives; /* Unnecessary EEH checks */
130 u64 slot_resets; /* PE reset */
133 static struct eeh_stats eeh_stats;
135 #define IS_BRIDGE(class_code) (((class_code)<<16) == PCI_BASE_CLASS_BRIDGE)
137 static int __init eeh_setup(char *str)
139 if (!strcmp(str, "off"))
140 eeh_subsystem_flags |= EEH_FORCE_DISABLED;
144 __setup("eeh=", eeh_setup);
147 * eeh_gather_pci_data - Copy assorted PCI config space registers to buff
148 * @edev: device to report data for
149 * @buf: point to buffer in which to log
150 * @len: amount of room in buffer
152 * This routine captures assorted PCI configuration space data,
153 * and puts them into a buffer for RTAS error logging.
155 static size_t eeh_gather_pci_data(struct eeh_dev *edev, char * buf, size_t len)
157 struct device_node *dn = eeh_dev_to_of_node(edev);
162 n += scnprintf(buf+n, len-n, "%s\n", dn->full_name);
163 pr_warn("EEH: of node=%s\n", dn->full_name);
165 eeh_ops->read_config(dn, PCI_VENDOR_ID, 4, &cfg);
166 n += scnprintf(buf+n, len-n, "dev/vend:%08x\n", cfg);
167 pr_warn("EEH: PCI device/vendor: %08x\n", cfg);
169 eeh_ops->read_config(dn, PCI_COMMAND, 4, &cfg);
170 n += scnprintf(buf+n, len-n, "cmd/stat:%x\n", cfg);
171 pr_warn("EEH: PCI cmd/status register: %08x\n", cfg);
173 /* Gather bridge-specific registers */
174 if (edev->mode & EEH_DEV_BRIDGE) {
175 eeh_ops->read_config(dn, PCI_SEC_STATUS, 2, &cfg);
176 n += scnprintf(buf+n, len-n, "sec stat:%x\n", cfg);
177 pr_warn("EEH: Bridge secondary status: %04x\n", cfg);
179 eeh_ops->read_config(dn, PCI_BRIDGE_CONTROL, 2, &cfg);
180 n += scnprintf(buf+n, len-n, "brdg ctl:%x\n", cfg);
181 pr_warn("EEH: Bridge control: %04x\n", cfg);
184 /* Dump out the PCI-X command and status regs */
185 cap = edev->pcix_cap;
187 eeh_ops->read_config(dn, cap, 4, &cfg);
188 n += scnprintf(buf+n, len-n, "pcix-cmd:%x\n", cfg);
189 pr_warn("EEH: PCI-X cmd: %08x\n", cfg);
191 eeh_ops->read_config(dn, cap+4, 4, &cfg);
192 n += scnprintf(buf+n, len-n, "pcix-stat:%x\n", cfg);
193 pr_warn("EEH: PCI-X status: %08x\n", cfg);
196 /* If PCI-E capable, dump PCI-E cap 10 */
197 cap = edev->pcie_cap;
199 n += scnprintf(buf+n, len-n, "pci-e cap10:\n");
200 pr_warn("EEH: PCI-E capabilities and status follow:\n");
202 for (i=0; i<=8; i++) {
203 eeh_ops->read_config(dn, cap+4*i, 4, &cfg);
204 n += scnprintf(buf+n, len-n, "%02x:%x\n", 4*i, cfg);
205 pr_warn("EEH: PCI-E %02x: %08x\n", i, cfg);
209 /* If AER capable, dump it */
212 n += scnprintf(buf+n, len-n, "pci-e AER:\n");
213 pr_warn("EEH: PCI-E AER capability register set follows:\n");
215 for (i=0; i<14; i++) {
216 eeh_ops->read_config(dn, cap+4*i, 4, &cfg);
217 n += scnprintf(buf+n, len-n, "%02x:%x\n", 4*i, cfg);
218 pr_warn("EEH: PCI-E AER %02x: %08x\n", i, cfg);
226 * eeh_slot_error_detail - Generate combined log including driver log and error log
228 * @severity: temporary or permanent error log
230 * This routine should be called to generate the combined log, which
231 * is comprised of driver log and error log. The driver log is figured
232 * out from the config space of the corresponding PCI device, while
233 * the error log is fetched through platform dependent function call.
235 void eeh_slot_error_detail(struct eeh_pe *pe, int severity)
238 struct eeh_dev *edev, *tmp;
241 * When the PHB is fenced or dead, it's pointless to collect
242 * the data from PCI config space because it should return
243 * 0xFF's. For ER, we still retrieve the data from the PCI
246 * For pHyp, we have to enable IO for log retrieval. Otherwise,
247 * 0xFF's is always returned from PCI config space.
249 if (!(pe->type & EEH_PE_PHB)) {
250 if (eeh_probe_mode_devtree())
251 eeh_pci_enable(pe, EEH_OPT_THAW_MMIO);
252 eeh_ops->configure_bridge(pe);
253 eeh_pe_restore_bars(pe);
256 eeh_pe_for_each_dev(pe, edev, tmp) {
257 loglen += eeh_gather_pci_data(edev, pci_regs_buf + loglen,
258 EEH_PCI_REGS_LOG_LEN - loglen);
262 eeh_ops->get_log(pe, severity, pci_regs_buf, loglen);
266 * eeh_token_to_phys - Convert EEH address token to phys address
267 * @token: I/O token, should be address in the form 0xA....
269 * This routine should be called to convert virtual I/O address
272 static inline unsigned long eeh_token_to_phys(unsigned long token)
279 * We won't find hugepages here, iomem
281 ptep = find_linux_pte_or_hugepte(init_mm.pgd, token, &hugepage_shift);
284 WARN_ON(hugepage_shift);
285 pa = pte_pfn(*ptep) << PAGE_SHIFT;
287 return pa | (token & (PAGE_SIZE-1));
291 * On PowerNV platform, we might already have fenced PHB there.
292 * For that case, it's meaningless to recover frozen PE. Intead,
293 * We have to handle fenced PHB firstly.
295 static int eeh_phb_check_failure(struct eeh_pe *pe)
297 struct eeh_pe *phb_pe;
301 if (!eeh_probe_mode_dev())
304 /* Find the PHB PE */
305 phb_pe = eeh_phb_pe_get(pe->phb);
307 pr_warning("%s Can't find PE for PHB#%d\n",
308 __func__, pe->phb->global_number);
312 /* If the PHB has been in problematic state */
313 eeh_serialize_lock(&flags);
314 if (phb_pe->state & EEH_PE_ISOLATED) {
319 /* Check PHB state */
320 ret = eeh_ops->get_state(phb_pe, NULL);
322 (ret == EEH_STATE_NOT_SUPPORT) ||
323 (ret & (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE)) ==
324 (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE)) {
329 /* Isolate the PHB and send event */
330 eeh_pe_state_mark(phb_pe, EEH_PE_ISOLATED);
331 eeh_serialize_unlock(flags);
333 pr_err("EEH: PHB#%x failure detected\n",
334 phb_pe->phb->global_number);
336 eeh_send_failure_event(phb_pe);
340 eeh_serialize_unlock(flags);
345 * eeh_dev_check_failure - Check if all 1's data is due to EEH slot freeze
348 * Check for an EEH failure for the given device node. Call this
349 * routine if the result of a read was all 0xff's and you want to
350 * find out if this is due to an EEH slot freeze. This routine
351 * will query firmware for the EEH status.
353 * Returns 0 if there has not been an EEH error; otherwise returns
354 * a non-zero value and queues up a slot isolation event notification.
356 * It is safe to call this routine in an interrupt context.
358 int eeh_dev_check_failure(struct eeh_dev *edev)
362 struct device_node *dn;
366 const char *location;
368 eeh_stats.total_mmio_ffs++;
377 dn = eeh_dev_to_of_node(edev);
378 dev = eeh_dev_to_pci_dev(edev);
381 /* Access to IO BARs might get this far and still not want checking. */
383 eeh_stats.ignored_check++;
384 pr_debug("EEH: Ignored check for %s %s\n",
385 eeh_pci_name(dev), dn->full_name);
389 if (!pe->addr && !pe->config_addr) {
390 eeh_stats.no_cfg_addr++;
395 * On PowerNV platform, we might already have fenced PHB
396 * there and we need take care of that firstly.
398 ret = eeh_phb_check_failure(pe);
402 /* If we already have a pending isolation event for this
403 * slot, we know it's bad already, we don't need to check.
404 * Do this checking under a lock; as multiple PCI devices
405 * in one slot might report errors simultaneously, and we
406 * only want one error recovery routine running.
408 eeh_serialize_lock(&flags);
410 if (pe->state & EEH_PE_ISOLATED) {
412 if (pe->check_count % EEH_MAX_FAILS == 0) {
413 location = of_get_property(dn, "ibm,loc-code", NULL);
414 printk(KERN_ERR "EEH: %d reads ignored for recovering device at "
415 "location=%s driver=%s pci addr=%s\n",
416 pe->check_count, location,
417 eeh_driver_name(dev), eeh_pci_name(dev));
418 printk(KERN_ERR "EEH: Might be infinite loop in %s driver\n",
419 eeh_driver_name(dev));
426 * Now test for an EEH failure. This is VERY expensive.
427 * Note that the eeh_config_addr may be a parent device
428 * in the case of a device behind a bridge, or it may be
429 * function zero of a multi-function device.
430 * In any case they must share a common PHB.
432 ret = eeh_ops->get_state(pe, NULL);
434 /* Note that config-io to empty slots may fail;
435 * they are empty when they don't have children.
436 * We will punt with the following conditions: Failure to get
437 * PE's state, EEH not support and Permanently unavailable
438 * state, PE is in good state.
441 (ret == EEH_STATE_NOT_SUPPORT) ||
442 (ret & (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE)) ==
443 (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE)) {
444 eeh_stats.false_positives++;
445 pe->false_positives++;
450 eeh_stats.slot_resets++;
452 /* Avoid repeated reports of this failure, including problems
453 * with other functions on this device, and functions under
456 eeh_pe_state_mark(pe, EEH_PE_ISOLATED);
457 eeh_serialize_unlock(flags);
459 /* Most EEH events are due to device driver bugs. Having
460 * a stack trace will help the device-driver authors figure
461 * out what happened. So print that out.
463 pr_err("EEH: Frozen PE#%x detected on PHB#%x\n",
464 pe->addr, pe->phb->global_number);
467 eeh_send_failure_event(pe);
472 eeh_serialize_unlock(flags);
476 EXPORT_SYMBOL_GPL(eeh_dev_check_failure);
479 * eeh_check_failure - Check if all 1's data is due to EEH slot freeze
480 * @token: I/O token, should be address in the form 0xA....
481 * @val: value, should be all 1's (XXX why do we need this arg??)
483 * Check for an EEH failure at the given token address. Call this
484 * routine if the result of a read was all 0xff's and you want to
485 * find out if this is due to an EEH slot freeze event. This routine
486 * will query firmware for the EEH status.
488 * Note this routine is safe to call in an interrupt context.
490 unsigned long eeh_check_failure(const volatile void __iomem *token, unsigned long val)
493 struct eeh_dev *edev;
495 /* Finding the phys addr + pci device; this is pretty quick. */
496 addr = eeh_token_to_phys((unsigned long __force) token);
497 edev = eeh_addr_cache_get_dev(addr);
499 eeh_stats.no_device++;
503 eeh_dev_check_failure(edev);
507 EXPORT_SYMBOL(eeh_check_failure);
511 * eeh_pci_enable - Enable MMIO or DMA transfers for this slot
514 * This routine should be called to reenable frozen MMIO or DMA
515 * so that it would work correctly again. It's useful while doing
516 * recovery or log collection on the indicated device.
518 int eeh_pci_enable(struct eeh_pe *pe, int function)
520 int rc, flags = (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE);
523 * pHyp doesn't allow to enable IO or DMA on unfrozen PE.
524 * Also, it's pointless to enable them on unfrozen PE. So
525 * we have the check here.
527 if (function == EEH_OPT_THAW_MMIO ||
528 function == EEH_OPT_THAW_DMA) {
529 rc = eeh_ops->get_state(pe, NULL);
533 /* Needn't to enable or already enabled */
534 if ((rc == EEH_STATE_NOT_SUPPORT) ||
535 ((rc & flags) == flags))
539 rc = eeh_ops->set_option(pe, function);
541 pr_warn("%s: Unexpected state change %d on "
542 "PHB#%d-PE#%x, err=%d\n",
543 __func__, function, pe->phb->global_number,
546 rc = eeh_ops->wait_state(pe, PCI_BUS_RESET_WAIT_MSEC);
550 if ((function == EEH_OPT_THAW_MMIO) &&
551 (rc & EEH_STATE_MMIO_ENABLED))
554 if ((function == EEH_OPT_THAW_DMA) &&
555 (rc & EEH_STATE_DMA_ENABLED))
562 * pcibios_set_pcie_slot_reset - Set PCI-E reset state
563 * @dev: pci device struct
564 * @state: reset state to enter
569 int pcibios_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state state)
571 struct eeh_dev *edev = pci_dev_to_eeh_dev(dev);
572 struct eeh_pe *pe = edev->pe;
575 pr_err("%s: No PE found on PCI device %s\n",
576 __func__, pci_name(dev));
581 case pcie_deassert_reset:
582 eeh_ops->reset(pe, EEH_RESET_DEACTIVATE);
585 eeh_ops->reset(pe, EEH_RESET_HOT);
587 case pcie_warm_reset:
588 eeh_ops->reset(pe, EEH_RESET_FUNDAMENTAL);
598 * eeh_set_pe_freset - Check the required reset for the indicated device
600 * @flag: return value
602 * Each device might have its preferred reset type: fundamental or
603 * hot reset. The routine is used to collected the information for
604 * the indicated device and its children so that the bunch of the
605 * devices could be reset properly.
607 static void *eeh_set_dev_freset(void *data, void *flag)
610 unsigned int *freset = (unsigned int *)flag;
611 struct eeh_dev *edev = (struct eeh_dev *)data;
613 dev = eeh_dev_to_pci_dev(edev);
615 *freset |= dev->needs_freset;
621 * eeh_reset_pe_once - Assert the pci #RST line for 1/4 second
624 * Assert the PCI #RST line for 1/4 second.
626 static void eeh_reset_pe_once(struct eeh_pe *pe)
628 unsigned int freset = 0;
630 /* Determine type of EEH reset required for
631 * Partitionable Endpoint, a hot-reset (1)
632 * or a fundamental reset (3).
633 * A fundamental reset required by any device under
634 * Partitionable Endpoint trumps hot-reset.
636 eeh_pe_dev_traverse(pe, eeh_set_dev_freset, &freset);
639 eeh_ops->reset(pe, EEH_RESET_FUNDAMENTAL);
641 eeh_ops->reset(pe, EEH_RESET_HOT);
643 eeh_ops->reset(pe, EEH_RESET_DEACTIVATE);
647 * eeh_reset_pe - Reset the indicated PE
650 * This routine should be called to reset indicated device, including
651 * PE. A PE might include multiple PCI devices and sometimes PCI bridges
652 * might be involved as well.
654 int eeh_reset_pe(struct eeh_pe *pe)
656 int flags = (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE);
659 /* Take three shots at resetting the bus */
660 for (i=0; i<3; i++) {
661 eeh_reset_pe_once(pe);
664 * EEH_PE_ISOLATED is expected to be removed after
667 rc = eeh_ops->wait_state(pe, PCI_BUS_RESET_WAIT_MSEC);
668 if ((rc & flags) == flags)
672 pr_err("%s: Unrecoverable slot failure on PHB#%d-PE#%x",
673 __func__, pe->phb->global_number, pe->addr);
676 pr_err("EEH: bus reset %d failed on PHB#%d-PE#%x, rc=%d\n",
677 i+1, pe->phb->global_number, pe->addr, rc);
684 * eeh_save_bars - Save device bars
685 * @edev: PCI device associated EEH device
687 * Save the values of the device bars. Unlike the restore
688 * routine, this routine is *not* recursive. This is because
689 * PCI devices are added individually; but, for the restore,
690 * an entire slot is reset at a time.
692 void eeh_save_bars(struct eeh_dev *edev)
695 struct device_node *dn;
699 dn = eeh_dev_to_of_node(edev);
701 for (i = 0; i < 16; i++)
702 eeh_ops->read_config(dn, i * 4, 4, &edev->config_space[i]);
705 * For PCI bridges including root port, we need enable bus
706 * master explicitly. Otherwise, it can't fetch IODA table
707 * entries correctly. So we cache the bit in advance so that
708 * we can restore it after reset, either PHB range or PE range.
710 if (edev->mode & EEH_DEV_BRIDGE)
711 edev->config_space[1] |= PCI_COMMAND_MASTER;
715 * eeh_ops_register - Register platform dependent EEH operations
716 * @ops: platform dependent EEH operations
718 * Register the platform dependent EEH operation callback
719 * functions. The platform should call this function before
720 * any other EEH operations.
722 int __init eeh_ops_register(struct eeh_ops *ops)
725 pr_warning("%s: Invalid EEH ops name for %p\n",
730 if (eeh_ops && eeh_ops != ops) {
731 pr_warning("%s: EEH ops of platform %s already existing (%s)\n",
732 __func__, eeh_ops->name, ops->name);
742 * eeh_ops_unregister - Unreigster platform dependent EEH operations
743 * @name: name of EEH platform operations
745 * Unregister the platform dependent EEH operation callback
748 int __exit eeh_ops_unregister(const char *name)
750 if (!name || !strlen(name)) {
751 pr_warning("%s: Invalid EEH ops name\n",
756 if (eeh_ops && !strcmp(eeh_ops->name, name)) {
764 static int eeh_reboot_notifier(struct notifier_block *nb,
765 unsigned long action, void *unused)
767 eeh_set_enable(false);
771 static struct notifier_block eeh_reboot_nb = {
772 .notifier_call = eeh_reboot_notifier,
776 * eeh_init - EEH initialization
778 * Initialize EEH by trying to enable it for all of the adapters in the system.
779 * As a side effect we can determine here if eeh is supported at all.
780 * Note that we leave EEH on so failed config cycles won't cause a machine
781 * check. If a user turns off EEH for a particular adapter they are really
782 * telling Linux to ignore errors. Some hardware (e.g. POWER5) won't
783 * grant access to a slot if EEH isn't enabled, and so we always enable
784 * EEH for all slots/all devices.
786 * The eeh-force-off option disables EEH checking globally, for all slots.
787 * Even if force-off is set, the EEH hardware is still enabled, so that
788 * newer systems can boot.
792 struct pci_controller *hose, *tmp;
793 struct device_node *phb;
798 * We have to delay the initialization on PowerNV after
799 * the PCI hierarchy tree has been built because the PEs
800 * are figured out based on PCI devices instead of device
803 if (machine_is(powernv) && cnt++ <= 0)
806 /* Register reboot notifier */
807 ret = register_reboot_notifier(&eeh_reboot_nb);
809 pr_warn("%s: Failed to register notifier (%d)\n",
814 /* call platform initialization function */
816 pr_warning("%s: Platform EEH operation not found\n",
819 } else if ((ret = eeh_ops->init())) {
820 pr_warning("%s: Failed to call platform init function (%d)\n",
825 /* Initialize EEH event */
826 ret = eeh_event_init();
830 /* Enable EEH for all adapters */
831 if (eeh_probe_mode_devtree()) {
832 list_for_each_entry_safe(hose, tmp,
833 &hose_list, list_node) {
835 traverse_pci_devices(phb, eeh_ops->of_probe, NULL);
837 } else if (eeh_probe_mode_dev()) {
838 list_for_each_entry_safe(hose, tmp,
839 &hose_list, list_node)
840 pci_walk_bus(hose->bus, eeh_ops->dev_probe, NULL);
842 pr_warn("%s: Invalid probe mode %x",
843 __func__, eeh_subsystem_flags);
848 * Call platform post-initialization. Actually, It's good chance
849 * to inform platform that EEH is ready to supply service if the
850 * I/O cache stuff has been built up.
852 if (eeh_ops->post_init) {
853 ret = eeh_ops->post_init();
859 pr_info("EEH: PCI Enhanced I/O Error Handling Enabled\n");
861 pr_warning("EEH: No capable adapters found\n");
866 core_initcall_sync(eeh_init);
869 * eeh_add_device_early - Enable EEH for the indicated device_node
870 * @dn: device node for which to set up EEH
872 * This routine must be used to perform EEH initialization for PCI
873 * devices that were added after system boot (e.g. hotplug, dlpar).
874 * This routine must be called before any i/o is performed to the
875 * adapter (inluding any config-space i/o).
876 * Whether this actually enables EEH or not for this device depends
877 * on the CEC architecture, type of the device, on earlier boot
878 * command-line arguments & etc.
880 void eeh_add_device_early(struct device_node *dn)
882 struct pci_controller *phb;
885 * If we're doing EEH probe based on PCI device, we
886 * would delay the probe until late stage because
887 * the PCI device isn't available this moment.
889 if (!eeh_probe_mode_devtree())
892 if (!of_node_to_eeh_dev(dn))
894 phb = of_node_to_eeh_dev(dn)->phb;
896 /* USB Bus children of PCI devices will not have BUID's */
897 if (NULL == phb || 0 == phb->buid)
900 eeh_ops->of_probe(dn, NULL);
904 * eeh_add_device_tree_early - Enable EEH for the indicated device
907 * This routine must be used to perform EEH initialization for the
908 * indicated PCI device that was added after system boot (e.g.
911 void eeh_add_device_tree_early(struct device_node *dn)
913 struct device_node *sib;
915 for_each_child_of_node(dn, sib)
916 eeh_add_device_tree_early(sib);
917 eeh_add_device_early(dn);
919 EXPORT_SYMBOL_GPL(eeh_add_device_tree_early);
922 * eeh_add_device_late - Perform EEH initialization for the indicated pci device
923 * @dev: pci device for which to set up EEH
925 * This routine must be used to complete EEH initialization for PCI
926 * devices that were added after system boot (e.g. hotplug, dlpar).
928 void eeh_add_device_late(struct pci_dev *dev)
930 struct device_node *dn;
931 struct eeh_dev *edev;
933 if (!dev || !eeh_enabled())
936 pr_debug("EEH: Adding device %s\n", pci_name(dev));
938 dn = pci_device_to_OF_node(dev);
939 edev = of_node_to_eeh_dev(dn);
940 if (edev->pdev == dev) {
941 pr_debug("EEH: Already referenced !\n");
946 * The EEH cache might not be removed correctly because of
947 * unbalanced kref to the device during unplug time, which
948 * relies on pcibios_release_device(). So we have to remove
949 * that here explicitly.
952 eeh_rmv_from_parent_pe(edev);
953 eeh_addr_cache_rmv_dev(edev->pdev);
954 eeh_sysfs_remove_device(edev->pdev);
955 edev->mode &= ~EEH_DEV_SYSFS;
958 * We definitely should have the PCI device removed
959 * though it wasn't correctly. So we needn't call
960 * into error handler afterwards.
962 edev->mode |= EEH_DEV_NO_HANDLER;
965 dev->dev.archdata.edev = NULL;
969 dev->dev.archdata.edev = edev;
972 * We have to do the EEH probe here because the PCI device
973 * hasn't been created yet in the early stage.
975 if (eeh_probe_mode_dev())
976 eeh_ops->dev_probe(dev, NULL);
978 eeh_addr_cache_insert_dev(dev);
982 * eeh_add_device_tree_late - Perform EEH initialization for the indicated PCI bus
985 * This routine must be used to perform EEH initialization for PCI
986 * devices which are attached to the indicated PCI bus. The PCI bus
987 * is added after system boot through hotplug or dlpar.
989 void eeh_add_device_tree_late(struct pci_bus *bus)
993 list_for_each_entry(dev, &bus->devices, bus_list) {
994 eeh_add_device_late(dev);
995 if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) {
996 struct pci_bus *subbus = dev->subordinate;
998 eeh_add_device_tree_late(subbus);
1002 EXPORT_SYMBOL_GPL(eeh_add_device_tree_late);
1005 * eeh_add_sysfs_files - Add EEH sysfs files for the indicated PCI bus
1008 * This routine must be used to add EEH sysfs files for PCI
1009 * devices which are attached to the indicated PCI bus. The PCI bus
1010 * is added after system boot through hotplug or dlpar.
1012 void eeh_add_sysfs_files(struct pci_bus *bus)
1014 struct pci_dev *dev;
1016 list_for_each_entry(dev, &bus->devices, bus_list) {
1017 eeh_sysfs_add_device(dev);
1018 if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) {
1019 struct pci_bus *subbus = dev->subordinate;
1021 eeh_add_sysfs_files(subbus);
1025 EXPORT_SYMBOL_GPL(eeh_add_sysfs_files);
1028 * eeh_remove_device - Undo EEH setup for the indicated pci device
1029 * @dev: pci device to be removed
1031 * This routine should be called when a device is removed from
1032 * a running system (e.g. by hotplug or dlpar). It unregisters
1033 * the PCI device from the EEH subsystem. I/O errors affecting
1034 * this device will no longer be detected after this call; thus,
1035 * i/o errors affecting this slot may leave this device unusable.
1037 void eeh_remove_device(struct pci_dev *dev)
1039 struct eeh_dev *edev;
1041 if (!dev || !eeh_enabled())
1043 edev = pci_dev_to_eeh_dev(dev);
1045 /* Unregister the device with the EEH/PCI address search system */
1046 pr_debug("EEH: Removing device %s\n", pci_name(dev));
1048 if (!edev || !edev->pdev || !edev->pe) {
1049 pr_debug("EEH: Not referenced !\n");
1054 * During the hotplug for EEH error recovery, we need the EEH
1055 * device attached to the parent PE in order for BAR restore
1056 * a bit later. So we keep it for BAR restore and remove it
1057 * from the parent PE during the BAR resotre.
1060 dev->dev.archdata.edev = NULL;
1061 if (!(edev->pe->state & EEH_PE_KEEP))
1062 eeh_rmv_from_parent_pe(edev);
1064 edev->mode |= EEH_DEV_DISCONNECTED;
1067 * We're removing from the PCI subsystem, that means
1068 * the PCI device driver can't support EEH or not
1069 * well. So we rely on hotplug completely to do recovery
1070 * for the specific PCI device.
1072 edev->mode |= EEH_DEV_NO_HANDLER;
1074 eeh_addr_cache_rmv_dev(dev);
1075 eeh_sysfs_remove_device(dev);
1076 edev->mode &= ~EEH_DEV_SYSFS;
1079 static int proc_eeh_show(struct seq_file *m, void *v)
1081 if (!eeh_enabled()) {
1082 seq_printf(m, "EEH Subsystem is globally disabled\n");
1083 seq_printf(m, "eeh_total_mmio_ffs=%llu\n", eeh_stats.total_mmio_ffs);
1085 seq_printf(m, "EEH Subsystem is enabled\n");
1088 "no device node=%llu\n"
1089 "no config address=%llu\n"
1090 "check not wanted=%llu\n"
1091 "eeh_total_mmio_ffs=%llu\n"
1092 "eeh_false_positives=%llu\n"
1093 "eeh_slot_resets=%llu\n",
1094 eeh_stats.no_device,
1096 eeh_stats.no_cfg_addr,
1097 eeh_stats.ignored_check,
1098 eeh_stats.total_mmio_ffs,
1099 eeh_stats.false_positives,
1100 eeh_stats.slot_resets);
1106 static int proc_eeh_open(struct inode *inode, struct file *file)
1108 return single_open(file, proc_eeh_show, NULL);
1111 static const struct file_operations proc_eeh_operations = {
1112 .open = proc_eeh_open,
1114 .llseek = seq_lseek,
1115 .release = single_release,
1118 #ifdef CONFIG_DEBUG_FS
1119 static int eeh_enable_dbgfs_set(void *data, u64 val)
1122 eeh_subsystem_flags &= ~EEH_FORCE_DISABLED;
1124 eeh_subsystem_flags |= EEH_FORCE_DISABLED;
1126 /* Notify the backend */
1127 if (eeh_ops->post_init)
1128 eeh_ops->post_init();
1133 static int eeh_enable_dbgfs_get(void *data, u64 *val)
1142 DEFINE_SIMPLE_ATTRIBUTE(eeh_enable_dbgfs_ops, eeh_enable_dbgfs_get,
1143 eeh_enable_dbgfs_set, "0x%llx\n");
1146 static int __init eeh_init_proc(void)
1148 if (machine_is(pseries) || machine_is(powernv)) {
1149 proc_create("powerpc/eeh", 0, NULL, &proc_eeh_operations);
1150 #ifdef CONFIG_DEBUG_FS
1151 debugfs_create_file("eeh_enable", 0600,
1152 powerpc_debugfs_root, NULL,
1153 &eeh_enable_dbgfs_ops);
1159 __initcall(eeh_init_proc);