2 * Copyright IBM Corporation 2001, 2005, 2006
3 * Copyright Dave Engebretsen & Todd Inglett 2001
4 * Copyright Linas Vepstas 2005, 2006
5 * Copyright 2001-2012 IBM Corporation.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 * Please address comments and feedback to Linas Vepstas <linas@austin.ibm.com>
24 #include <linux/delay.h>
25 #include <linux/sched.h>
26 #include <linux/init.h>
27 #include <linux/list.h>
28 #include <linux/pci.h>
29 #include <linux/proc_fs.h>
30 #include <linux/rbtree.h>
31 #include <linux/reboot.h>
32 #include <linux/seq_file.h>
33 #include <linux/spinlock.h>
34 #include <linux/export.h>
37 #include <linux/atomic.h>
39 #include <asm/eeh_event.h>
41 #include <asm/machdep.h>
42 #include <asm/ppc-pci.h>
47 * EEH, or "Extended Error Handling" is a PCI bridge technology for
48 * dealing with PCI bus errors that can't be dealt with within the
49 * usual PCI framework, except by check-stopping the CPU. Systems
50 * that are designed for high-availability/reliability cannot afford
51 * to crash due to a "mere" PCI error, thus the need for EEH.
52 * An EEH-capable bridge operates by converting a detected error
53 * into a "slot freeze", taking the PCI adapter off-line, making
54 * the slot behave, from the OS'es point of view, as if the slot
55 * were "empty": all reads return 0xff's and all writes are silently
56 * ignored. EEH slot isolation events can be triggered by parity
57 * errors on the address or data busses (e.g. during posted writes),
58 * which in turn might be caused by low voltage on the bus, dust,
59 * vibration, humidity, radioactivity or plain-old failed hardware.
61 * Note, however, that one of the leading causes of EEH slot
62 * freeze events are buggy device drivers, buggy device microcode,
63 * or buggy device hardware. This is because any attempt by the
64 * device to bus-master data to a memory address that is not
65 * assigned to the device will trigger a slot freeze. (The idea
66 * is to prevent devices-gone-wild from corrupting system memory).
67 * Buggy hardware/drivers will have a miserable time co-existing
70 * Ideally, a PCI device driver, when suspecting that an isolation
71 * event has occurred (e.g. by reading 0xff's), will then ask EEH
72 * whether this is the case, and then take appropriate steps to
73 * reset the PCI slot, the PCI device, and then resume operations.
74 * However, until that day, the checking is done here, with the
75 * eeh_check_failure() routine embedded in the MMIO macros. If
76 * the slot is found to be isolated, an "EEH Event" is synthesized
77 * and sent out for processing.
80 /* If a device driver keeps reading an MMIO register in an interrupt
81 * handler after a slot isolation event, it might be broken.
82 * This sets the threshold for how many read attempts we allow
83 * before printing an error message.
85 #define EEH_MAX_FAILS 2100000
87 /* Time to wait for a PCI slot to report status, in milliseconds */
88 #define PCI_BUS_RESET_WAIT_MSEC (5*60*1000)
90 /* Platform dependent EEH operations */
91 struct eeh_ops *eeh_ops = NULL;
93 bool eeh_subsystem_enabled = false;
94 EXPORT_SYMBOL(eeh_subsystem_enabled);
97 * EEH probe mode support. The intention is to support multiple
98 * platforms for EEH. Some platforms like pSeries do PCI emunation
99 * based on device tree. However, other platforms like powernv probe
100 * PCI devices from hardware. The flag is used to distinguish that.
101 * In addition, struct eeh_ops::probe would be invoked for particular
102 * OF node or PCI device so that the corresponding PE would be created
107 /* Lock to avoid races due to multiple reports of an error */
108 DEFINE_RAW_SPINLOCK(confirm_error_lock);
110 /* Buffer for reporting pci register dumps. Its here in BSS, and
111 * not dynamically alloced, so that it ends up in RMO where RTAS
114 #define EEH_PCI_REGS_LOG_LEN 4096
115 static unsigned char pci_regs_buf[EEH_PCI_REGS_LOG_LEN];
118 * The struct is used to maintain the EEH global statistic
119 * information. Besides, the EEH global statistics will be
120 * exported to user space through procfs
123 u64 no_device; /* PCI device not found */
124 u64 no_dn; /* OF node not found */
125 u64 no_cfg_addr; /* Config address not found */
126 u64 ignored_check; /* EEH check skipped */
127 u64 total_mmio_ffs; /* Total EEH checks */
128 u64 false_positives; /* Unnecessary EEH checks */
129 u64 slot_resets; /* PE reset */
132 static struct eeh_stats eeh_stats;
134 #define IS_BRIDGE(class_code) (((class_code)<<16) == PCI_BASE_CLASS_BRIDGE)
137 * eeh_gather_pci_data - Copy assorted PCI config space registers to buff
138 * @edev: device to report data for
139 * @buf: point to buffer in which to log
140 * @len: amount of room in buffer
142 * This routine captures assorted PCI configuration space data,
143 * and puts them into a buffer for RTAS error logging.
145 static size_t eeh_gather_pci_data(struct eeh_dev *edev, char * buf, size_t len)
147 struct device_node *dn = eeh_dev_to_of_node(edev);
148 struct pci_dev *dev = eeh_dev_to_pci_dev(edev);
153 n += scnprintf(buf+n, len-n, "%s\n", dn->full_name);
154 printk(KERN_WARNING "EEH: of node=%s\n", dn->full_name);
156 eeh_ops->read_config(dn, PCI_VENDOR_ID, 4, &cfg);
157 n += scnprintf(buf+n, len-n, "dev/vend:%08x\n", cfg);
158 printk(KERN_WARNING "EEH: PCI device/vendor: %08x\n", cfg);
160 eeh_ops->read_config(dn, PCI_COMMAND, 4, &cfg);
161 n += scnprintf(buf+n, len-n, "cmd/stat:%x\n", cfg);
162 printk(KERN_WARNING "EEH: PCI cmd/status register: %08x\n", cfg);
165 printk(KERN_WARNING "EEH: no PCI device for this of node\n");
169 /* Gather bridge-specific registers */
170 if (dev->class >> 16 == PCI_BASE_CLASS_BRIDGE) {
171 eeh_ops->read_config(dn, PCI_SEC_STATUS, 2, &cfg);
172 n += scnprintf(buf+n, len-n, "sec stat:%x\n", cfg);
173 printk(KERN_WARNING "EEH: Bridge secondary status: %04x\n", cfg);
175 eeh_ops->read_config(dn, PCI_BRIDGE_CONTROL, 2, &cfg);
176 n += scnprintf(buf+n, len-n, "brdg ctl:%x\n", cfg);
177 printk(KERN_WARNING "EEH: Bridge control: %04x\n", cfg);
180 /* Dump out the PCI-X command and status regs */
181 cap = pci_find_capability(dev, PCI_CAP_ID_PCIX);
183 eeh_ops->read_config(dn, cap, 4, &cfg);
184 n += scnprintf(buf+n, len-n, "pcix-cmd:%x\n", cfg);
185 printk(KERN_WARNING "EEH: PCI-X cmd: %08x\n", cfg);
187 eeh_ops->read_config(dn, cap+4, 4, &cfg);
188 n += scnprintf(buf+n, len-n, "pcix-stat:%x\n", cfg);
189 printk(KERN_WARNING "EEH: PCI-X status: %08x\n", cfg);
192 /* If PCI-E capable, dump PCI-E cap 10, and the AER */
193 if (pci_is_pcie(dev)) {
194 n += scnprintf(buf+n, len-n, "pci-e cap10:\n");
196 "EEH: PCI-E capabilities and status follow:\n");
198 for (i=0; i<=8; i++) {
199 eeh_ops->read_config(dn, dev->pcie_cap+4*i, 4, &cfg);
200 n += scnprintf(buf+n, len-n, "%02x:%x\n", 4*i, cfg);
201 printk(KERN_WARNING "EEH: PCI-E %02x: %08x\n", i, cfg);
204 cap = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
206 n += scnprintf(buf+n, len-n, "pci-e AER:\n");
208 "EEH: PCI-E AER capability register set follows:\n");
210 for (i=0; i<14; i++) {
211 eeh_ops->read_config(dn, cap+4*i, 4, &cfg);
212 n += scnprintf(buf+n, len-n, "%02x:%x\n", 4*i, cfg);
213 printk(KERN_WARNING "EEH: PCI-E AER %02x: %08x\n", i, cfg);
222 * eeh_slot_error_detail - Generate combined log including driver log and error log
224 * @severity: temporary or permanent error log
226 * This routine should be called to generate the combined log, which
227 * is comprised of driver log and error log. The driver log is figured
228 * out from the config space of the corresponding PCI device, while
229 * the error log is fetched through platform dependent function call.
231 void eeh_slot_error_detail(struct eeh_pe *pe, int severity)
234 struct eeh_dev *edev, *tmp;
237 * When the PHB is fenced or dead, it's pointless to collect
238 * the data from PCI config space because it should return
239 * 0xFF's. For ER, we still retrieve the data from the PCI
242 if (!(pe->type & EEH_PE_PHB)) {
243 eeh_pci_enable(pe, EEH_OPT_THAW_MMIO);
244 eeh_ops->configure_bridge(pe);
245 eeh_pe_restore_bars(pe);
248 eeh_pe_for_each_dev(pe, edev, tmp) {
249 loglen += eeh_gather_pci_data(edev, pci_regs_buf + loglen,
250 EEH_PCI_REGS_LOG_LEN - loglen);
254 eeh_ops->get_log(pe, severity, pci_regs_buf, loglen);
258 * eeh_token_to_phys - Convert EEH address token to phys address
259 * @token: I/O token, should be address in the form 0xA....
261 * This routine should be called to convert virtual I/O address
264 static inline unsigned long eeh_token_to_phys(unsigned long token)
271 * We won't find hugepages here, iomem
273 ptep = find_linux_pte_or_hugepte(init_mm.pgd, token, &hugepage_shift);
276 WARN_ON(hugepage_shift);
277 pa = pte_pfn(*ptep) << PAGE_SHIFT;
279 return pa | (token & (PAGE_SIZE-1));
283 * On PowerNV platform, we might already have fenced PHB there.
284 * For that case, it's meaningless to recover frozen PE. Intead,
285 * We have to handle fenced PHB firstly.
287 static int eeh_phb_check_failure(struct eeh_pe *pe)
289 struct eeh_pe *phb_pe;
293 if (!eeh_probe_mode_dev())
296 /* Find the PHB PE */
297 phb_pe = eeh_phb_pe_get(pe->phb);
299 pr_warning("%s Can't find PE for PHB#%d\n",
300 __func__, pe->phb->global_number);
304 /* If the PHB has been in problematic state */
305 eeh_serialize_lock(&flags);
306 if (phb_pe->state & EEH_PE_ISOLATED) {
311 /* Check PHB state */
312 ret = eeh_ops->get_state(phb_pe, NULL);
314 (ret == EEH_STATE_NOT_SUPPORT) ||
315 (ret & (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE)) ==
316 (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE)) {
321 /* Isolate the PHB and send event */
322 eeh_pe_state_mark(phb_pe, EEH_PE_ISOLATED);
323 eeh_serialize_unlock(flags);
325 pr_err("EEH: PHB#%x failure detected\n",
326 phb_pe->phb->global_number);
328 eeh_send_failure_event(phb_pe);
332 eeh_serialize_unlock(flags);
337 * eeh_dev_check_failure - Check if all 1's data is due to EEH slot freeze
340 * Check for an EEH failure for the given device node. Call this
341 * routine if the result of a read was all 0xff's and you want to
342 * find out if this is due to an EEH slot freeze. This routine
343 * will query firmware for the EEH status.
345 * Returns 0 if there has not been an EEH error; otherwise returns
346 * a non-zero value and queues up a slot isolation event notification.
348 * It is safe to call this routine in an interrupt context.
350 int eeh_dev_check_failure(struct eeh_dev *edev)
354 struct device_node *dn;
358 const char *location;
360 eeh_stats.total_mmio_ffs++;
369 dn = eeh_dev_to_of_node(edev);
370 dev = eeh_dev_to_pci_dev(edev);
373 /* Access to IO BARs might get this far and still not want checking. */
375 eeh_stats.ignored_check++;
376 pr_debug("EEH: Ignored check for %s %s\n",
377 eeh_pci_name(dev), dn->full_name);
381 if (!pe->addr && !pe->config_addr) {
382 eeh_stats.no_cfg_addr++;
387 * On PowerNV platform, we might already have fenced PHB
388 * there and we need take care of that firstly.
390 ret = eeh_phb_check_failure(pe);
394 /* If we already have a pending isolation event for this
395 * slot, we know it's bad already, we don't need to check.
396 * Do this checking under a lock; as multiple PCI devices
397 * in one slot might report errors simultaneously, and we
398 * only want one error recovery routine running.
400 eeh_serialize_lock(&flags);
402 if (pe->state & EEH_PE_ISOLATED) {
404 if (pe->check_count % EEH_MAX_FAILS == 0) {
405 location = of_get_property(dn, "ibm,loc-code", NULL);
406 printk(KERN_ERR "EEH: %d reads ignored for recovering device at "
407 "location=%s driver=%s pci addr=%s\n",
408 pe->check_count, location,
409 eeh_driver_name(dev), eeh_pci_name(dev));
410 printk(KERN_ERR "EEH: Might be infinite loop in %s driver\n",
411 eeh_driver_name(dev));
418 * Now test for an EEH failure. This is VERY expensive.
419 * Note that the eeh_config_addr may be a parent device
420 * in the case of a device behind a bridge, or it may be
421 * function zero of a multi-function device.
422 * In any case they must share a common PHB.
424 ret = eeh_ops->get_state(pe, NULL);
426 /* Note that config-io to empty slots may fail;
427 * they are empty when they don't have children.
428 * We will punt with the following conditions: Failure to get
429 * PE's state, EEH not support and Permanently unavailable
430 * state, PE is in good state.
433 (ret == EEH_STATE_NOT_SUPPORT) ||
434 (ret & (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE)) ==
435 (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE)) {
436 eeh_stats.false_positives++;
437 pe->false_positives++;
442 eeh_stats.slot_resets++;
444 /* Avoid repeated reports of this failure, including problems
445 * with other functions on this device, and functions under
448 eeh_pe_state_mark(pe, EEH_PE_ISOLATED);
449 eeh_serialize_unlock(flags);
451 /* Most EEH events are due to device driver bugs. Having
452 * a stack trace will help the device-driver authors figure
453 * out what happened. So print that out.
455 pr_err("EEH: Frozen PE#%x detected on PHB#%x\n",
456 pe->addr, pe->phb->global_number);
459 eeh_send_failure_event(pe);
464 eeh_serialize_unlock(flags);
468 EXPORT_SYMBOL_GPL(eeh_dev_check_failure);
471 * eeh_check_failure - Check if all 1's data is due to EEH slot freeze
472 * @token: I/O token, should be address in the form 0xA....
473 * @val: value, should be all 1's (XXX why do we need this arg??)
475 * Check for an EEH failure at the given token address. Call this
476 * routine if the result of a read was all 0xff's and you want to
477 * find out if this is due to an EEH slot freeze event. This routine
478 * will query firmware for the EEH status.
480 * Note this routine is safe to call in an interrupt context.
482 unsigned long eeh_check_failure(const volatile void __iomem *token, unsigned long val)
485 struct eeh_dev *edev;
487 /* Finding the phys addr + pci device; this is pretty quick. */
488 addr = eeh_token_to_phys((unsigned long __force) token);
489 edev = eeh_addr_cache_get_dev(addr);
491 eeh_stats.no_device++;
495 eeh_dev_check_failure(edev);
499 EXPORT_SYMBOL(eeh_check_failure);
503 * eeh_pci_enable - Enable MMIO or DMA transfers for this slot
506 * This routine should be called to reenable frozen MMIO or DMA
507 * so that it would work correctly again. It's useful while doing
508 * recovery or log collection on the indicated device.
510 int eeh_pci_enable(struct eeh_pe *pe, int function)
514 rc = eeh_ops->set_option(pe, function);
516 pr_warning("%s: Unexpected state change %d on PHB#%d-PE#%x, err=%d\n",
517 __func__, function, pe->phb->global_number, pe->addr, rc);
519 rc = eeh_ops->wait_state(pe, PCI_BUS_RESET_WAIT_MSEC);
520 if (rc > 0 && (rc & EEH_STATE_MMIO_ENABLED) &&
521 (function == EEH_OPT_THAW_MMIO))
528 * pcibios_set_pcie_slot_reset - Set PCI-E reset state
529 * @dev: pci device struct
530 * @state: reset state to enter
535 int pcibios_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state state)
537 struct eeh_dev *edev = pci_dev_to_eeh_dev(dev);
538 struct eeh_pe *pe = edev->pe;
541 pr_err("%s: No PE found on PCI device %s\n",
542 __func__, pci_name(dev));
547 case pcie_deassert_reset:
548 eeh_ops->reset(pe, EEH_RESET_DEACTIVATE);
551 eeh_ops->reset(pe, EEH_RESET_HOT);
553 case pcie_warm_reset:
554 eeh_ops->reset(pe, EEH_RESET_FUNDAMENTAL);
564 * eeh_set_pe_freset - Check the required reset for the indicated device
566 * @flag: return value
568 * Each device might have its preferred reset type: fundamental or
569 * hot reset. The routine is used to collected the information for
570 * the indicated device and its children so that the bunch of the
571 * devices could be reset properly.
573 static void *eeh_set_dev_freset(void *data, void *flag)
576 unsigned int *freset = (unsigned int *)flag;
577 struct eeh_dev *edev = (struct eeh_dev *)data;
579 dev = eeh_dev_to_pci_dev(edev);
581 *freset |= dev->needs_freset;
587 * eeh_reset_pe_once - Assert the pci #RST line for 1/4 second
590 * Assert the PCI #RST line for 1/4 second.
592 static void eeh_reset_pe_once(struct eeh_pe *pe)
594 unsigned int freset = 0;
596 /* Determine type of EEH reset required for
597 * Partitionable Endpoint, a hot-reset (1)
598 * or a fundamental reset (3).
599 * A fundamental reset required by any device under
600 * Partitionable Endpoint trumps hot-reset.
602 eeh_pe_dev_traverse(pe, eeh_set_dev_freset, &freset);
605 eeh_ops->reset(pe, EEH_RESET_FUNDAMENTAL);
607 eeh_ops->reset(pe, EEH_RESET_HOT);
609 /* The PCI bus requires that the reset be held high for at least
610 * a 100 milliseconds. We wait a bit longer 'just in case'.
612 #define PCI_BUS_RST_HOLD_TIME_MSEC 250
613 msleep(PCI_BUS_RST_HOLD_TIME_MSEC);
615 eeh_ops->reset(pe, EEH_RESET_DEACTIVATE);
617 /* After a PCI slot has been reset, the PCI Express spec requires
618 * a 1.5 second idle time for the bus to stabilize, before starting
621 #define PCI_BUS_SETTLE_TIME_MSEC 1800
622 msleep(PCI_BUS_SETTLE_TIME_MSEC);
626 * eeh_reset_pe - Reset the indicated PE
629 * This routine should be called to reset indicated device, including
630 * PE. A PE might include multiple PCI devices and sometimes PCI bridges
631 * might be involved as well.
633 int eeh_reset_pe(struct eeh_pe *pe)
635 int flags = (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE);
638 /* Take three shots at resetting the bus */
639 for (i=0; i<3; i++) {
640 eeh_reset_pe_once(pe);
642 rc = eeh_ops->wait_state(pe, PCI_BUS_RESET_WAIT_MSEC);
643 if ((rc & flags) == flags) {
644 eeh_pe_state_clear(pe, EEH_PE_ISOLATED);
649 pr_err("%s: Unrecoverable slot failure on PHB#%d-PE#%x",
650 __func__, pe->phb->global_number, pe->addr);
653 pr_err("EEH: bus reset %d failed on PHB#%d-PE#%x, rc=%d\n",
654 i+1, pe->phb->global_number, pe->addr, rc);
661 * eeh_save_bars - Save device bars
662 * @edev: PCI device associated EEH device
664 * Save the values of the device bars. Unlike the restore
665 * routine, this routine is *not* recursive. This is because
666 * PCI devices are added individually; but, for the restore,
667 * an entire slot is reset at a time.
669 void eeh_save_bars(struct eeh_dev *edev)
672 struct device_node *dn;
676 dn = eeh_dev_to_of_node(edev);
678 for (i = 0; i < 16; i++)
679 eeh_ops->read_config(dn, i * 4, 4, &edev->config_space[i]);
682 * For PCI bridges including root port, we need enable bus
683 * master explicitly. Otherwise, it can't fetch IODA table
684 * entries correctly. So we cache the bit in advance so that
685 * we can restore it after reset, either PHB range or PE range.
687 if (edev->mode & EEH_DEV_BRIDGE)
688 edev->config_space[1] |= PCI_COMMAND_MASTER;
692 * eeh_ops_register - Register platform dependent EEH operations
693 * @ops: platform dependent EEH operations
695 * Register the platform dependent EEH operation callback
696 * functions. The platform should call this function before
697 * any other EEH operations.
699 int __init eeh_ops_register(struct eeh_ops *ops)
702 pr_warning("%s: Invalid EEH ops name for %p\n",
707 if (eeh_ops && eeh_ops != ops) {
708 pr_warning("%s: EEH ops of platform %s already existing (%s)\n",
709 __func__, eeh_ops->name, ops->name);
719 * eeh_ops_unregister - Unreigster platform dependent EEH operations
720 * @name: name of EEH platform operations
722 * Unregister the platform dependent EEH operation callback
725 int __exit eeh_ops_unregister(const char *name)
727 if (!name || !strlen(name)) {
728 pr_warning("%s: Invalid EEH ops name\n",
733 if (eeh_ops && !strcmp(eeh_ops->name, name)) {
741 static int eeh_reboot_notifier(struct notifier_block *nb,
742 unsigned long action, void *unused)
744 eeh_set_enable(false);
748 static struct notifier_block eeh_reboot_nb = {
749 .notifier_call = eeh_reboot_notifier,
753 * eeh_init - EEH initialization
755 * Initialize EEH by trying to enable it for all of the adapters in the system.
756 * As a side effect we can determine here if eeh is supported at all.
757 * Note that we leave EEH on so failed config cycles won't cause a machine
758 * check. If a user turns off EEH for a particular adapter they are really
759 * telling Linux to ignore errors. Some hardware (e.g. POWER5) won't
760 * grant access to a slot if EEH isn't enabled, and so we always enable
761 * EEH for all slots/all devices.
763 * The eeh-force-off option disables EEH checking globally, for all slots.
764 * Even if force-off is set, the EEH hardware is still enabled, so that
765 * newer systems can boot.
769 struct pci_controller *hose, *tmp;
770 struct device_node *phb;
775 * We have to delay the initialization on PowerNV after
776 * the PCI hierarchy tree has been built because the PEs
777 * are figured out based on PCI devices instead of device
780 if (machine_is(powernv) && cnt++ <= 0)
783 /* Register reboot notifier */
784 ret = register_reboot_notifier(&eeh_reboot_nb);
786 pr_warn("%s: Failed to register notifier (%d)\n",
791 /* call platform initialization function */
793 pr_warning("%s: Platform EEH operation not found\n",
796 } else if ((ret = eeh_ops->init())) {
797 pr_warning("%s: Failed to call platform init function (%d)\n",
802 /* Initialize EEH event */
803 ret = eeh_event_init();
807 /* Enable EEH for all adapters */
808 if (eeh_probe_mode_devtree()) {
809 list_for_each_entry_safe(hose, tmp,
810 &hose_list, list_node) {
812 traverse_pci_devices(phb, eeh_ops->of_probe, NULL);
814 } else if (eeh_probe_mode_dev()) {
815 list_for_each_entry_safe(hose, tmp,
816 &hose_list, list_node)
817 pci_walk_bus(hose->bus, eeh_ops->dev_probe, NULL);
819 pr_warning("%s: Invalid probe mode %d\n",
820 __func__, eeh_probe_mode);
825 * Call platform post-initialization. Actually, It's good chance
826 * to inform platform that EEH is ready to supply service if the
827 * I/O cache stuff has been built up.
829 if (eeh_ops->post_init) {
830 ret = eeh_ops->post_init();
836 pr_info("EEH: PCI Enhanced I/O Error Handling Enabled\n");
838 pr_warning("EEH: No capable adapters found\n");
843 core_initcall_sync(eeh_init);
846 * eeh_add_device_early - Enable EEH for the indicated device_node
847 * @dn: device node for which to set up EEH
849 * This routine must be used to perform EEH initialization for PCI
850 * devices that were added after system boot (e.g. hotplug, dlpar).
851 * This routine must be called before any i/o is performed to the
852 * adapter (inluding any config-space i/o).
853 * Whether this actually enables EEH or not for this device depends
854 * on the CEC architecture, type of the device, on earlier boot
855 * command-line arguments & etc.
857 void eeh_add_device_early(struct device_node *dn)
859 struct pci_controller *phb;
862 * If we're doing EEH probe based on PCI device, we
863 * would delay the probe until late stage because
864 * the PCI device isn't available this moment.
866 if (!eeh_probe_mode_devtree())
869 if (!of_node_to_eeh_dev(dn))
871 phb = of_node_to_eeh_dev(dn)->phb;
873 /* USB Bus children of PCI devices will not have BUID's */
874 if (NULL == phb || 0 == phb->buid)
877 eeh_ops->of_probe(dn, NULL);
881 * eeh_add_device_tree_early - Enable EEH for the indicated device
884 * This routine must be used to perform EEH initialization for the
885 * indicated PCI device that was added after system boot (e.g.
888 void eeh_add_device_tree_early(struct device_node *dn)
890 struct device_node *sib;
892 for_each_child_of_node(dn, sib)
893 eeh_add_device_tree_early(sib);
894 eeh_add_device_early(dn);
896 EXPORT_SYMBOL_GPL(eeh_add_device_tree_early);
899 * eeh_add_device_late - Perform EEH initialization for the indicated pci device
900 * @dev: pci device for which to set up EEH
902 * This routine must be used to complete EEH initialization for PCI
903 * devices that were added after system boot (e.g. hotplug, dlpar).
905 void eeh_add_device_late(struct pci_dev *dev)
907 struct device_node *dn;
908 struct eeh_dev *edev;
910 if (!dev || !eeh_enabled())
913 pr_debug("EEH: Adding device %s\n", pci_name(dev));
915 dn = pci_device_to_OF_node(dev);
916 edev = of_node_to_eeh_dev(dn);
917 if (edev->pdev == dev) {
918 pr_debug("EEH: Already referenced !\n");
923 * The EEH cache might not be removed correctly because of
924 * unbalanced kref to the device during unplug time, which
925 * relies on pcibios_release_device(). So we have to remove
926 * that here explicitly.
929 eeh_rmv_from_parent_pe(edev);
930 eeh_addr_cache_rmv_dev(edev->pdev);
931 eeh_sysfs_remove_device(edev->pdev);
932 edev->mode &= ~EEH_DEV_SYSFS;
935 * We definitely should have the PCI device removed
936 * though it wasn't correctly. So we needn't call
937 * into error handler afterwards.
939 edev->mode |= EEH_DEV_NO_HANDLER;
942 dev->dev.archdata.edev = NULL;
946 dev->dev.archdata.edev = edev;
949 * We have to do the EEH probe here because the PCI device
950 * hasn't been created yet in the early stage.
952 if (eeh_probe_mode_dev())
953 eeh_ops->dev_probe(dev, NULL);
955 eeh_addr_cache_insert_dev(dev);
959 * eeh_add_device_tree_late - Perform EEH initialization for the indicated PCI bus
962 * This routine must be used to perform EEH initialization for PCI
963 * devices which are attached to the indicated PCI bus. The PCI bus
964 * is added after system boot through hotplug or dlpar.
966 void eeh_add_device_tree_late(struct pci_bus *bus)
970 list_for_each_entry(dev, &bus->devices, bus_list) {
971 eeh_add_device_late(dev);
972 if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) {
973 struct pci_bus *subbus = dev->subordinate;
975 eeh_add_device_tree_late(subbus);
979 EXPORT_SYMBOL_GPL(eeh_add_device_tree_late);
982 * eeh_add_sysfs_files - Add EEH sysfs files for the indicated PCI bus
985 * This routine must be used to add EEH sysfs files for PCI
986 * devices which are attached to the indicated PCI bus. The PCI bus
987 * is added after system boot through hotplug or dlpar.
989 void eeh_add_sysfs_files(struct pci_bus *bus)
993 list_for_each_entry(dev, &bus->devices, bus_list) {
994 eeh_sysfs_add_device(dev);
995 if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) {
996 struct pci_bus *subbus = dev->subordinate;
998 eeh_add_sysfs_files(subbus);
1002 EXPORT_SYMBOL_GPL(eeh_add_sysfs_files);
1005 * eeh_remove_device - Undo EEH setup for the indicated pci device
1006 * @dev: pci device to be removed
1008 * This routine should be called when a device is removed from
1009 * a running system (e.g. by hotplug or dlpar). It unregisters
1010 * the PCI device from the EEH subsystem. I/O errors affecting
1011 * this device will no longer be detected after this call; thus,
1012 * i/o errors affecting this slot may leave this device unusable.
1014 void eeh_remove_device(struct pci_dev *dev)
1016 struct eeh_dev *edev;
1018 if (!dev || !eeh_enabled())
1020 edev = pci_dev_to_eeh_dev(dev);
1022 /* Unregister the device with the EEH/PCI address search system */
1023 pr_debug("EEH: Removing device %s\n", pci_name(dev));
1025 if (!edev || !edev->pdev || !edev->pe) {
1026 pr_debug("EEH: Not referenced !\n");
1031 * During the hotplug for EEH error recovery, we need the EEH
1032 * device attached to the parent PE in order for BAR restore
1033 * a bit later. So we keep it for BAR restore and remove it
1034 * from the parent PE during the BAR resotre.
1037 dev->dev.archdata.edev = NULL;
1038 if (!(edev->pe->state & EEH_PE_KEEP))
1039 eeh_rmv_from_parent_pe(edev);
1041 edev->mode |= EEH_DEV_DISCONNECTED;
1044 * We're removing from the PCI subsystem, that means
1045 * the PCI device driver can't support EEH or not
1046 * well. So we rely on hotplug completely to do recovery
1047 * for the specific PCI device.
1049 edev->mode |= EEH_DEV_NO_HANDLER;
1051 eeh_addr_cache_rmv_dev(dev);
1052 eeh_sysfs_remove_device(dev);
1053 edev->mode &= ~EEH_DEV_SYSFS;
1056 static int proc_eeh_show(struct seq_file *m, void *v)
1058 if (!eeh_enabled()) {
1059 seq_printf(m, "EEH Subsystem is globally disabled\n");
1060 seq_printf(m, "eeh_total_mmio_ffs=%llu\n", eeh_stats.total_mmio_ffs);
1062 seq_printf(m, "EEH Subsystem is enabled\n");
1065 "no device node=%llu\n"
1066 "no config address=%llu\n"
1067 "check not wanted=%llu\n"
1068 "eeh_total_mmio_ffs=%llu\n"
1069 "eeh_false_positives=%llu\n"
1070 "eeh_slot_resets=%llu\n",
1071 eeh_stats.no_device,
1073 eeh_stats.no_cfg_addr,
1074 eeh_stats.ignored_check,
1075 eeh_stats.total_mmio_ffs,
1076 eeh_stats.false_positives,
1077 eeh_stats.slot_resets);
1083 static int proc_eeh_open(struct inode *inode, struct file *file)
1085 return single_open(file, proc_eeh_show, NULL);
1088 static const struct file_operations proc_eeh_operations = {
1089 .open = proc_eeh_open,
1091 .llseek = seq_lseek,
1092 .release = single_release,
1095 static int __init eeh_init_proc(void)
1097 if (machine_is(pseries) || machine_is(powernv))
1098 proc_create("powerpc/eeh", 0, NULL, &proc_eeh_operations);
1101 __initcall(eeh_init_proc);