3 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
4 * Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP
5 * Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu>
6 * Adapted for Power Macintosh by Paul Mackerras.
7 * Low-level exception handlers and MMU support
8 * rewritten by Paul Mackerras.
9 * Copyright (C) 1996 Paul Mackerras.
10 * MPC8xx modifications Copyright (C) 1997 Dan Malek (dmalek@jlc.net).
12 * This file contains the system call entry code, context switch
13 * code, and exception/interrupt return code for PowerPC.
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License
17 * as published by the Free Software Foundation; either version
18 * 2 of the License, or (at your option) any later version.
21 #include <linux/errno.h>
22 #include <asm/unistd.h>
23 #include <asm/processor.h>
26 #include <asm/thread_info.h>
27 #include <asm/ppc_asm.h>
28 #include <asm/asm-offsets.h>
29 #include <asm/cputable.h>
30 #include <asm/firmware.h>
32 #include <asm/ptrace.h>
33 #include <asm/irqflags.h>
34 #include <asm/ftrace.h>
41 .tc .sys_call_table[TC],.sys_call_table
43 /* This value is used to mark exception frames on the stack. */
45 .tc ID_EXC_MARKER[TC],STACK_FRAME_REGS_MARKER
52 .globl system_call_common
56 addi r1,r1,-INT_FRAME_SIZE
64 ACCOUNT_CPU_USER_ENTRY(r10, r11)
66 * This "crclr so" clears CR0.SO, which is the error indication on
67 * return from this system call. There must be no cmp instruction
68 * between it and the "mfcr r9" below, otherwise if XER.SO is set,
69 * CR0.SO will get set, causing all system calls to appear to fail.
97 addi r9,r1,STACK_FRAME_OVERHEAD
98 ld r11,exception_marker@toc(r2)
99 std r11,-16(r9) /* "regshere" marker */
100 #ifdef CONFIG_TRACE_IRQFLAGS
101 bl .trace_hardirqs_on
105 addi r9,r1,STACK_FRAME_OVERHEAD
107 #endif /* CONFIG_TRACE_IRQFLAGS */
109 stb r10,PACASOFTIRQEN(r13)
110 stb r10,PACAHARDIRQEN(r13)
112 #ifdef CONFIG_PPC_ISERIES
114 /* Hack for handling interrupts when soft-enabling on iSeries */
115 cmpdi cr1,r0,0x5555 /* syscall 0x5555 */
116 andi. r10,r12,MSR_PR /* from kernel */
117 crand 4*cr0+eq,4*cr1+eq,4*cr0+eq
119 b hardware_interrupt_entry
121 END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES)
122 #endif /* CONFIG_PPC_ISERIES */
132 addi r9,r1,STACK_FRAME_OVERHEAD
134 clrrdi r11,r1,THREAD_SHIFT
136 andi. r11,r10,_TIF_SYSCALL_T_OR_A
138 syscall_dotrace_cont:
139 cmpldi 0,r0,NR_syscalls
142 system_call: /* label this so stack traces look sane */
144 * Need to vector to 32 Bit or default sys_call_table here,
145 * based on caller's run-mode / personality.
147 ld r11,.SYS_CALL_TABLE@toc(2)
148 andi. r10,r10,_TIF_32BIT
150 addi r11,r11,8 /* use 32-bit syscall entries */
159 ldx r10,r11,r0 /* Fetch system call handler [ptr] */
161 bctrl /* Call handler */
166 bl .do_show_syscall_exit
169 clrrdi r12,r1,THREAD_SHIFT
171 /* disable interrupts so current_thread_info()->flags can't change,
172 and so that we don't get interrupted after loading SRR0/1. */
182 andi. r0,r9,(_TIF_SYSCALL_T_OR_A|_TIF_SINGLESTEP|_TIF_USER_WORK_MASK|_TIF_PERSYSCALL_MASK)
183 bne- syscall_exit_work
189 stdcx. r0,0,r1 /* to clear the reservation */
193 * Clear RI before restoring r13. If we are returning to
194 * userspace and we take an exception after restoring r13,
195 * we end up corrupting the userspace r13 value.
199 mtmsrd r11,1 /* clear MSR.RI */
201 ACCOUNT_CPU_USER_EXIT(r11, r12)
202 ld r13,GPR13(r1) /* only restore r13 if returning to usermode */
210 b . /* prevent speculative execution */
213 oris r5,r5,0x1000 /* Set SO bit in CR */
218 /* Traced system call support */
221 addi r3,r1,STACK_FRAME_OVERHEAD
222 bl .do_syscall_trace_enter
224 * Restore argument registers possibly just changed.
225 * We use the return value of do_syscall_trace_enter
226 * for the call number to look up in the table (r0).
235 addi r9,r1,STACK_FRAME_OVERHEAD
236 clrrdi r10,r1,THREAD_SHIFT
238 b syscall_dotrace_cont
245 /* If TIF_RESTOREALL is set, don't scribble on either r3 or ccr.
246 If TIF_NOERROR is set, just save r3 as it is. */
248 andi. r0,r9,_TIF_RESTOREALL
252 0: cmpld r3,r11 /* r10 is -LAST_ERRNO */
254 andi. r0,r9,_TIF_NOERROR
258 oris r5,r5,0x1000 /* Set SO bit in CR */
261 2: andi. r0,r9,(_TIF_PERSYSCALL_MASK)
264 /* Clear per-syscall TIF flags if any are set. */
266 li r11,_TIF_PERSYSCALL_MASK
267 addi r12,r12,TI_FLAGS
272 subi r12,r12,TI_FLAGS
274 4: /* Anything else left to do? */
275 andi. r0,r9,(_TIF_SYSCALL_T_OR_A|_TIF_SINGLESTEP)
276 beq .ret_from_except_lite
278 /* Re-enable interrupts */
284 addi r3,r1,STACK_FRAME_OVERHEAD
285 bl .do_syscall_trace_leave
288 /* Save non-volatile GPRs, if not already saved. */
300 * The sigsuspend and rt_sigsuspend system calls can call do_signal
301 * and thus put the process into the stopped state where we might
302 * want to examine its user state with ptrace. Therefore we need
303 * to save all the nonvolatile registers (r14 - r31) before calling
304 * the C code. Similarly, fork, vfork and clone need the full
305 * register state on the stack so that it can be copied to the child.
323 _GLOBAL(ppc32_swapcontext)
325 bl .compat_sys_swapcontext
328 _GLOBAL(ppc64_swapcontext)
333 _GLOBAL(ret_from_fork)
340 * This routine switches between two different tasks. The process
341 * state of one is saved on its kernel stack. Then the state
342 * of the other is restored from its kernel stack. The memory
343 * management hardware is updated to the second process's state.
344 * Finally, we can return to the second process, via ret_from_except.
345 * On entry, r3 points to the THREAD for the current task, r4
346 * points to the THREAD for the new task.
348 * Note: there are two ways to get to the "going out" portion
349 * of this code; either by coming in via the entry (_switch)
350 * or via "fork" which must set up an environment equivalent
351 * to the "_switch" path. If you change this you'll have to change
352 * the fork code also.
354 * The code which creates the new task context is in 'copy_thread'
355 * in arch/powerpc/kernel/process.c
361 stdu r1,-SWITCH_FRAME_SIZE(r1)
362 /* r3-r13 are caller saved -- Cort */
365 mflr r20 /* Return to switch caller */
370 oris r0,r0,MSR_VSX@h /* Disable VSX */
371 END_FTR_SECTION_IFSET(CPU_FTR_VSX)
372 #endif /* CONFIG_VSX */
373 #ifdef CONFIG_ALTIVEC
375 oris r0,r0,MSR_VEC@h /* Disable altivec */
376 mfspr r24,SPRN_VRSAVE /* save vrsave register value */
377 std r24,THREAD_VRSAVE(r3)
378 END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
379 #endif /* CONFIG_ALTIVEC */
388 std r1,KSP(r3) /* Set old stack pointer */
391 /* We need a sync somewhere here to make sure that if the
392 * previous task gets rescheduled on another CPU, it sees all
393 * stores it has performed on this one.
396 #endif /* CONFIG_SMP */
398 addi r6,r4,-THREAD /* Convert THREAD to 'current' */
399 std r6,PACACURRENT(r13) /* Set new 'current' */
401 ld r8,KSP(r4) /* new stack pointer */
403 BEGIN_FTR_SECTION_NESTED(95)
404 clrrdi r6,r8,28 /* get its ESID */
405 clrrdi r9,r1,28 /* get current sp ESID */
406 FTR_SECTION_ELSE_NESTED(95)
407 clrrdi r6,r8,40 /* get its 1T ESID */
408 clrrdi r9,r1,40 /* get current sp 1T ESID */
409 ALT_FTR_SECTION_END_NESTED_IFCLR(CPU_FTR_1T_SEGMENT, 95)
412 ALT_FTR_SECTION_END_IFSET(CPU_FTR_SLB)
413 clrldi. r0,r6,2 /* is new ESID c00000000? */
414 cmpd cr1,r6,r9 /* or is new ESID the same as current ESID? */
416 beq 2f /* if yes, don't slbie it */
418 /* Bolt in the new stack SLB entry */
419 ld r7,KSP_VSID(r4) /* Get new stack's VSID */
420 oris r0,r6,(SLB_ESID_V)@h
421 ori r0,r0,(SLB_NUM_BOLTED-1)@l
423 li r9,MMU_SEGSIZE_1T /* insert B field */
424 oris r6,r6,(MMU_SEGSIZE_1T << SLBIE_SSIZE_SHIFT)@h
425 rldimi r7,r9,SLB_VSID_SSIZE_SHIFT,0
426 END_FTR_SECTION_IFSET(CPU_FTR_1T_SEGMENT)
428 /* Update the last bolted SLB. No write barriers are needed
429 * here, provided we only update the current CPU's SLB shadow
432 ld r9,PACA_SLBSHADOWPTR(r13)
434 std r12,SLBSHADOW_STACKESID(r9) /* Clear ESID */
435 std r7,SLBSHADOW_STACKVSID(r9) /* Save VSID */
436 std r0,SLBSHADOW_STACKESID(r9) /* Save ESID */
438 /* No need to check for CPU_FTR_NO_SLBIE_B here, since when
439 * we have 1TB segments, the only CPUs known to have the errata
440 * only support less than 1TB of system memory and we'll never
441 * actually hit this code path.
445 slbie r6 /* Workaround POWER5 < DD2.1 issue */
450 clrrdi r7,r8,THREAD_SHIFT /* base of new stack */
451 /* Note: this uses SWITCH_FRAME_SIZE rather than INT_FRAME_SIZE
452 because we don't need to leave the 288-byte ABI gap at the
453 top of the kernel stack. */
454 addi r7,r7,THREAD_SIZE-SWITCH_FRAME_SIZE
456 mr r1,r8 /* start using new stack pointer */
457 std r7,PACAKSAVE(r13)
462 #ifdef CONFIG_ALTIVEC
464 ld r0,THREAD_VRSAVE(r4)
465 mtspr SPRN_VRSAVE,r0 /* if G4, restore VRSAVE reg */
466 END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
467 #endif /* CONFIG_ALTIVEC */
469 /* r3-r13 are destroyed -- Cort */
473 /* convert old thread to its task_struct for return value */
475 ld r7,_NIP(r1) /* Return to _switch caller in new task */
477 addi r1,r1,SWITCH_FRAME_SIZE
481 _GLOBAL(ret_from_except)
484 bne .ret_from_except_lite
487 _GLOBAL(ret_from_except_lite)
489 * Disable interrupts so that current_thread_info()->flags
490 * can't change between when we test it and when we return
491 * from the interrupt.
493 mfmsr r10 /* Get current interrupt state */
494 rldicl r9,r10,48,1 /* clear MSR_EE */
496 mtmsrd r9,1 /* Update machine state */
498 #ifdef CONFIG_PREEMPT
499 clrrdi r9,r1,THREAD_SHIFT /* current_thread_info() */
500 li r0,_TIF_NEED_RESCHED /* bits to check */
503 /* Move MSR_PR bit in r3 to _TIF_SIGPENDING position in r0 */
504 rlwimi r0,r3,32+TIF_SIGPENDING-MSR_PR_LG,_TIF_SIGPENDING
505 and. r0,r4,r0 /* check NEED_RESCHED and maybe SIGPENDING */
508 #else /* !CONFIG_PREEMPT */
509 ld r3,_MSR(r1) /* Returning to user mode? */
511 beq restore /* if not, just restore regs and return */
513 /* Check current_thread_info()->flags */
514 clrrdi r9,r1,THREAD_SHIFT
516 andi. r0,r4,_TIF_USER_WORK_MASK
524 b iseries_check_pending_irqs
525 ALT_FW_FTR_SECTION_END_IFCLR(FW_FEATURE_ISERIES)
527 TRACE_AND_RESTORE_IRQ(r5);
529 /* extract EE bit and use it to restore paca->hard_enabled */
531 rldicl r4,r3,49,63 /* r0 = (r3 >> 15) & 1 */
532 stb r4,PACAHARDIRQEN(r13)
546 stdcx. r0,0,r1 /* to clear the reservation */
549 * Clear RI before restoring r13. If we are returning to
550 * userspace and we take an exception after restoring r13,
551 * we end up corrupting the userspace r13 value.
554 andc r4,r4,r0 /* r0 contains MSR_RI here */
558 * r13 is our per cpu area, only restore it if we are returning to
563 ACCOUNT_CPU_USER_EXIT(r2, r4)
580 b . /* prevent speculative execution */
582 iseries_check_pending_irqs:
583 #ifdef CONFIG_PPC_ISERIES
587 /* Check for pending interrupts (iSeries) */
588 ld r3,PACALPPACAPTR(r13)
589 ld r3,LPPACAANYINT(r3)
591 beq+ 2b /* skip do_IRQ if no interrupts */
594 stb r3,PACASOFTIRQEN(r13) /* ensure we are soft-disabled */
595 #ifdef CONFIG_TRACE_IRQFLAGS
596 bl .trace_hardirqs_off
600 mtmsrd r10 /* hard-enable again */
601 addi r3,r1,STACK_FRAME_OVERHEAD
603 b .ret_from_except_lite /* loop back and handle more */
607 #ifdef CONFIG_PREEMPT
608 andi. r0,r3,MSR_PR /* Returning to user mode? */
610 /* Check that preempt_count() == 0 and interrupts are enabled */
611 lwz r8,TI_PREEMPT(r9)
615 crandc eq,cr1*4+eq,eq
617 /* here we are preempting the current task */
619 #ifdef CONFIG_TRACE_IRQFLAGS
620 bl .trace_hardirqs_on
621 /* Note: we just clobbered r10 which used to contain the previous
622 * MSR before the hard-disabling done by the caller of do_work.
623 * We don't have that value anymore, but it doesn't matter as
624 * we will hard-enable unconditionally, we can just reload the
625 * current MSR into r10
628 #endif /* CONFIG_TRACE_IRQFLAGS */
630 stb r0,PACASOFTIRQEN(r13)
631 stb r0,PACAHARDIRQEN(r13)
633 mtmsrd r10,1 /* reenable interrupts */
636 clrrdi r9,r1,THREAD_SHIFT
637 rldicl r10,r10,48,1 /* disable interrupts again */
641 andi. r0,r4,_TIF_NEED_RESCHED
647 /* Enable interrupts */
651 andi. r0,r4,_TIF_NEED_RESCHED
654 b .ret_from_except_lite
657 addi r3,r1,STACK_FRAME_OVERHEAD
662 addi r3,r1,STACK_FRAME_OVERHEAD
663 bl .unrecoverable_exception
666 #ifdef CONFIG_PPC_RTAS
668 * On CHRP, the Run-Time Abstraction Services (RTAS) have to be
669 * called with the MMU off.
671 * In addition, we need to be in 32b mode, at least for now.
673 * Note: r3 is an input parameter to rtas, so don't trash it...
678 stdu r1,-RTAS_FRAME_SIZE(r1) /* Save SP and create stack space. */
680 /* Because RTAS is running in 32b mode, it clobbers the high order half
681 * of all registers that it saves. We therefore save those registers
682 * RTAS might touch to the stack. (r0, r3-r13 are caller saved)
684 SAVE_GPR(2, r1) /* Save the TOC */
685 SAVE_GPR(13, r1) /* Save paca */
686 SAVE_8GPRS(14, r1) /* Save the non-volatiles */
687 SAVE_10GPRS(22, r1) /* ditto */
700 /* Temporary workaround to clear CR until RTAS can be modified to
707 /* There is no way it is acceptable to get here with interrupts enabled,
708 * check it with the asm equivalent of WARN_ON
710 lbz r0,PACASOFTIRQEN(r13)
712 EMIT_BUG_ENTRY 1b,__FILE__,__LINE__,BUGFLAG_WARNING
715 /* Hard-disable interrupts */
721 /* Unfortunately, the stack pointer and the MSR are also clobbered,
722 * so they are saved in the PACA which allows us to restore
723 * our original state after RTAS returns.
726 std r6,PACASAVEDMSR(r13)
728 /* Setup our real return addr */
729 LOAD_REG_ADDR(r4,.rtas_return_loc)
730 clrldi r4,r4,2 /* convert to realmode address */
734 ori r0,r0,MSR_EE|MSR_SE|MSR_BE|MSR_RI
738 rldicr r9,r9,MSR_SF_LG,(63-MSR_SF_LG)
739 ori r9,r9,MSR_IR|MSR_DR|MSR_FE0|MSR_FE1|MSR_FP
742 sync /* disable interrupts so SRR0/1 */
743 mtmsrd r0 /* don't get trashed */
745 LOAD_REG_ADDR(r4, rtas)
746 ld r5,RTASENTRY(r4) /* get the rtas->entry value */
747 ld r4,RTASBASE(r4) /* get the rtas->base value */
752 b . /* prevent speculative execution */
754 _STATIC(rtas_return_loc)
755 /* relocation is off at this point */
756 mfspr r4,SPRN_SPRG3 /* Get PACA */
757 clrldi r4,r4,2 /* convert to realmode address */
761 ld r3,(1f-0b)(r3) /* get &.rtas_restore_regs */
769 ld r1,PACAR1(r4) /* Restore our SP */
770 ld r4,PACASAVEDMSR(r4) /* Restore our MSR */
775 b . /* prevent speculative execution */
778 1: .llong .rtas_restore_regs
780 _STATIC(rtas_restore_regs)
781 /* relocation is on at this point */
782 REST_GPR(2, r1) /* Restore the TOC */
783 REST_GPR(13, r1) /* Restore paca */
784 REST_8GPRS(14, r1) /* Restore the non-volatiles */
785 REST_10GPRS(22, r1) /* ditto */
800 addi r1,r1,RTAS_FRAME_SIZE /* Unstack our frame */
801 ld r0,16(r1) /* get return address */
804 blr /* return to caller */
806 #endif /* CONFIG_PPC_RTAS */
811 stdu r1,-PROM_FRAME_SIZE(r1) /* Save SP and create stack space */
813 /* Because PROM is running in 32b mode, it clobbers the high order half
814 * of all registers that it saves. We therefore save those registers
815 * PROM might touch to the stack. (r0, r3-r13 are caller saved)
838 /* Get the PROM entrypoint */
842 /* Switch MSR to 32 bits mode
846 rldicr r12,r12,MSR_SF_LG,(63-MSR_SF_LG)
849 rldicr r12,r12,MSR_ISF_LG,(63-MSR_ISF_LG)
854 /* Restore arguments & enter PROM here... */
858 /* Just make sure that r1 top 32 bits didn't get
863 /* Restore the MSR (back to 64 bits) */
868 /* Restore other registers */
888 addi r1,r1,PROM_FRAME_SIZE
893 #ifdef CONFIG_FUNCTION_TRACER
894 #ifdef CONFIG_DYNAMIC_FTRACE
899 _GLOBAL(ftrace_caller)
900 /* Taken from output of objdump from lib64/glibc */
906 subi r3, r3, MCOUNT_INSN_SIZE
911 #ifdef CONFIG_FUNCTION_GRAPH_TRACER
912 .globl ftrace_graph_call
915 _GLOBAL(ftrace_graph_stub)
927 /* Taken from output of objdump from lib64/glibc */
934 subi r3, r3, MCOUNT_INSN_SIZE
935 LOAD_REG_ADDR(r5,ftrace_trace_function)
943 #ifdef CONFIG_FUNCTION_GRAPH_TRACER
944 b ftrace_graph_caller
952 #endif /* CONFIG_DYNAMIC_FTRACE */
954 #ifdef CONFIG_FUNCTION_GRAPH_TRACER
955 _GLOBAL(ftrace_graph_caller)
956 /* load r4 with local address */
958 subi r4, r4, MCOUNT_INSN_SIZE
960 /* get the parent address */
964 bl .prepare_ftrace_return
972 _GLOBAL(return_to_handler)
973 /* need to save return values */
983 LOAD_REG_IMMEDIATE(r4,ftrace_return_to_handler)
986 bl .ftrace_return_to_handler
989 /* return value has real return address */
998 /* Jump back to real return address */
1000 #endif /* CONFIG_FUNCTION_GRAPH_TRACER */
1001 #endif /* CONFIG_FUNCTION_TRACER */