2 * This file contains the 64-bit "server" PowerPC variant
3 * of the low level exception handling including exception
4 * vectors, exception return, part of the slb and stab
5 * handling and other fixed offset specific things.
7 * This file is meant to be #included from head_64.S due to
8 * position dependent assembly.
10 * Most of this originates from head_64.S and thus has the same
15 #include <asm/hw_irq.h>
16 #include <asm/exception-64s.h>
17 #include <asm/ptrace.h>
20 * We layout physical memory as follows:
21 * 0x0000 - 0x00ff : Secondary processor spin code
22 * 0x0100 - 0x17ff : pSeries Interrupt prologs
23 * 0x1800 - 0x4000 : interrupt support common interrupt prologs
24 * 0x4000 - 0x5fff : pSeries interrupts with IR=1,DR=1
25 * 0x6000 - 0x6fff : more interrupt support including for IR=1,DR=1
26 * 0x7000 - 0x7fff : FWNMI data area
27 * 0x8000 - 0x8fff : Initial (CPU0) segment table
28 * 0x9000 - : Early init and support code
30 /* Syscall routine is used twice, in reloc-off and reloc-on paths */
31 #define SYSCALL_PSERIES_1 \
35 END_FTR_SECTION_IFSET(CPU_FTR_REAL_LE) \
38 mfspr r11,SPRN_SRR0 ; \
41 #define SYSCALL_PSERIES_2_RFID \
42 mfspr r12,SPRN_SRR1 ; \
43 ld r10,PACAKBASE(r13) ; \
44 LOAD_HANDLER(r10, system_call_entry) ; \
45 mtspr SPRN_SRR0,r10 ; \
46 ld r10,PACAKMSR(r13) ; \
47 mtspr SPRN_SRR1,r10 ; \
49 b . ; /* prevent speculative execution */
51 #define SYSCALL_PSERIES_3 \
52 /* Fast LE/BE switch system call */ \
53 1: mfspr r12,SPRN_SRR1 ; \
54 xori r12,r12,MSR_LE ; \
55 mtspr SPRN_SRR1,r12 ; \
56 rfid ; /* return to userspace */ \
57 b . ; /* prevent speculative execution */
59 #if defined(CONFIG_RELOCATABLE)
61 * We can't branch directly; in the direct case we use LR
62 * and system_call_entry restores LR. (We thus need to move
63 * LR to r10 in the RFID case too.)
65 #define SYSCALL_PSERIES_2_DIRECT \
67 ld r12,PACAKBASE(r13) ; \
68 LOAD_HANDLER(r12, system_call_entry_direct) ; \
70 mfspr r12,SPRN_SRR1 ; \
71 /* Re-use of r13... No spare regs to do this */ \
74 GET_PACA(r13) ; /* get r13 back */ \
77 /* We can branch directly */
78 #define SYSCALL_PSERIES_2_DIRECT \
79 mfspr r12,SPRN_SRR1 ; \
81 mtmsrd r10,1 ; /* Set RI (EE=0) */ \
82 b system_call_entry_direct ;
86 * This is the start of the interrupt handlers for pSeries
87 * This code runs with relocation off.
88 * Code from here to __end_interrupts gets copied down to real
89 * address 0x100 when we are running a relocatable kernel.
90 * Therefore any relative branches in this section must only
91 * branch to labels in this section.
94 .globl __start_interrupts
97 .globl system_reset_pSeries;
99 HMT_MEDIUM_PPR_DISCARD
101 #ifdef CONFIG_PPC_P7_NAP
103 /* Running native on arch 2.06 or later, check if we are
104 * waking up from nap. We only handle no state loss and
105 * supervisor state loss. We do -not- handle hypervisor
106 * state loss at this time.
109 rlwinm. r13,r13,47-31,30,31
112 /* waking up from powersave (nap) state */
114 /* Total loss of HV state is fatal, we could try to use the
115 * PIR to locate a PACA, then use an emergency stack etc...
116 * OPAL v3 based powernv platforms have new idle states
117 * which fall in this catagory.
122 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
123 li r0,KVM_HWTHREAD_IN_KERNEL
124 stb r0,HSTATE_HWTHREAD_STATE(r13)
125 /* Order setting hwthread_state vs. testing hwthread_req */
127 lbz r0,HSTATE_HWTHREAD_REQ(r13)
135 b .power7_wakeup_noloss
136 2: b .power7_wakeup_loss
138 /* Fast Sleep wakeup on PowerNV */
140 b .power7_wakeup_tb_loss
143 END_FTR_SECTION_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)
144 #endif /* CONFIG_PPC_P7_NAP */
145 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common, EXC_STD,
149 machine_check_pSeries_1:
150 /* This is moved out of line as it can be patched by FW, but
151 * some code path might still want to branch into the original
154 HMT_MEDIUM_PPR_DISCARD
155 SET_SCRATCH0(r13) /* save r13 */
156 #ifdef CONFIG_PPC_P7_NAP
158 /* Running native on arch 2.06 or later, check if we are
159 * waking up from nap. We only handle no state loss and
160 * supervisor state loss. We do -not- handle hypervisor
161 * state loss at this time.
164 rlwinm. r13,r13,47-31,30,31
165 OPT_GET_SPR(r13, SPRN_CFAR, CPU_FTR_CFAR)
169 rlwinm. r13,r13,47-31,30,31
170 /* waking up from powersave (nap) state */
172 /* Total loss of HV state is fatal. let's just stay stuck here */
173 OPT_GET_SPR(r13, SPRN_CFAR, CPU_FTR_CFAR)
176 OPT_SET_SPR(r13, SPRN_CFAR, CPU_FTR_CFAR)
177 END_FTR_SECTION_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)
178 #endif /* CONFIG_PPC_P7_NAP */
179 EXCEPTION_PROLOG_0(PACA_EXMC)
181 b machine_check_pSeries_early
183 b machine_check_pSeries_0
184 ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE)
187 .globl data_access_pSeries
189 HMT_MEDIUM_PPR_DISCARD
192 b data_access_check_stab
193 data_access_not_stab:
194 END_MMU_FTR_SECTION_IFCLR(MMU_FTR_SLB)
195 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, data_access_common, EXC_STD,
199 .globl data_access_slb_pSeries
200 data_access_slb_pSeries:
201 HMT_MEDIUM_PPR_DISCARD
203 EXCEPTION_PROLOG_0(PACA_EXSLB)
204 EXCEPTION_PROLOG_1(PACA_EXSLB, KVMTEST, 0x380)
205 std r3,PACA_EXSLB+EX_R3(r13)
208 /* Keep that around for when we re-implement dynamic VSIDs */
210 bge slb_miss_user_pseries
211 #endif /* __DISABLED__ */
213 #ifndef CONFIG_RELOCATABLE
217 * We can't just use a direct branch to .slb_miss_realmode
218 * because the distance from here to there depends on where
219 * the kernel ends up being put.
222 ld r10,PACAKBASE(r13)
223 LOAD_HANDLER(r10, .slb_miss_realmode)
228 STD_EXCEPTION_PSERIES(0x400, 0x400, instruction_access)
231 .globl instruction_access_slb_pSeries
232 instruction_access_slb_pSeries:
233 HMT_MEDIUM_PPR_DISCARD
235 EXCEPTION_PROLOG_0(PACA_EXSLB)
236 EXCEPTION_PROLOG_1(PACA_EXSLB, KVMTEST_PR, 0x480)
237 std r3,PACA_EXSLB+EX_R3(r13)
238 mfspr r3,SPRN_SRR0 /* SRR0 is faulting address */
240 /* Keep that around for when we re-implement dynamic VSIDs */
242 bge slb_miss_user_pseries
243 #endif /* __DISABLED__ */
245 #ifndef CONFIG_RELOCATABLE
249 ld r10,PACAKBASE(r13)
250 LOAD_HANDLER(r10, .slb_miss_realmode)
255 /* We open code these as we can't have a ". = x" (even with
256 * x = "." within a feature section
259 .globl hardware_interrupt_pSeries;
260 .globl hardware_interrupt_hv;
261 hardware_interrupt_pSeries:
262 hardware_interrupt_hv:
263 HMT_MEDIUM_PPR_DISCARD
265 _MASKABLE_EXCEPTION_PSERIES(0x502, hardware_interrupt,
266 EXC_HV, SOFTEN_TEST_HV)
267 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0x502)
269 _MASKABLE_EXCEPTION_PSERIES(0x500, hardware_interrupt,
270 EXC_STD, SOFTEN_TEST_HV_201)
271 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x500)
272 ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)
274 STD_EXCEPTION_PSERIES(0x600, 0x600, alignment)
275 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x600)
277 STD_EXCEPTION_PSERIES(0x700, 0x700, program_check)
278 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x700)
280 STD_EXCEPTION_PSERIES(0x800, 0x800, fp_unavailable)
281 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x800)
284 .globl decrementer_pSeries
286 _MASKABLE_EXCEPTION_PSERIES(0x900, decrementer, EXC_STD, SOFTEN_TEST_PR)
288 STD_EXCEPTION_HV(0x980, 0x982, hdecrementer)
290 MASKABLE_EXCEPTION_PSERIES(0xa00, 0xa00, doorbell_super)
291 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xa00)
293 STD_EXCEPTION_PSERIES(0xb00, 0xb00, trap_0b)
294 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xb00)
297 .globl system_call_pSeries
300 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER
303 std r9,PACA_EXGEN+EX_R9(r13)
304 std r10,PACA_EXGEN+EX_R10(r13)
310 SYSCALL_PSERIES_2_RFID
312 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xc00)
314 STD_EXCEPTION_PSERIES(0xd00, 0xd00, single_step)
315 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xd00)
317 /* At 0xe??? we have a bunch of hypervisor exceptions, we branch
318 * out of line to handle them
321 hv_data_storage_trampoline:
323 EXCEPTION_PROLOG_0(PACA_EXGEN)
327 hv_instr_storage_trampoline:
329 EXCEPTION_PROLOG_0(PACA_EXGEN)
333 emulation_assist_trampoline:
335 EXCEPTION_PROLOG_0(PACA_EXGEN)
336 b emulation_assist_hv
339 hv_exception_trampoline:
341 EXCEPTION_PROLOG_0(PACA_EXGEN)
345 hv_doorbell_trampoline:
347 EXCEPTION_PROLOG_0(PACA_EXGEN)
350 /* We need to deal with the Altivec unavailable exception
351 * here which is at 0xf20, thus in the middle of the
352 * prolog code of the PerformanceMonitor one. A little
353 * trickery is thus necessary
356 performance_monitor_pseries_trampoline:
358 EXCEPTION_PROLOG_0(PACA_EXGEN)
359 b performance_monitor_pSeries
362 altivec_unavailable_pseries_trampoline:
364 EXCEPTION_PROLOG_0(PACA_EXGEN)
365 b altivec_unavailable_pSeries
368 vsx_unavailable_pseries_trampoline:
370 EXCEPTION_PROLOG_0(PACA_EXGEN)
371 b vsx_unavailable_pSeries
374 facility_unavailable_trampoline:
376 EXCEPTION_PROLOG_0(PACA_EXGEN)
377 b facility_unavailable_pSeries
380 hv_facility_unavailable_trampoline:
382 EXCEPTION_PROLOG_0(PACA_EXGEN)
383 b facility_unavailable_hv
385 #ifdef CONFIG_CBE_RAS
386 STD_EXCEPTION_HV(0x1200, 0x1202, cbe_system_error)
387 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1202)
388 #endif /* CONFIG_CBE_RAS */
390 STD_EXCEPTION_PSERIES(0x1300, 0x1300, instruction_breakpoint)
391 KVM_HANDLER_PR_SKIP(PACA_EXGEN, EXC_STD, 0x1300)
394 .global denorm_exception_hv
396 HMT_MEDIUM_PPR_DISCARD
397 mtspr SPRN_SPRG_HSCRATCH0,r13
398 EXCEPTION_PROLOG_0(PACA_EXGEN)
399 EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, 0x1500)
401 #ifdef CONFIG_PPC_DENORMALISATION
403 mfspr r11,SPRN_HSRR0 /* save HSRR0 */
404 andis. r10,r10,(HSRR1_DENORM)@h /* denorm? */
405 addi r11,r11,-4 /* HSRR0 is next instruction */
410 EXCEPTION_PROLOG_PSERIES_1(denorm_common, EXC_HV)
411 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_STD, 0x1500)
413 #ifdef CONFIG_CBE_RAS
414 STD_EXCEPTION_HV(0x1600, 0x1602, cbe_maintenance)
415 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1602)
416 #endif /* CONFIG_CBE_RAS */
418 STD_EXCEPTION_PSERIES(0x1700, 0x1700, altivec_assist)
419 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x1700)
421 #ifdef CONFIG_CBE_RAS
422 STD_EXCEPTION_HV(0x1800, 0x1802, cbe_thermal)
423 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1802)
426 #endif /* CONFIG_CBE_RAS */
429 /*** Out of line interrupts support ***/
432 /* moved from 0x200 */
433 machine_check_pSeries_early:
435 EXCEPTION_PROLOG_1(PACA_EXMC, NOTEST, 0x200)
440 * Original R9 to R13 is saved on PACA_EXMC
442 * Switch to mc_emergency stack and handle re-entrancy (though we
443 * currently don't test for overflow). Save MCE registers srr1,
444 * srr0, dar and dsisr and then set ME=1
446 * We use paca->in_mce to check whether this is the first entry or
447 * nested machine check. We increment paca->in_mce to track nested
450 * If this is the first entry then set stack pointer to
451 * paca->mc_emergency_sp, otherwise r1 is already pointing to
452 * stack frame on mc_emergency stack.
454 * NOTE: We are here with MSR_ME=0 (off), which means we risk a
455 * checkstop if we get another machine check exception before we do
456 * rfid with MSR_ME=1.
458 mr r11,r1 /* Save r1 */
459 lhz r10,PACA_IN_MCE(r13)
460 cmpwi r10,0 /* Are we in nested machine check */
461 bne 0f /* Yes, we are. */
462 /* First machine check entry */
463 ld r1,PACAMCEMERGSP(r13) /* Use MC emergency stack */
464 0: subi r1,r1,INT_FRAME_SIZE /* alloc stack frame */
465 addi r10,r10,1 /* increment paca->in_mce */
466 sth r10,PACA_IN_MCE(r13)
467 std r11,GPR1(r1) /* Save r1 on the stack. */
468 std r11,0(r1) /* make stack chain pointer */
469 mfspr r11,SPRN_SRR0 /* Save SRR0 */
471 mfspr r11,SPRN_SRR1 /* Save SRR1 */
473 mfspr r11,SPRN_DAR /* Save DAR */
475 mfspr r11,SPRN_DSISR /* Save DSISR */
477 std r9,_CCR(r1) /* Save CR in stackframe */
478 /* Save r9 through r13 from EXMC save area to stack frame. */
479 EXCEPTION_PROLOG_COMMON_2(PACA_EXMC)
480 mfmsr r11 /* get MSR value */
481 ori r11,r11,MSR_ME /* turn on ME bit */
482 ori r11,r11,MSR_RI /* turn on RI bit */
483 ld r12,PACAKBASE(r13) /* get high part of &label */
484 LOAD_HANDLER(r12, machine_check_handle_early)
488 b . /* prevent speculative execution */
489 END_FTR_SECTION_IFSET(CPU_FTR_HVMODE)
491 machine_check_pSeries:
492 .globl machine_check_fwnmi
494 HMT_MEDIUM_PPR_DISCARD
495 SET_SCRATCH0(r13) /* save r13 */
496 EXCEPTION_PROLOG_0(PACA_EXMC)
497 machine_check_pSeries_0:
498 EXCEPTION_PROLOG_1(PACA_EXMC, KVMTEST, 0x200)
499 EXCEPTION_PROLOG_PSERIES_1(machine_check_common, EXC_STD)
500 KVM_HANDLER_SKIP(PACA_EXMC, EXC_STD, 0x200)
502 /* moved from 0x300 */
503 data_access_check_stab:
505 std r9,PACA_EXSLB+EX_R9(r13)
506 std r10,PACA_EXSLB+EX_R10(r13)
510 rlwimi r10,r9,16,0x20
511 #ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
512 lbz r9,HSTATE_IN_GUEST(r13)
513 rlwimi r10,r9,8,0x300
517 beq do_stab_bolted_pSeries
519 ld r9,PACA_EXSLB+EX_R9(r13)
520 ld r10,PACA_EXSLB+EX_R10(r13)
521 b data_access_not_stab
522 do_stab_bolted_pSeries:
523 std r11,PACA_EXSLB+EX_R11(r13)
524 std r12,PACA_EXSLB+EX_R12(r13)
526 std r10,PACA_EXSLB+EX_R13(r13)
527 EXCEPTION_PROLOG_PSERIES_1(.do_stab_bolted, EXC_STD)
529 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_STD, 0x300)
530 KVM_HANDLER_SKIP(PACA_EXSLB, EXC_STD, 0x380)
531 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x400)
532 KVM_HANDLER_PR(PACA_EXSLB, EXC_STD, 0x480)
533 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x900)
534 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0x982)
536 #ifdef CONFIG_PPC_DENORMALISATION
540 * To denormalise we need to move a copy of the register to itself.
541 * For POWER6 do that here for all FP regs.
544 ori r10,r10,(MSR_FP|MSR_FE0|MSR_FE1)
545 xori r10,r10,(MSR_FE0|MSR_FE1)
549 #define FMR2(n) fmr (n), (n) ; fmr n+1, n+1
550 #define FMR4(n) FMR2(n) ; FMR2(n+2)
551 #define FMR8(n) FMR4(n) ; FMR4(n+4)
552 #define FMR16(n) FMR8(n) ; FMR8(n+8)
553 #define FMR32(n) FMR16(n) ; FMR16(n+16)
558 * To denormalise we need to move a copy of the register to itself.
559 * For POWER7 do that here for the first 32 VSX registers only.
562 oris r10,r10,MSR_VSX@h
566 #define XVCPSGNDP2(n) XVCPSGNDP(n,n,n) ; XVCPSGNDP(n+1,n+1,n+1)
567 #define XVCPSGNDP4(n) XVCPSGNDP2(n) ; XVCPSGNDP2(n+2)
568 #define XVCPSGNDP8(n) XVCPSGNDP4(n) ; XVCPSGNDP4(n+4)
569 #define XVCPSGNDP16(n) XVCPSGNDP8(n) ; XVCPSGNDP8(n+8)
570 #define XVCPSGNDP32(n) XVCPSGNDP16(n) ; XVCPSGNDP16(n+16)
573 ALT_FTR_SECTION_END_IFCLR(CPU_FTR_ARCH_206)
577 END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_207S)
579 * To denormalise we need to move a copy of the register to itself.
580 * For POWER8 we need to do that for all 64 VSX registers
586 ld r9,PACA_EXGEN+EX_R9(r13)
587 RESTORE_PPR_PACA(PACA_EXGEN, r10)
589 ld r10,PACA_EXGEN+EX_CFAR(r13)
591 END_FTR_SECTION_IFSET(CPU_FTR_CFAR)
592 ld r10,PACA_EXGEN+EX_R10(r13)
593 ld r11,PACA_EXGEN+EX_R11(r13)
594 ld r12,PACA_EXGEN+EX_R12(r13)
595 ld r13,PACA_EXGEN+EX_R13(r13)
601 /* moved from 0xe00 */
602 STD_EXCEPTION_HV_OOL(0xe02, h_data_storage)
603 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0xe02)
604 STD_EXCEPTION_HV_OOL(0xe22, h_instr_storage)
605 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe22)
606 STD_EXCEPTION_HV_OOL(0xe42, emulation_assist)
607 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe42)
608 STD_EXCEPTION_HV_OOL(0xe62, hmi_exception) /* need to flush cache ? */
609 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe62)
610 MASKABLE_EXCEPTION_HV_OOL(0xe82, h_doorbell)
611 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe82)
613 /* moved from 0xf00 */
614 STD_EXCEPTION_PSERIES_OOL(0xf00, performance_monitor)
615 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf00)
616 STD_EXCEPTION_PSERIES_OOL(0xf20, altivec_unavailable)
617 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf20)
618 STD_EXCEPTION_PSERIES_OOL(0xf40, vsx_unavailable)
619 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf40)
620 STD_EXCEPTION_PSERIES_OOL(0xf60, facility_unavailable)
621 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf60)
622 STD_EXCEPTION_HV_OOL(0xf82, facility_unavailable)
623 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xf82)
626 * An interrupt came in while soft-disabled. We set paca->irq_happened, then:
627 * - If it was a decrementer interrupt, we bump the dec to max and and return.
628 * - If it was a doorbell we return immediately since doorbells are edge
629 * triggered and won't automatically refire.
630 * - else we hard disable and return.
631 * This is called with r10 containing the value to OR to the paca field.
633 #define MASKED_INTERRUPT(_H) \
634 masked_##_H##interrupt: \
635 std r11,PACA_EXGEN+EX_R11(r13); \
636 lbz r11,PACAIRQHAPPENED(r13); \
638 stb r11,PACAIRQHAPPENED(r13); \
639 cmpwi r10,PACA_IRQ_DEC; \
642 ori r10,r10,0xffff; \
643 mtspr SPRN_DEC,r10; \
645 1: cmpwi r10,PACA_IRQ_DBELL; \
647 mfspr r10,SPRN_##_H##SRR1; \
648 rldicl r10,r10,48,1; /* clear MSR_EE */ \
650 mtspr SPRN_##_H##SRR1,r10; \
652 ld r9,PACA_EXGEN+EX_R9(r13); \
653 ld r10,PACA_EXGEN+EX_R10(r13); \
654 ld r11,PACA_EXGEN+EX_R11(r13); \
663 * Called from arch_local_irq_enable when an interrupt needs
664 * to be resent. r3 contains 0x500, 0x900, 0xa00 or 0xe80 to indicate
665 * which kind of interrupt. MSR:EE is already off. We generate a
666 * stackframe like if a real interrupt had happened.
668 * Note: While MSR:EE is off, we need to make sure that _MSR
669 * in the generated frame has EE set to 1 or the exception
670 * handler will not properly re-enable them.
672 _GLOBAL(__replay_interrupt)
673 /* We are going to jump to the exception common code which
674 * will retrieve various register values from the PACA which
675 * we don't give a damn about, so we don't bother storing them.
682 beq decrementer_common
684 beq hardware_interrupt_common
687 beq h_doorbell_common
690 beq doorbell_super_common
691 ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE)
694 #ifdef CONFIG_PPC_PSERIES
696 * Vectors for the FWNMI option. Share common code.
698 .globl system_reset_fwnmi
701 HMT_MEDIUM_PPR_DISCARD
702 SET_SCRATCH0(r13) /* save r13 */
703 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common, EXC_STD,
706 #endif /* CONFIG_PPC_PSERIES */
710 * This is used for when the SLB miss handler has to go virtual,
711 * which doesn't happen for now anymore but will once we re-implement
712 * dynamic VSIDs for shared page tables
714 slb_miss_user_pseries:
715 std r10,PACA_EXGEN+EX_R10(r13)
716 std r11,PACA_EXGEN+EX_R11(r13)
717 std r12,PACA_EXGEN+EX_R12(r13)
719 ld r11,PACA_EXSLB+EX_R9(r13)
720 ld r12,PACA_EXSLB+EX_R3(r13)
721 std r10,PACA_EXGEN+EX_R13(r13)
722 std r11,PACA_EXGEN+EX_R9(r13)
723 std r12,PACA_EXGEN+EX_R3(r13)
726 mfspr r11,SRR0 /* save SRR0 */
727 ori r12,r12,slb_miss_user_common@l /* virt addr of handler */
728 ori r10,r10,MSR_IR|MSR_DR|MSR_RI
730 mfspr r12,SRR1 /* and SRR1 */
733 b . /* prevent spec. execution */
734 #endif /* __DISABLED__ */
736 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER
737 kvmppc_skip_interrupt:
739 * Here all GPRs are unchanged from when the interrupt happened
740 * except for r13, which is saved in SPRG_SCRATCH0.
749 kvmppc_skip_Hinterrupt:
751 * Here all GPRs are unchanged from when the interrupt happened
752 * except for r13, which is saved in SPRG_SCRATCH0.
754 mfspr r13, SPRN_HSRR0
756 mtspr SPRN_HSRR0, r13
763 * Code from here down to __end_handlers is invoked from the
764 * exception prologs above. Because the prologs assemble the
765 * addresses of these handlers using the LOAD_HANDLER macro,
766 * which uses an ori instruction, these handlers must be in
767 * the first 64k of the kernel image.
770 /*** Common interrupt handlers ***/
772 STD_EXCEPTION_COMMON(0x100, system_reset, .system_reset_exception)
774 STD_EXCEPTION_COMMON_ASYNC(0x500, hardware_interrupt, do_IRQ)
775 STD_EXCEPTION_COMMON_ASYNC(0x900, decrementer, .timer_interrupt)
776 STD_EXCEPTION_COMMON(0x980, hdecrementer, .hdec_interrupt)
777 #ifdef CONFIG_PPC_DOORBELL
778 STD_EXCEPTION_COMMON_ASYNC(0xa00, doorbell_super, .doorbell_exception)
780 STD_EXCEPTION_COMMON_ASYNC(0xa00, doorbell_super, .unknown_exception)
782 STD_EXCEPTION_COMMON(0xb00, trap_0b, .unknown_exception)
783 STD_EXCEPTION_COMMON(0xd00, single_step, .single_step_exception)
784 STD_EXCEPTION_COMMON(0xe00, trap_0e, .unknown_exception)
785 STD_EXCEPTION_COMMON(0xe40, emulation_assist, .emulation_assist_interrupt)
786 STD_EXCEPTION_COMMON(0xe60, hmi_exception, .unknown_exception)
787 #ifdef CONFIG_PPC_DOORBELL
788 STD_EXCEPTION_COMMON_ASYNC(0xe80, h_doorbell, .doorbell_exception)
790 STD_EXCEPTION_COMMON_ASYNC(0xe80, h_doorbell, .unknown_exception)
792 STD_EXCEPTION_COMMON_ASYNC(0xf00, performance_monitor, .performance_monitor_exception)
793 STD_EXCEPTION_COMMON(0x1300, instruction_breakpoint, .instruction_breakpoint_exception)
794 STD_EXCEPTION_COMMON(0x1502, denorm, .unknown_exception)
795 #ifdef CONFIG_ALTIVEC
796 STD_EXCEPTION_COMMON(0x1700, altivec_assist, .altivec_assist_exception)
798 STD_EXCEPTION_COMMON(0x1700, altivec_assist, .unknown_exception)
800 #ifdef CONFIG_CBE_RAS
801 STD_EXCEPTION_COMMON(0x1200, cbe_system_error, .cbe_system_error_exception)
802 STD_EXCEPTION_COMMON(0x1600, cbe_maintenance, .cbe_maintenance_exception)
803 STD_EXCEPTION_COMMON(0x1800, cbe_thermal, .cbe_thermal_exception)
804 #endif /* CONFIG_CBE_RAS */
807 * Relocation-on interrupts: A subset of the interrupts can be delivered
808 * with IR=1/DR=1, if AIL==2 and MSR.HV won't be changed by delivering
809 * it. Addresses are the same as the original interrupt addresses, but
810 * offset by 0xc000000000004000.
811 * It's impossible to receive interrupts below 0x300 via this mechanism.
812 * KVM: None of these traps are from the guest ; anything that escalated
813 * to HV=1 from HV=0 is delivered via real mode handlers.
817 * This uses the standard macro, since the original 0x300 vector
818 * only has extra guff for STAB-based processors -- which never
821 STD_RELON_EXCEPTION_PSERIES(0x4300, 0x300, data_access)
823 .globl data_access_slb_relon_pSeries
824 data_access_slb_relon_pSeries:
826 EXCEPTION_PROLOG_0(PACA_EXSLB)
827 EXCEPTION_PROLOG_1(PACA_EXSLB, NOTEST, 0x380)
828 std r3,PACA_EXSLB+EX_R3(r13)
831 #ifndef CONFIG_RELOCATABLE
835 * We can't just use a direct branch to .slb_miss_realmode
836 * because the distance from here to there depends on where
837 * the kernel ends up being put.
840 ld r10,PACAKBASE(r13)
841 LOAD_HANDLER(r10, .slb_miss_realmode)
846 STD_RELON_EXCEPTION_PSERIES(0x4400, 0x400, instruction_access)
848 .globl instruction_access_slb_relon_pSeries
849 instruction_access_slb_relon_pSeries:
851 EXCEPTION_PROLOG_0(PACA_EXSLB)
852 EXCEPTION_PROLOG_1(PACA_EXSLB, NOTEST, 0x480)
853 std r3,PACA_EXSLB+EX_R3(r13)
854 mfspr r3,SPRN_SRR0 /* SRR0 is faulting address */
856 #ifndef CONFIG_RELOCATABLE
860 ld r10,PACAKBASE(r13)
861 LOAD_HANDLER(r10, .slb_miss_realmode)
867 .globl hardware_interrupt_relon_pSeries;
868 .globl hardware_interrupt_relon_hv;
869 hardware_interrupt_relon_pSeries:
870 hardware_interrupt_relon_hv:
872 _MASKABLE_RELON_EXCEPTION_PSERIES(0x502, hardware_interrupt, EXC_HV, SOFTEN_TEST_HV)
874 _MASKABLE_RELON_EXCEPTION_PSERIES(0x500, hardware_interrupt, EXC_STD, SOFTEN_TEST_PR)
875 ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE)
876 STD_RELON_EXCEPTION_PSERIES(0x4600, 0x600, alignment)
877 STD_RELON_EXCEPTION_PSERIES(0x4700, 0x700, program_check)
878 STD_RELON_EXCEPTION_PSERIES(0x4800, 0x800, fp_unavailable)
879 MASKABLE_RELON_EXCEPTION_PSERIES(0x4900, 0x900, decrementer)
880 STD_RELON_EXCEPTION_HV(0x4980, 0x982, hdecrementer)
881 MASKABLE_RELON_EXCEPTION_PSERIES(0x4a00, 0xa00, doorbell_super)
882 STD_RELON_EXCEPTION_PSERIES(0x4b00, 0xb00, trap_0b)
885 .globl system_call_relon_pSeries
886 system_call_relon_pSeries:
889 SYSCALL_PSERIES_2_DIRECT
892 STD_RELON_EXCEPTION_PSERIES(0x4d00, 0xd00, single_step)
895 b . /* Can't happen, see v2.07 Book III-S section 6.5 */
898 b . /* Can't happen, see v2.07 Book III-S section 6.5 */
901 emulation_assist_relon_trampoline:
903 EXCEPTION_PROLOG_0(PACA_EXGEN)
904 b emulation_assist_relon_hv
907 b . /* Can't happen, see v2.07 Book III-S section 6.5 */
910 h_doorbell_relon_trampoline:
912 EXCEPTION_PROLOG_0(PACA_EXGEN)
913 b h_doorbell_relon_hv
916 performance_monitor_relon_pseries_trampoline:
918 EXCEPTION_PROLOG_0(PACA_EXGEN)
919 b performance_monitor_relon_pSeries
922 altivec_unavailable_relon_pseries_trampoline:
924 EXCEPTION_PROLOG_0(PACA_EXGEN)
925 b altivec_unavailable_relon_pSeries
928 vsx_unavailable_relon_pseries_trampoline:
930 EXCEPTION_PROLOG_0(PACA_EXGEN)
931 b vsx_unavailable_relon_pSeries
934 facility_unavailable_relon_trampoline:
936 EXCEPTION_PROLOG_0(PACA_EXGEN)
937 b facility_unavailable_relon_pSeries
940 hv_facility_unavailable_relon_trampoline:
942 EXCEPTION_PROLOG_0(PACA_EXGEN)
943 b hv_facility_unavailable_relon_hv
945 STD_RELON_EXCEPTION_PSERIES(0x5300, 0x1300, instruction_breakpoint)
946 #ifdef CONFIG_PPC_DENORMALISATION
948 b denorm_exception_hv
950 STD_RELON_EXCEPTION_PSERIES(0x5700, 0x1700, altivec_assist)
952 /* Other future vectors */
954 .globl __end_interrupts
958 system_call_entry_direct:
959 #if defined(CONFIG_RELOCATABLE)
960 /* The first level prologue may have used LR to get here, saving
961 * orig in r10. To save hacking/ifdeffing common code, restore here.
968 ppc64_runlatch_on_trampoline:
969 b .__ppc64_runlatch_on
972 * Here we have detected that the kernel stack pointer is bad.
973 * R9 contains the saved CR, r13 points to the paca,
974 * r10 contains the (bad) kernel stack pointer,
975 * r11 and r12 contain the saved SRR0 and SRR1.
976 * We switch to using an emergency stack, save the registers there,
977 * and call kernel_bad_stack(), which panics.
980 ld r1,PACAEMERGSP(r13)
981 subi r1,r1,64+INT_FRAME_SIZE
1013 std r10,ORIG_GPR3(r1)
1014 END_FTR_SECTION_IFSET(CPU_FTR_CFAR)
1017 lhz r12,PACA_TRAP_SAVE(r13)
1019 addi r11,r1,INT_FRAME_SIZE
1024 ld r11,exception_marker@toc(r2)
1026 std r11,STACK_FRAME_OVERHEAD-16(r1)
1027 1: addi r3,r1,STACK_FRAME_OVERHEAD
1028 bl .kernel_bad_stack
1032 * Here r13 points to the paca, r9 contains the saved CR,
1033 * SRR0 and SRR1 are saved in r11 and r12,
1034 * r9 - r13 are saved in paca->exgen.
1037 .globl data_access_common
1040 std r10,PACA_EXGEN+EX_DAR(r13)
1041 mfspr r10,SPRN_DSISR
1042 stw r10,PACA_EXGEN+EX_DSISR(r13)
1043 EXCEPTION_PROLOG_COMMON(0x300, PACA_EXGEN)
1046 ld r3,PACA_EXGEN+EX_DAR(r13)
1047 lwz r4,PACA_EXGEN+EX_DSISR(r13)
1049 b .do_hash_page /* Try to handle as hpte fault */
1052 .globl h_data_storage_common
1053 h_data_storage_common:
1055 std r10,PACA_EXGEN+EX_DAR(r13)
1056 mfspr r10,SPRN_HDSISR
1057 stw r10,PACA_EXGEN+EX_DSISR(r13)
1058 EXCEPTION_PROLOG_COMMON(0xe00, PACA_EXGEN)
1061 addi r3,r1,STACK_FRAME_OVERHEAD
1062 bl .unknown_exception
1066 .globl instruction_access_common
1067 instruction_access_common:
1068 EXCEPTION_PROLOG_COMMON(0x400, PACA_EXGEN)
1072 andis. r4,r12,0x5820
1074 b .do_hash_page /* Try to handle as hpte fault */
1076 STD_EXCEPTION_COMMON(0xe20, h_instr_storage, .unknown_exception)
1079 * Here is the common SLB miss user that is used when going to virtual
1080 * mode for SLB misses, that is currently not used
1084 .globl slb_miss_user_common
1085 slb_miss_user_common:
1087 std r3,PACA_EXGEN+EX_DAR(r13)
1088 stw r9,PACA_EXGEN+EX_CCR(r13)
1089 std r10,PACA_EXGEN+EX_LR(r13)
1090 std r11,PACA_EXGEN+EX_SRR0(r13)
1091 bl .slb_allocate_user
1093 ld r10,PACA_EXGEN+EX_LR(r13)
1094 ld r3,PACA_EXGEN+EX_R3(r13)
1095 lwz r9,PACA_EXGEN+EX_CCR(r13)
1096 ld r11,PACA_EXGEN+EX_SRR0(r13)
1100 andi. r10,r12,MSR_RI /* check for unrecoverable exception */
1101 beq- unrecov_user_slb
1109 clrrdi r10,r10,2 /* clear RI before setting SRR0/1 */
1115 ld r9,PACA_EXGEN+EX_R9(r13)
1116 ld r10,PACA_EXGEN+EX_R10(r13)
1117 ld r11,PACA_EXGEN+EX_R11(r13)
1118 ld r12,PACA_EXGEN+EX_R12(r13)
1119 ld r13,PACA_EXGEN+EX_R13(r13)
1124 EXCEPTION_PROLOG_COMMON(0x380, PACA_EXGEN)
1125 ld r4,PACA_EXGEN+EX_DAR(r13)
1132 EXCEPTION_PROLOG_COMMON(0x4200, PACA_EXGEN)
1135 1: addi r3,r1,STACK_FRAME_OVERHEAD
1136 bl .unrecoverable_exception
1139 #endif /* __DISABLED__ */
1143 * Machine check is different because we use a different
1144 * save area: PACA_EXMC instead of PACA_EXGEN.
1147 .globl machine_check_common
1148 machine_check_common:
1151 std r10,PACA_EXGEN+EX_DAR(r13)
1152 mfspr r10,SPRN_DSISR
1153 stw r10,PACA_EXGEN+EX_DSISR(r13)
1154 EXCEPTION_PROLOG_COMMON(0x200, PACA_EXMC)
1157 ld r3,PACA_EXGEN+EX_DAR(r13)
1158 lwz r4,PACA_EXGEN+EX_DSISR(r13)
1162 addi r3,r1,STACK_FRAME_OVERHEAD
1163 bl .machine_check_exception
1167 .globl alignment_common
1170 std r10,PACA_EXGEN+EX_DAR(r13)
1171 mfspr r10,SPRN_DSISR
1172 stw r10,PACA_EXGEN+EX_DSISR(r13)
1173 EXCEPTION_PROLOG_COMMON(0x600, PACA_EXGEN)
1174 ld r3,PACA_EXGEN+EX_DAR(r13)
1175 lwz r4,PACA_EXGEN+EX_DSISR(r13)
1180 addi r3,r1,STACK_FRAME_OVERHEAD
1181 bl .alignment_exception
1185 .globl program_check_common
1186 program_check_common:
1187 EXCEPTION_PROLOG_COMMON(0x700, PACA_EXGEN)
1190 addi r3,r1,STACK_FRAME_OVERHEAD
1191 bl .program_check_exception
1195 .globl fp_unavailable_common
1196 fp_unavailable_common:
1197 EXCEPTION_PROLOG_COMMON(0x800, PACA_EXGEN)
1198 bne 1f /* if from user, just load it up */
1201 addi r3,r1,STACK_FRAME_OVERHEAD
1202 bl .kernel_fp_unavailable_exception
1205 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1207 /* Test if 2 TM state bits are zero. If non-zero (ie. userspace was in
1208 * transaction), go do TM stuff
1210 rldicl. r0, r12, (64-MSR_TS_LG), (64-2)
1212 END_FTR_SECTION_IFSET(CPU_FTR_TM)
1215 b fast_exception_return
1216 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1217 2: /* User process was in a transaction */
1220 addi r3,r1,STACK_FRAME_OVERHEAD
1221 bl .fp_unavailable_tm
1225 .globl altivec_unavailable_common
1226 altivec_unavailable_common:
1227 EXCEPTION_PROLOG_COMMON(0xf20, PACA_EXGEN)
1228 #ifdef CONFIG_ALTIVEC
1231 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1232 BEGIN_FTR_SECTION_NESTED(69)
1233 /* Test if 2 TM state bits are zero. If non-zero (ie. userspace was in
1234 * transaction), go do TM stuff
1236 rldicl. r0, r12, (64-MSR_TS_LG), (64-2)
1238 END_FTR_SECTION_NESTED(CPU_FTR_TM, CPU_FTR_TM, 69)
1241 b fast_exception_return
1242 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1243 2: /* User process was in a transaction */
1246 addi r3,r1,STACK_FRAME_OVERHEAD
1247 bl .altivec_unavailable_tm
1251 END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
1255 addi r3,r1,STACK_FRAME_OVERHEAD
1256 bl .altivec_unavailable_exception
1260 .globl vsx_unavailable_common
1261 vsx_unavailable_common:
1262 EXCEPTION_PROLOG_COMMON(0xf40, PACA_EXGEN)
1266 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1267 BEGIN_FTR_SECTION_NESTED(69)
1268 /* Test if 2 TM state bits are zero. If non-zero (ie. userspace was in
1269 * transaction), go do TM stuff
1271 rldicl. r0, r12, (64-MSR_TS_LG), (64-2)
1273 END_FTR_SECTION_NESTED(CPU_FTR_TM, CPU_FTR_TM, 69)
1276 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1277 2: /* User process was in a transaction */
1280 addi r3,r1,STACK_FRAME_OVERHEAD
1281 bl .vsx_unavailable_tm
1285 END_FTR_SECTION_IFSET(CPU_FTR_VSX)
1289 addi r3,r1,STACK_FRAME_OVERHEAD
1290 bl .vsx_unavailable_exception
1293 STD_EXCEPTION_COMMON(0xf60, facility_unavailable, .facility_unavailable_exception)
1294 STD_EXCEPTION_COMMON(0xf80, hv_facility_unavailable, .facility_unavailable_exception)
1297 .globl __end_handlers
1300 /* Equivalents to the above handlers for relocation-on interrupt vectors */
1301 STD_RELON_EXCEPTION_HV_OOL(0xe40, emulation_assist)
1302 MASKABLE_RELON_EXCEPTION_HV_OOL(0xe80, h_doorbell)
1304 STD_RELON_EXCEPTION_PSERIES_OOL(0xf00, performance_monitor)
1305 STD_RELON_EXCEPTION_PSERIES_OOL(0xf20, altivec_unavailable)
1306 STD_RELON_EXCEPTION_PSERIES_OOL(0xf40, vsx_unavailable)
1307 STD_RELON_EXCEPTION_PSERIES_OOL(0xf60, facility_unavailable)
1308 STD_RELON_EXCEPTION_HV_OOL(0xf80, hv_facility_unavailable)
1310 #if defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV)
1312 * Data area reserved for FWNMI option.
1313 * This address (0x7000) is fixed by the RPA.
1316 .globl fwnmi_data_area
1319 /* pseries and powernv need to keep the whole page from
1320 * 0x7000 to 0x8000 free for use by the firmware
1323 #endif /* defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV) */
1325 /* Space for CPU0's segment table */
1331 #ifdef CONFIG_PPC_POWERNV
1332 _GLOBAL(opal_mc_secondary_handler)
1333 HMT_MEDIUM_PPR_DISCARD
1338 std r3,PACA_OPAL_MC_EVT(r13)
1339 ld r13,OPAL_MC_SRR0(r3)
1341 ld r13,OPAL_MC_SRR1(r3)
1343 ld r3,OPAL_MC_GPR3(r3)
1345 b machine_check_pSeries
1346 #endif /* CONFIG_PPC_POWERNV */
1349 #define MACHINE_CHECK_HANDLER_WINDUP \
1350 /* Clear MSR_RI before setting SRR0 and SRR1. */\
1352 mfmsr r9; /* get MSR value */ \
1354 mtmsrd r9,1; /* Clear MSR_RI */ \
1355 /* Move original SRR0 and SRR1 into the respective regs */ \
1357 mtspr SPRN_SRR1,r9; \
1359 mtspr SPRN_SRR0,r3; \
1367 REST_8GPRS(2, r1); \
1371 /* Decrement paca->in_mce. */ \
1372 lhz r12,PACA_IN_MCE(r13); \
1374 sth r12,PACA_IN_MCE(r13); \
1376 REST_2GPRS(12, r1); \
1377 /* restore original r1. */ \
1381 * Handle machine check early in real mode. We come here with
1382 * ME=1, MMU (IR=0 and DR=0) off and using MC emergency stack.
1385 .globl machine_check_handle_early
1386 machine_check_handle_early:
1387 std r0,GPR0(r1) /* Save r0 */
1388 EXCEPTION_PROLOG_COMMON_3(0x200)
1390 addi r3,r1,STACK_FRAME_OVERHEAD
1391 bl .machine_check_early
1393 #ifdef CONFIG_PPC_P7_NAP
1395 * Check if thread was in power saving mode. We come here when any
1396 * of the following is true:
1397 * a. thread wasn't in power saving mode
1398 * b. thread was in power saving mode with no state loss or
1399 * supervisor state loss
1401 * Go back to nap again if (b) is true.
1403 rlwinm. r11,r12,47-31,30,31 /* Was it in power saving mode? */
1404 beq 4f /* No, it wasn;t */
1405 /* Thread was in power saving mode. Go back to nap again. */
1408 /* Supervisor state loss */
1410 stb r0,PACA_NAPSTATELOST(r13)
1411 3: bl .machine_check_queue_event
1412 MACHINE_CHECK_HANDLER_WINDUP
1415 b .power7_enter_nap_mode
1419 * Check if we are coming from hypervisor userspace. If yes then we
1420 * continue in host kernel in V mode to deliver the MC event.
1422 rldicl. r11,r12,4,63 /* See if MC hit while in HV mode. */
1424 andi. r11,r12,MSR_PR /* See if coming from user. */
1425 bne 9f /* continue in V mode if we are. */
1428 #ifdef CONFIG_KVM_BOOK3S_64_HV
1430 * We are coming from kernel context. Check if we are coming from
1431 * guest. if yes, then we can continue. We will fall through
1432 * do_kvm_200->kvmppc_interrupt to deliver the MC event to guest.
1434 lbz r11,HSTATE_IN_GUEST(r13)
1435 cmpwi r11,0 /* Check if coming from guest */
1436 bne 9f /* continue if we are. */
1439 * At this point we are not sure about what context we come from.
1440 * Queue up the MCE event and return from the interrupt.
1441 * But before that, check if this is an un-recoverable exception.
1442 * If yes, then stay on emergency stack and panic.
1444 andi. r11,r12,MSR_RI
1446 1: addi r3,r1,STACK_FRAME_OVERHEAD
1447 bl .unrecoverable_exception
1451 * Return from MC interrupt.
1452 * Queue up the MCE event so that we can log it later, while
1453 * returning from kernel or opal call.
1455 bl .machine_check_queue_event
1456 MACHINE_CHECK_HANDLER_WINDUP
1459 /* Deliver the machine check to host kernel in V mode. */
1460 MACHINE_CHECK_HANDLER_WINDUP
1461 b machine_check_pSeries
1464 * r13 points to the PACA, r9 contains the saved CR,
1465 * r12 contain the saved SRR1, SRR0 is still ready for return
1466 * r3 has the faulting address
1467 * r9 - r13 are saved in paca->exslb.
1468 * r3 is saved in paca->slb_r3
1469 * We assume we aren't going to take any exceptions during this procedure.
1471 _GLOBAL(slb_miss_realmode)
1473 #ifdef CONFIG_RELOCATABLE
1477 stw r9,PACA_EXSLB+EX_CCR(r13) /* save CR in exc. frame */
1478 std r10,PACA_EXSLB+EX_LR(r13) /* save LR */
1480 bl .slb_allocate_realmode
1482 /* All done -- return from exception. */
1484 ld r10,PACA_EXSLB+EX_LR(r13)
1485 ld r3,PACA_EXSLB+EX_R3(r13)
1486 lwz r9,PACA_EXSLB+EX_CCR(r13) /* get saved CR */
1490 andi. r10,r12,MSR_RI /* check for unrecoverable exception */
1496 mtcrf 0x01,r9 /* slb_allocate uses cr0 and cr7 */
1499 RESTORE_PPR_PACA(PACA_EXSLB, r9)
1500 ld r9,PACA_EXSLB+EX_R9(r13)
1501 ld r10,PACA_EXSLB+EX_R10(r13)
1502 ld r11,PACA_EXSLB+EX_R11(r13)
1503 ld r12,PACA_EXSLB+EX_R12(r13)
1504 ld r13,PACA_EXSLB+EX_R13(r13)
1506 b . /* prevent speculative execution */
1508 2: mfspr r11,SPRN_SRR0
1509 ld r10,PACAKBASE(r13)
1510 LOAD_HANDLER(r10,unrecov_slb)
1512 ld r10,PACAKMSR(r13)
1518 EXCEPTION_PROLOG_COMMON(0x4100, PACA_EXSLB)
1521 1: addi r3,r1,STACK_FRAME_OVERHEAD
1522 bl .unrecoverable_exception
1526 #ifdef CONFIG_PPC_970_NAP
1529 std r9,TI_LOCAL_FLAGS(r11)
1530 ld r10,_LINK(r1) /* make idle task do the */
1531 std r10,_NIP(r1) /* equivalent of a blr */
1539 _STATIC(do_hash_page)
1543 andis. r0,r4,0xa410 /* weird error? */
1544 bne- handle_page_fault /* if not, try to insert a HPTE */
1545 andis. r0,r4,DSISR_DABRMATCH@h
1546 bne- handle_dabr_fault
1549 andis. r0,r4,0x0020 /* Is it a segment table fault? */
1550 bne- do_ste_alloc /* If so handle it */
1551 END_MMU_FTR_SECTION_IFCLR(MMU_FTR_SLB)
1553 CURRENT_THREAD_INFO(r11, r1)
1554 lwz r0,TI_PREEMPT(r11) /* If we're in an "NMI" */
1555 andis. r0,r0,NMI_MASK@h /* (i.e. an irq when soft-disabled) */
1556 bne 77f /* then don't call hash_page now */
1558 * We need to set the _PAGE_USER bit if MSR_PR is set or if we are
1559 * accessing a userspace segment (even from the kernel). We assume
1560 * kernel addresses always have the high bit set.
1562 rlwinm r4,r4,32-25+9,31-9,31-9 /* DSISR_STORE -> _PAGE_RW */
1563 rotldi r0,r3,15 /* Move high bit into MSR_PR posn */
1564 orc r0,r12,r0 /* MSR_PR | ~high_bit */
1565 rlwimi r4,r0,32-13,30,30 /* becomes _PAGE_USER access bit */
1566 ori r4,r4,1 /* add _PAGE_PRESENT */
1567 rlwimi r4,r5,22+2,31-2,31-2 /* Set _PAGE_EXEC if trap is 0x400 */
1570 * r3 contains the faulting address
1571 * r4 contains the required access permissions
1572 * r5 contains the trap number
1574 * at return r3 = 0 for success, 1 for page fault, negative for error
1576 bl .hash_page /* build HPTE if possible */
1577 cmpdi r3,0 /* see if hash_page succeeded */
1580 beq fast_exc_return_irq /* Return from exception on success */
1585 /* Here we have a page fault that hash_page can't handle. */
1589 addi r3,r1,STACK_FRAME_OVERHEAD
1595 addi r3,r1,STACK_FRAME_OVERHEAD
1600 /* We have a data breakpoint exception - handle it */
1605 addi r3,r1,STACK_FRAME_OVERHEAD
1607 12: b .ret_from_except_lite
1610 /* We have a page fault that hash_page could handle but HV refused
1615 addi r3,r1,STACK_FRAME_OVERHEAD
1621 * We come here as a result of a DSI at a point where we don't want
1622 * to call hash_page, such as when we are accessing memory (possibly
1623 * user memory) inside a PMU interrupt that occurred while interrupts
1624 * were soft-disabled. We want to invoke the exception handler for
1625 * the access, or panic if there isn't a handler.
1629 addi r3,r1,STACK_FRAME_OVERHEAD
1634 /* here we have a segment miss */
1636 bl .ste_allocate /* try to insert stab entry */
1638 bne- handle_page_fault
1639 b fast_exception_return
1642 * r13 points to the PACA, r9 contains the saved CR,
1643 * r11 and r12 contain the saved SRR0 and SRR1.
1644 * r9 - r13 are saved in paca->exslb.
1645 * We assume we aren't going to take any exceptions during this procedure.
1646 * We assume (DAR >> 60) == 0xc.
1649 _GLOBAL(do_stab_bolted)
1650 stw r9,PACA_EXSLB+EX_CCR(r13) /* save CR in exc. frame */
1651 std r11,PACA_EXSLB+EX_SRR0(r13) /* save SRR0 in exc. frame */
1652 mfspr r11,SPRN_DAR /* ea */
1655 * check for bad kernel/user address
1656 * (ea & ~REGION_MASK) >= PGTABLE_RANGE
1658 rldicr. r9,r11,4,(63 - 46 - 4)
1659 li r9,0 /* VSID = 0 for bad address */
1664 * This is the kernel vsid, we take the top for context from
1665 * the range. context = (MAX_USER_CONTEXT) + ((ea >> 60) - 0xc) + 1
1666 * Here we know that (ea >> 60) == 0xc
1668 lis r9,(MAX_USER_CONTEXT + 1)@ha
1669 addi r9,r9,(MAX_USER_CONTEXT + 1)@l
1671 srdi r10,r11,SID_SHIFT
1672 rldimi r10,r9,ESID_BITS,0 /* proto vsid */
1673 ASM_VSID_SCRAMBLE(r10, r9, 256M)
1674 rldic r9,r10,12,16 /* r9 = vsid << 12 */
1677 /* Hash to the primary group */
1678 ld r10,PACASTABVIRT(r13)
1679 srdi r11,r11,SID_SHIFT
1680 rldimi r10,r11,7,52 /* r10 = first ste of the group */
1682 /* Search the primary group for a free entry */
1683 1: ld r11,0(r10) /* Test valid bit of the current ste */
1690 /* Stick for only searching the primary group for now. */
1691 /* At least for now, we use a very simple random castout scheme */
1692 /* Use the TB as a random number ; OR in 1 to avoid entry 0 */
1694 rldic r11,r11,4,57 /* r11 = (r11 << 4) & 0x70 */
1697 /* r10 currently points to an ste one past the group of interest */
1698 /* make it point to the randomly selected entry */
1700 or r10,r10,r11 /* r10 is the entry to invalidate */
1702 isync /* mark the entry invalid */
1704 rldicl r11,r11,56,1 /* clear the valid bit */
1709 clrrdi r11,r11,28 /* Get the esid part of the ste */
1712 2: std r9,8(r10) /* Store the vsid part of the ste */
1715 mfspr r11,SPRN_DAR /* Get the new esid */
1716 clrrdi r11,r11,28 /* Permits a full 32b of ESID */
1717 ori r11,r11,0x90 /* Turn on valid and kp */
1718 std r11,0(r10) /* Put new entry back into the stab */
1722 /* All done -- return from exception. */
1723 lwz r9,PACA_EXSLB+EX_CCR(r13) /* get saved CR */
1724 ld r11,PACA_EXSLB+EX_SRR0(r13) /* get saved SRR0 */
1726 andi. r10,r12,MSR_RI
1729 mtcrf 0x80,r9 /* restore CR */
1737 ld r9,PACA_EXSLB+EX_R9(r13)
1738 ld r10,PACA_EXSLB+EX_R10(r13)
1739 ld r11,PACA_EXSLB+EX_R11(r13)
1740 ld r12,PACA_EXSLB+EX_R12(r13)
1741 ld r13,PACA_EXSLB+EX_R13(r13)
1743 b . /* prevent speculative execution */