3 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
5 * Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP
6 * Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu>
7 * Adapted for Power Macintosh by Paul Mackerras.
8 * Low-level exception handlers and MMU support
9 * rewritten by Paul Mackerras.
10 * Copyright (C) 1996 Paul Mackerras.
12 * Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and
13 * Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com
15 * This file contains the entry point for the 64-bit kernel along
16 * with some early initialization code common to all 64-bit powerpc
19 * This program is free software; you can redistribute it and/or
20 * modify it under the terms of the GNU General Public License
21 * as published by the Free Software Foundation; either version
22 * 2 of the License, or (at your option) any later version.
25 #include <linux/threads.h>
29 #include <asm/ppc_asm.h>
30 #include <asm/asm-offsets.h>
32 #include <asm/cputable.h>
33 #include <asm/setup.h>
34 #include <asm/hvcall.h>
35 #include <asm/thread_info.h>
36 #include <asm/firmware.h>
37 #include <asm/page_64.h>
38 #include <asm/irqflags.h>
39 #include <asm/kvm_book3s_asm.h>
40 #include <asm/ptrace.h>
42 /* The physical memory is laid out such that the secondary processor
43 * spin code sits at 0x0000...0x00ff. On server, the vectors follow
44 * using the layout described in exceptions-64s.S
48 * Entering into this code we make the following assumptions:
50 * For pSeries or server processors:
51 * 1. The MMU is off & open firmware is running in real mode.
52 * 2. The kernel is entered at __start
53 * -or- For OPAL entry:
54 * 1. The MMU is off, processor in HV mode, primary CPU enters at 0
55 * with device-tree in gpr3. We also get OPAL base in r8 and
56 * entry in r9 for debugging purposes
57 * 2. Secondary processors enter at 0x60 with PIR in gpr3
59 * For Book3E processors:
60 * 1. The MMU is on running in AS0 in a state defined in ePAPR
61 * 2. The kernel is entered at __start
68 /* NOP this out unconditionally */
70 b .__start_initialization_multiplatform
73 /* Catch branch to 0 in real mode */
76 /* Secondary processors spin on this value until it becomes nonzero.
77 * When it does it contains the real address of the descriptor
78 * of the function that the cpu should jump to to continue
81 .globl __secondary_hold_spinloop
82 __secondary_hold_spinloop:
85 /* Secondary processors write this value with their cpu # */
86 /* after they enter the spin loop immediately below. */
87 .globl __secondary_hold_acknowledge
88 __secondary_hold_acknowledge:
91 #ifdef CONFIG_RELOCATABLE
92 /* This flag is set to 1 by a loader if the kernel should run
93 * at the loaded address instead of the linked address. This
94 * is used by kexec-tools to keep the the kdump kernel in the
95 * crash_kernel region. The loader is responsible for
96 * observing the alignment requirement.
98 /* Do not move this variable as kexec-tools knows about it. */
102 .long 0x72756e30 /* "run0" -- relocate to 0 by default */
107 * The following code is used to hold secondary processors
108 * in a spin loop after they have entered the kernel, but
109 * before the bulk of the kernel has been relocated. This code
110 * is relocated to physical address 0x60 before prom_init is run.
111 * All of it must fit below the first exception vector at 0x100.
112 * Use .globl here not _GLOBAL because we want __secondary_hold
113 * to be the actual text address, not a descriptor.
115 .globl __secondary_hold
117 #ifndef CONFIG_PPC_BOOK3E
120 mtmsrd r24 /* RI on */
122 /* Grab our physical cpu number */
125 /* Tell the master cpu we're here */
126 /* Relocation is off & we are located at an address less */
127 /* than 0x100, so only need to grab low order offset. */
128 std r24,__secondary_hold_acknowledge-_stext(0)
131 /* All secondary cpus wait here until told to start. */
132 100: ld r4,__secondary_hold_spinloop-_stext(0)
136 #if defined(CONFIG_SMP) || defined(CONFIG_KEXEC)
137 ld r4,0(r4) /* deref function descriptor */
141 /* Make sure that patched code is visible */
148 /* This value is used to mark exception frames on the stack. */
151 .tc ID_72656773_68657265[TC],0x7265677368657265
155 * On server, we include the exception vectors code here as it
156 * relies on absolute addressing which is only possible within
157 * this compilation unit
159 #ifdef CONFIG_PPC_BOOK3S
160 #include "exceptions-64s.S"
163 _GLOBAL(generic_secondary_thread_init)
166 /* turn on 64-bit mode */
169 /* get a valid TOC pointer, wherever we're mapped at */
172 #ifdef CONFIG_PPC_BOOK3E
173 /* Book3E initialization */
175 bl .book3e_secondary_thread_init
177 b generic_secondary_common_init
180 * On pSeries and most other platforms, secondary processors spin
181 * in the following code.
182 * At entry, r3 = this processor's number (physical cpu id)
184 * On Book3E, r4 = 1 to indicate that the initial TLB entry for
185 * this core already exists (setup via some other mechanism such
186 * as SCOM before entry).
188 _GLOBAL(generic_secondary_smp_init)
192 /* turn on 64-bit mode */
195 /* get a valid TOC pointer, wherever we're mapped at */
198 #ifdef CONFIG_PPC_BOOK3E
199 /* Book3E initialization */
202 bl .book3e_secondary_core_init
205 generic_secondary_common_init:
206 /* Set up a paca value for this processor. Since we have the
207 * physical cpu id in r24, we need to search the pacas to find
208 * which logical id maps to our physical one.
210 LOAD_REG_ADDR(r13, paca) /* Load paca pointer */
211 ld r13,0(r13) /* Get base vaddr of paca array */
213 addi r13,r13,PACA_SIZE /* know r13 if used accidentally */
214 b .kexec_wait /* wait for next kernel if !SMP */
216 LOAD_REG_ADDR(r7, nr_cpu_ids) /* Load nr_cpu_ids address */
217 lwz r7,0(r7) /* also the max paca allocated */
218 li r5,0 /* logical cpu id */
219 1: lhz r6,PACAHWCPUID(r13) /* Load HW procid from paca */
220 cmpw r6,r24 /* Compare to our id */
222 addi r13,r13,PACA_SIZE /* Loop to next PACA on miss */
224 cmpw r5,r7 /* Check if more pacas exist */
227 mr r3,r24 /* not found, copy phys to r3 */
228 b .kexec_wait /* next kernel might do better */
231 #ifdef CONFIG_PPC_BOOK3E
232 addi r12,r13,PACA_EXTLB /* and TLB exc frame in another */
233 mtspr SPRN_SPRG_TLB_EXFRAME,r12
236 /* From now on, r24 is expected to be logical cpuid */
239 /* See if we need to call a cpu state restore handler */
240 LOAD_REG_ADDR(r23, cur_cpu_spec)
242 ld r23,CPU_SPEC_RESTORE(r23)
249 3: LOAD_REG_ADDR(r3, spinning_secondaries) /* Decrement spinning_secondaries */
257 lbz r23,PACAPROCSTART(r13) /* Test if this processor should */
260 beq 4b /* Loop until told to go */
262 sync /* order paca.run and cur_cpu_spec */
263 isync /* In case code patching happened */
265 /* Create a temp kernel stack for use before relocation is on. */
266 ld r1,PACAEMERGSP(r13)
267 subi r1,r1,STACK_FRAME_OVERHEAD
274 * Assumes we're mapped EA == RA if the MMU is on.
276 #ifdef CONFIG_PPC_BOOK3S
279 andi. r0,r3,MSR_IR|MSR_DR
287 b . /* prevent speculative execution */
292 * Here is our main kernel entry point. We support currently 2 kind of entries
293 * depending on the value of r5.
295 * r5 != NULL -> OF entry, we go to prom_init, "legacy" parameter content
298 * r5 == NULL -> kexec style entry. r3 is a physical pointer to the
299 * DT block, r4 is a physical pointer to the kernel itself
302 _GLOBAL(__start_initialization_multiplatform)
303 /* Make sure we are running in 64 bits mode */
306 /* Get TOC pointer (current runtime address) */
309 /* find out where we are now */
311 0: mflr r26 /* r26 = runtime addr here */
312 addis r26,r26,(_stext - 0b)@ha
313 addi r26,r26,(_stext - 0b)@l /* current runtime base addr */
316 * Are we booted from a PROM Of-type client-interface ?
320 b .__boot_from_prom /* yes -> prom */
322 /* Save parameters */
325 #ifdef CONFIG_PPC_EARLY_DEBUG_OPAL
326 /* Save OPAL entry */
331 #ifdef CONFIG_PPC_BOOK3E
332 bl .start_initialization_book3e
333 b .__after_prom_start
335 /* Setup some critical 970 SPRs before switching MMU off */
338 cmpwi r0,0x39 /* 970 */
340 cmpwi r0,0x3c /* 970FX */
342 cmpwi r0,0x44 /* 970MP */
344 cmpwi r0,0x45 /* 970GX */
346 1: bl .__cpu_preinit_ppc970
349 /* Switch off MMU if not already off */
351 b .__after_prom_start
352 #endif /* CONFIG_PPC_BOOK3E */
354 _INIT_STATIC(__boot_from_prom)
355 #ifdef CONFIG_PPC_OF_BOOT_TRAMPOLINE
356 /* Save parameters */
364 * Align the stack to 16-byte boundary
365 * Depending on the size and layout of the ELF sections in the initial
366 * boot binary, the stack pointer may be unaligned on PowerMac
370 #ifdef CONFIG_RELOCATABLE
371 /* Relocate code for where we are now */
376 /* Restore parameters */
383 /* Do all of the interaction with OF client interface */
386 #endif /* #CONFIG_PPC_OF_BOOT_TRAMPOLINE */
388 /* We never return. We also hit that trap if trying to boot
389 * from OF while CONFIG_PPC_OF_BOOT_TRAMPOLINE isn't selected */
392 _STATIC(__after_prom_start)
393 #ifdef CONFIG_RELOCATABLE
394 /* process relocations for the final address of the kernel */
395 lis r25,PAGE_OFFSET@highest /* compute virtual base of kernel */
397 lwz r7,__run_at_load-_stext(r26)
398 cmplwi cr0,r7,1 /* flagged to stay where we are ? */
406 * We need to run with _stext at physical address PHYSICAL_START.
407 * This will leave some code in the first 256B of
408 * real memory, which are reserved for software use.
410 * Note: This process overwrites the OF exception vectors.
412 li r3,0 /* target addr */
413 #ifdef CONFIG_PPC_BOOK3E
414 tovirt(r3,r3) /* on booke, we already run at PAGE_OFFSET */
416 mr. r4,r26 /* In some cases the loader may */
417 beq 9f /* have already put us at zero */
418 li r6,0x100 /* Start offset, the first 0x100 */
419 /* bytes were copied earlier. */
420 #ifdef CONFIG_PPC_BOOK3E
421 tovirt(r6,r6) /* on booke, we already run at PAGE_OFFSET */
424 #ifdef CONFIG_CRASH_DUMP
426 * Check if the kernel has to be running as relocatable kernel based on the
427 * variable __run_at_load, if it is set the kernel is treated as relocatable
428 * kernel, otherwise it will be moved to PHYSICAL_START
430 lwz r7,__run_at_load-_stext(r26)
434 li r5,__end_interrupts - _stext /* just copy interrupts */
438 lis r5,(copy_to_here - _stext)@ha
439 addi r5,r5,(copy_to_here - _stext)@l /* # bytes of memory to copy */
441 bl .copy_and_flush /* copy the first n bytes */
442 /* this includes the code being */
444 addis r8,r3,(4f - _stext)@ha /* Jump to the copy of this code */
445 addi r8,r8,(4f - _stext)@l /* that we just made */
449 p_end: .llong _end - _stext
451 4: /* Now copy the rest of the kernel up to _end */
452 addis r5,r26,(p_end - _stext)@ha
453 ld r5,(p_end - _stext)@l(r5) /* get _end */
454 5: bl .copy_and_flush /* copy the rest */
456 9: b .start_here_multiplatform
459 * Copy routine used to copy the kernel to start at physical address 0
460 * and flush and invalidate the caches as needed.
461 * r3 = dest addr, r4 = source addr, r5 = copy limit, r6 = start offset
462 * on exit, r3, r4, r5 are unchanged, r6 is updated to be >= r5.
464 * Note: this routine *only* clobbers r0, r6 and lr
466 _GLOBAL(copy_and_flush)
469 4: li r0,8 /* Use the smallest common */
470 /* denominator cache line */
471 /* size. This results in */
472 /* extra cache line flushes */
473 /* but operation is correct. */
474 /* Can't get cache line size */
475 /* from NACA as it is being */
478 mtctr r0 /* put # words/line in ctr */
479 3: addi r6,r6,8 /* copy a cache line */
483 dcbst r6,r3 /* write it to memory */
485 icbi r6,r3 /* flush the icache line */
497 #ifdef CONFIG_PPC_PMAC
499 * On PowerMac, secondary processors starts from the reset vector, which
500 * is temporarily turned into a call to one of the functions below.
505 .globl __secondary_start_pmac_0
506 __secondary_start_pmac_0:
507 /* NB the entries for cpus 0, 1, 2 must each occupy 8 bytes. */
517 _GLOBAL(pmac_secondary_start)
518 /* turn on 64-bit mode */
523 rldimi r3,r0,40,23 /* clear bit 23 (rm_ci) */
530 /* get TOC pointer (real address) */
533 /* Copy some CPU settings from CPU 0 */
534 bl .__restore_cpu_ppc970
536 /* pSeries do that early though I don't think we really need it */
539 mtmsrd r3 /* RI on */
541 /* Set up a paca value for this processor. */
542 LOAD_REG_ADDR(r4,paca) /* Load paca pointer */
543 ld r4,0(r4) /* Get base vaddr of paca array */
544 mulli r13,r24,PACA_SIZE /* Calculate vaddr of right paca */
545 add r13,r13,r4 /* for this processor. */
546 SET_PACA(r13) /* Save vaddr of paca in an SPRG*/
548 /* Mark interrupts soft and hard disabled (they might be enabled
549 * in the PACA when doing hotplug)
552 stb r0,PACASOFTIRQEN(r13)
553 stb r0,PACAHARDIRQEN(r13)
555 /* Create a temp kernel stack for use before relocation is on. */
556 ld r1,PACAEMERGSP(r13)
557 subi r1,r1,STACK_FRAME_OVERHEAD
561 #endif /* CONFIG_PPC_PMAC */
564 * This function is called after the master CPU has released the
565 * secondary processors. The execution environment is relocation off.
566 * The paca for this processor has the following fields initialized at
568 * 1. Processor number
569 * 2. Segment table pointer (virtual address)
570 * On entry the following are set:
571 * r1 = stack pointer (real addr of temp stack)
572 * r24 = cpu# (in Linux terms)
573 * r13 = paca virtual address
574 * SPRG_PACA = paca virtual address
579 .globl __secondary_start
581 /* Set thread priority to MEDIUM */
584 /* Initialize the kernel stack */
585 LOAD_REG_ADDR(r3, current_set)
586 sldi r28,r24,3 /* get current_set[cpu#] */
588 addi r14,r14,THREAD_SIZE-STACK_FRAME_OVERHEAD
589 std r14,PACAKSAVE(r13)
591 /* Do early setup for that CPU (stab, slb, hash table pointer) */
592 bl .early_setup_secondary
595 * setup the new stack pointer, but *don't* use this until
600 /* Clear backchain so we get nice backtraces */
604 /* Mark interrupts both hard and soft disabled */
605 stb r7,PACAHARDIRQEN(r13)
606 stb r7,PACASOFTIRQEN(r13)
608 /* enable MMU and jump to start_secondary */
609 LOAD_REG_ADDR(r3, .start_secondary_prolog)
610 LOAD_REG_IMMEDIATE(r4, MSR_KERNEL)
615 b . /* prevent speculative execution */
618 * Running with relocation on at this point. All we want to do is
619 * zero the stack back-chain pointer and get the TOC virtual address
620 * before going into C code.
622 _GLOBAL(start_secondary_prolog)
625 std r3,0(r1) /* Zero the stack frame pointer */
629 * Reset stack pointer and call start_secondary
630 * to continue with online operation when woken up
631 * from cede in cpu offline.
633 _GLOBAL(start_secondary_resume)
634 ld r1,PACAKSAVE(r13) /* Reload kernel stack pointer */
636 std r3,0(r1) /* Zero the stack frame pointer */
642 * This subroutine clobbers r11 and r12
644 _GLOBAL(enable_64b_mode)
645 mfmsr r11 /* grab the current MSR */
646 #ifdef CONFIG_PPC_BOOK3E
647 oris r11,r11,0x8000 /* CM bit set, we'll set ICM later */
649 #else /* CONFIG_PPC_BOOK3E */
650 li r12,(MSR_64BIT | MSR_ISF)@highest
659 * This puts the TOC pointer into r2, offset by 0x8000 (as expected
660 * by the toolchain). It computes the correct value for wherever we
661 * are running at the moment, using position-independent code.
663 _GLOBAL(relative_toc)
667 ld r2,(p_toc - 0b)(r11)
672 p_toc: .llong __toc_start + 0x8000 - 0b
675 * This is where the main kernel code starts.
677 _INIT_STATIC(start_here_multiplatform)
678 /* set up the TOC (real address) */
681 /* Clear out the BSS. It may have been done in prom_init,
682 * already but that's irrelevant since prom_init will soon
683 * be detached from the kernel completely. Besides, we need
684 * to clear it now for kexec-style entry.
686 LOAD_REG_ADDR(r11,__bss_stop)
687 LOAD_REG_ADDR(r8,__bss_start)
688 sub r11,r11,r8 /* bss size */
689 addi r11,r11,7 /* round up to an even double word */
690 srdi. r11,r11,3 /* shift right by 3 */
694 mtctr r11 /* zero this many doublewords */
699 #ifdef CONFIG_PPC_EARLY_DEBUG_OPAL
700 /* Setup OPAL entry */
705 #ifndef CONFIG_PPC_BOOK3E
708 mtmsrd r6 /* RI on */
711 #ifdef CONFIG_RELOCATABLE
712 /* Save the physical address we're running at in kernstart_addr */
713 LOAD_REG_ADDR(r4, kernstart_addr)
718 /* The following gets the stack set up with the regs */
719 /* pointing to the real addr of the kernel stack. This is */
720 /* all done to support the C function call below which sets */
721 /* up the htab. This is done because we have relocated the */
722 /* kernel but are still running in real mode. */
724 LOAD_REG_ADDR(r3,init_thread_union)
726 /* set up a stack pointer */
727 addi r1,r3,THREAD_SIZE
729 stdu r0,-STACK_FRAME_OVERHEAD(r1)
731 /* Do very early kernel initializations, including initial hash table,
732 * stab and slb setup before we turn on relocation. */
734 /* Restore parameters passed from prom_init/kexec */
736 bl .early_setup /* also sets r13 and SPRG_PACA */
738 LOAD_REG_ADDR(r3, .start_here_common)
743 b . /* prevent speculative execution */
745 /* This is where all platforms converge execution */
746 _INIT_GLOBAL(start_here_common)
747 /* relocation is on at this point */
748 std r1,PACAKSAVE(r13)
750 /* Load the TOC (virtual address) */
755 /* Load up the kernel context */
757 stb r5,PACASOFTIRQEN(r13) /* Soft Disabled */
758 stb r5,PACAHARDIRQEN(r13) /* Hard Disabled on others */
766 * We put a few things here that have to be page-aligned.
767 * This stuff goes at the beginning of the bss, which is page-aligned.
773 .globl empty_zero_page
777 .globl swapper_pg_dir
779 .space PGD_TABLE_SIZE