3 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
5 * Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP
6 * Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu>
7 * Adapted for Power Macintosh by Paul Mackerras.
8 * Low-level exception handlers and MMU support
9 * rewritten by Paul Mackerras.
10 * Copyright (C) 1996 Paul Mackerras.
12 * Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and
13 * Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com
15 * This file contains the entry point for the 64-bit kernel along
16 * with some early initialization code common to all 64-bit powerpc
19 * This program is free software; you can redistribute it and/or
20 * modify it under the terms of the GNU General Public License
21 * as published by the Free Software Foundation; either version
22 * 2 of the License, or (at your option) any later version.
25 #include <linux/threads.h>
29 #include <asm/ppc_asm.h>
30 #include <asm/asm-offsets.h>
32 #include <asm/cputable.h>
33 #include <asm/setup.h>
34 #include <asm/hvcall.h>
35 #include <asm/thread_info.h>
36 #include <asm/firmware.h>
37 #include <asm/page_64.h>
38 #include <asm/irqflags.h>
39 #include <asm/kvm_book3s_asm.h>
40 #include <asm/ptrace.h>
41 #include <asm/hw_irq.h>
43 /* The physical memory is laid out such that the secondary processor
44 * spin code sits at 0x0000...0x00ff. On server, the vectors follow
45 * using the layout described in exceptions-64s.S
49 * Entering into this code we make the following assumptions:
51 * For pSeries or server processors:
52 * 1. The MMU is off & open firmware is running in real mode.
53 * 2. The kernel is entered at __start
54 * -or- For OPAL entry:
55 * 1. The MMU is off, processor in HV mode, primary CPU enters at 0
56 * with device-tree in gpr3. We also get OPAL base in r8 and
57 * entry in r9 for debugging purposes
58 * 2. Secondary processors enter at 0x60 with PIR in gpr3
60 * For Book3E processors:
61 * 1. The MMU is on running in AS0 in a state defined in ePAPR
62 * 2. The kernel is entered at __start
69 /* NOP this out unconditionally */
72 b .__start_initialization_multiplatform
75 /* Catch branch to 0 in real mode */
78 /* Secondary processors spin on this value until it becomes nonzero.
79 * When it does it contains the real address of the descriptor
80 * of the function that the cpu should jump to to continue
83 .globl __secondary_hold_spinloop
84 __secondary_hold_spinloop:
87 /* Secondary processors write this value with their cpu # */
88 /* after they enter the spin loop immediately below. */
89 .globl __secondary_hold_acknowledge
90 __secondary_hold_acknowledge:
93 #ifdef CONFIG_RELOCATABLE
94 /* This flag is set to 1 by a loader if the kernel should run
95 * at the loaded address instead of the linked address. This
96 * is used by kexec-tools to keep the the kdump kernel in the
97 * crash_kernel region. The loader is responsible for
98 * observing the alignment requirement.
100 /* Do not move this variable as kexec-tools knows about it. */
104 .long 0x72756e30 /* "run0" -- relocate to 0 by default */
109 * The following code is used to hold secondary processors
110 * in a spin loop after they have entered the kernel, but
111 * before the bulk of the kernel has been relocated. This code
112 * is relocated to physical address 0x60 before prom_init is run.
113 * All of it must fit below the first exception vector at 0x100.
114 * Use .globl here not _GLOBAL because we want __secondary_hold
115 * to be the actual text address, not a descriptor.
117 .globl __secondary_hold
120 #ifndef CONFIG_PPC_BOOK3E
123 mtmsrd r24 /* RI on */
125 /* Grab our physical cpu number */
127 /* stash r4 for book3e */
130 /* Tell the master cpu we're here */
131 /* Relocation is off & we are located at an address less */
132 /* than 0x100, so only need to grab low order offset. */
133 std r24,__secondary_hold_acknowledge-_stext(0)
137 #ifdef CONFIG_PPC_BOOK3E
140 /* All secondary cpus wait here until told to start. */
141 100: ld r4,__secondary_hold_spinloop-_stext(r26)
145 #if defined(CONFIG_SMP) || defined(CONFIG_KEXEC)
146 #ifdef CONFIG_PPC_BOOK3E
149 ld r4,0(r4) /* deref function descriptor */
153 * it may be the case that other platforms have r4 right to
154 * begin with, this gives us some safety in case it is not
156 #ifdef CONFIG_PPC_BOOK3E
161 /* Make sure that patched code is visible */
168 /* This value is used to mark exception frames on the stack. */
171 .tc ID_72656773_68657265[TC],0x7265677368657265
175 * On server, we include the exception vectors code here as it
176 * relies on absolute addressing which is only possible within
177 * this compilation unit
179 #ifdef CONFIG_PPC_BOOK3S
180 #include "exceptions-64s.S"
183 _GLOBAL(generic_secondary_thread_init)
186 /* turn on 64-bit mode */
189 /* get a valid TOC pointer, wherever we're mapped at */
193 #ifdef CONFIG_PPC_BOOK3E
194 /* Book3E initialization */
196 bl .book3e_secondary_thread_init
198 b generic_secondary_common_init
201 * On pSeries and most other platforms, secondary processors spin
202 * in the following code.
203 * At entry, r3 = this processor's number (physical cpu id)
205 * On Book3E, r4 = 1 to indicate that the initial TLB entry for
206 * this core already exists (setup via some other mechanism such
207 * as SCOM before entry).
209 _GLOBAL(generic_secondary_smp_init)
214 /* turn on 64-bit mode */
217 /* get a valid TOC pointer, wherever we're mapped at */
221 #ifdef CONFIG_PPC_BOOK3E
222 /* Book3E initialization */
225 bl .book3e_secondary_core_init
228 generic_secondary_common_init:
229 /* Set up a paca value for this processor. Since we have the
230 * physical cpu id in r24, we need to search the pacas to find
231 * which logical id maps to our physical one.
233 LOAD_REG_ADDR(r13, paca) /* Load paca pointer */
234 ld r13,0(r13) /* Get base vaddr of paca array */
236 addi r13,r13,PACA_SIZE /* know r13 if used accidentally */
237 b .kexec_wait /* wait for next kernel if !SMP */
239 LOAD_REG_ADDR(r7, nr_cpu_ids) /* Load nr_cpu_ids address */
240 lwz r7,0(r7) /* also the max paca allocated */
241 li r5,0 /* logical cpu id */
242 1: lhz r6,PACAHWCPUID(r13) /* Load HW procid from paca */
243 cmpw r6,r24 /* Compare to our id */
245 addi r13,r13,PACA_SIZE /* Loop to next PACA on miss */
247 cmpw r5,r7 /* Check if more pacas exist */
250 mr r3,r24 /* not found, copy phys to r3 */
251 b .kexec_wait /* next kernel might do better */
254 #ifdef CONFIG_PPC_BOOK3E
255 addi r12,r13,PACA_EXTLB /* and TLB exc frame in another */
256 mtspr SPRN_SPRG_TLB_EXFRAME,r12
259 /* From now on, r24 is expected to be logical cpuid */
262 /* See if we need to call a cpu state restore handler */
263 LOAD_REG_ADDR(r23, cur_cpu_spec)
265 ld r23,CPU_SPEC_RESTORE(r23)
272 3: LOAD_REG_ADDR(r3, spinning_secondaries) /* Decrement spinning_secondaries */
280 lbz r23,PACAPROCSTART(r13) /* Test if this processor should */
283 beq 4b /* Loop until told to go */
285 sync /* order paca.run and cur_cpu_spec */
286 isync /* In case code patching happened */
288 /* Create a temp kernel stack for use before relocation is on. */
289 ld r1,PACAEMERGSP(r13)
290 subi r1,r1,STACK_FRAME_OVERHEAD
297 * Assumes we're mapped EA == RA if the MMU is on.
299 #ifdef CONFIG_PPC_BOOK3S
302 andi. r0,r3,MSR_IR|MSR_DR
310 b . /* prevent speculative execution */
315 * Here is our main kernel entry point. We support currently 2 kind of entries
316 * depending on the value of r5.
318 * r5 != NULL -> OF entry, we go to prom_init, "legacy" parameter content
321 * r5 == NULL -> kexec style entry. r3 is a physical pointer to the
322 * DT block, r4 is a physical pointer to the kernel itself
325 _GLOBAL(__start_initialization_multiplatform)
326 /* Make sure we are running in 64 bits mode */
329 /* Get TOC pointer (current runtime address) */
332 /* find out where we are now */
334 0: mflr r26 /* r26 = runtime addr here */
335 addis r26,r26,(_stext - 0b)@ha
336 addi r26,r26,(_stext - 0b)@l /* current runtime base addr */
339 * Are we booted from a PROM Of-type client-interface ?
343 b .__boot_from_prom /* yes -> prom */
345 /* Save parameters */
348 #ifdef CONFIG_PPC_EARLY_DEBUG_OPAL
349 /* Save OPAL entry */
354 #ifdef CONFIG_PPC_BOOK3E
355 bl .start_initialization_book3e
356 b .__after_prom_start
358 /* Setup some critical 970 SPRs before switching MMU off */
361 cmpwi r0,0x39 /* 970 */
363 cmpwi r0,0x3c /* 970FX */
365 cmpwi r0,0x44 /* 970MP */
367 cmpwi r0,0x45 /* 970GX */
369 1: bl .__cpu_preinit_ppc970
372 /* Switch off MMU if not already off */
374 b .__after_prom_start
375 #endif /* CONFIG_PPC_BOOK3E */
377 _INIT_STATIC(__boot_from_prom)
378 #ifdef CONFIG_PPC_OF_BOOT_TRAMPOLINE
379 /* Save parameters */
387 * Align the stack to 16-byte boundary
388 * Depending on the size and layout of the ELF sections in the initial
389 * boot binary, the stack pointer may be unaligned on PowerMac
393 #ifdef CONFIG_RELOCATABLE
394 /* Relocate code for where we are now */
399 /* Restore parameters */
406 /* Do all of the interaction with OF client interface */
409 #endif /* #CONFIG_PPC_OF_BOOT_TRAMPOLINE */
411 /* We never return. We also hit that trap if trying to boot
412 * from OF while CONFIG_PPC_OF_BOOT_TRAMPOLINE isn't selected */
415 _STATIC(__after_prom_start)
416 #ifdef CONFIG_RELOCATABLE
417 /* process relocations for the final address of the kernel */
418 lis r25,PAGE_OFFSET@highest /* compute virtual base of kernel */
420 lwz r7,__run_at_load-_stext(r26)
421 cmplwi cr0,r7,1 /* flagged to stay where we are ? */
429 * We need to run with _stext at physical address PHYSICAL_START.
430 * This will leave some code in the first 256B of
431 * real memory, which are reserved for software use.
433 * Note: This process overwrites the OF exception vectors.
435 li r3,0 /* target addr */
436 #ifdef CONFIG_PPC_BOOK3E
437 tovirt(r3,r3) /* on booke, we already run at PAGE_OFFSET */
439 mr. r4,r26 /* In some cases the loader may */
440 beq 9f /* have already put us at zero */
441 li r6,0x100 /* Start offset, the first 0x100 */
442 /* bytes were copied earlier. */
443 #ifdef CONFIG_PPC_BOOK3E
444 tovirt(r6,r6) /* on booke, we already run at PAGE_OFFSET */
447 #ifdef CONFIG_RELOCATABLE
449 * Check if the kernel has to be running as relocatable kernel based on the
450 * variable __run_at_load, if it is set the kernel is treated as relocatable
451 * kernel, otherwise it will be moved to PHYSICAL_START
453 lwz r7,__run_at_load-_stext(r26)
457 /* just copy interrupts */
458 LOAD_REG_IMMEDIATE(r5, __end_interrupts - _stext)
462 lis r5,(copy_to_here - _stext)@ha
463 addi r5,r5,(copy_to_here - _stext)@l /* # bytes of memory to copy */
465 bl .copy_and_flush /* copy the first n bytes */
466 /* this includes the code being */
468 addis r8,r3,(4f - _stext)@ha /* Jump to the copy of this code */
469 addi r8,r8,(4f - _stext)@l /* that we just made */
473 p_end: .llong _end - _stext
475 4: /* Now copy the rest of the kernel up to _end */
476 addis r5,r26,(p_end - _stext)@ha
477 ld r5,(p_end - _stext)@l(r5) /* get _end */
478 5: bl .copy_and_flush /* copy the rest */
480 9: b .start_here_multiplatform
483 * Copy routine used to copy the kernel to start at physical address 0
484 * and flush and invalidate the caches as needed.
485 * r3 = dest addr, r4 = source addr, r5 = copy limit, r6 = start offset
486 * on exit, r3, r4, r5 are unchanged, r6 is updated to be >= r5.
488 * Note: this routine *only* clobbers r0, r6 and lr
490 _GLOBAL(copy_and_flush)
493 4: li r0,8 /* Use the smallest common */
494 /* denominator cache line */
495 /* size. This results in */
496 /* extra cache line flushes */
497 /* but operation is correct. */
498 /* Can't get cache line size */
499 /* from NACA as it is being */
502 mtctr r0 /* put # words/line in ctr */
503 3: addi r6,r6,8 /* copy a cache line */
507 dcbst r6,r3 /* write it to memory */
509 icbi r6,r3 /* flush the icache line */
522 #ifdef CONFIG_PPC_PMAC
524 * On PowerMac, secondary processors starts from the reset vector, which
525 * is temporarily turned into a call to one of the functions below.
530 .globl __secondary_start_pmac_0
531 __secondary_start_pmac_0:
532 /* NB the entries for cpus 0, 1, 2 must each occupy 8 bytes. */
542 _GLOBAL(pmac_secondary_start)
543 /* turn on 64-bit mode */
548 rldimi r3,r0,40,23 /* clear bit 23 (rm_ci) */
555 /* get TOC pointer (real address) */
559 /* Copy some CPU settings from CPU 0 */
560 bl .__restore_cpu_ppc970
562 /* pSeries do that early though I don't think we really need it */
565 mtmsrd r3 /* RI on */
567 /* Set up a paca value for this processor. */
568 LOAD_REG_ADDR(r4,paca) /* Load paca pointer */
569 ld r4,0(r4) /* Get base vaddr of paca array */
570 mulli r13,r24,PACA_SIZE /* Calculate vaddr of right paca */
571 add r13,r13,r4 /* for this processor. */
572 SET_PACA(r13) /* Save vaddr of paca in an SPRG*/
574 /* Mark interrupts soft and hard disabled (they might be enabled
575 * in the PACA when doing hotplug)
578 stb r0,PACASOFTIRQEN(r13)
579 li r0,PACA_IRQ_HARD_DIS
580 stb r0,PACAIRQHAPPENED(r13)
582 /* Create a temp kernel stack for use before relocation is on. */
583 ld r1,PACAEMERGSP(r13)
584 subi r1,r1,STACK_FRAME_OVERHEAD
588 #endif /* CONFIG_PPC_PMAC */
591 * This function is called after the master CPU has released the
592 * secondary processors. The execution environment is relocation off.
593 * The paca for this processor has the following fields initialized at
595 * 1. Processor number
596 * 2. Segment table pointer (virtual address)
597 * On entry the following are set:
598 * r1 = stack pointer (real addr of temp stack)
599 * r24 = cpu# (in Linux terms)
600 * r13 = paca virtual address
601 * SPRG_PACA = paca virtual address
606 .globl __secondary_start
608 /* Set thread priority to MEDIUM */
611 /* Initialize the kernel stack */
612 LOAD_REG_ADDR(r3, current_set)
613 sldi r28,r24,3 /* get current_set[cpu#] */
615 addi r14,r14,THREAD_SIZE-STACK_FRAME_OVERHEAD
616 std r14,PACAKSAVE(r13)
618 /* Do early setup for that CPU (stab, slb, hash table pointer) */
619 bl .early_setup_secondary
622 * setup the new stack pointer, but *don't* use this until
627 /* Clear backchain so we get nice backtraces */
631 /* Mark interrupts soft and hard disabled (they might be enabled
632 * in the PACA when doing hotplug)
634 stb r7,PACASOFTIRQEN(r13)
635 li r0,PACA_IRQ_HARD_DIS
636 stb r0,PACAIRQHAPPENED(r13)
638 /* enable MMU and jump to start_secondary */
639 LOAD_REG_ADDR(r3, .start_secondary_prolog)
640 LOAD_REG_IMMEDIATE(r4, MSR_KERNEL)
645 b . /* prevent speculative execution */
648 * Running with relocation on at this point. All we want to do is
649 * zero the stack back-chain pointer and get the TOC virtual address
650 * before going into C code.
652 _GLOBAL(start_secondary_prolog)
655 std r3,0(r1) /* Zero the stack frame pointer */
659 * Reset stack pointer and call start_secondary
660 * to continue with online operation when woken up
661 * from cede in cpu offline.
663 _GLOBAL(start_secondary_resume)
664 ld r1,PACAKSAVE(r13) /* Reload kernel stack pointer */
666 std r3,0(r1) /* Zero the stack frame pointer */
672 * This subroutine clobbers r11 and r12
674 _GLOBAL(enable_64b_mode)
675 mfmsr r11 /* grab the current MSR */
676 #ifdef CONFIG_PPC_BOOK3E
677 oris r11,r11,0x8000 /* CM bit set, we'll set ICM later */
679 #else /* CONFIG_PPC_BOOK3E */
680 li r12,(MSR_64BIT | MSR_ISF)@highest
689 * This puts the TOC pointer into r2, offset by 0x8000 (as expected
690 * by the toolchain). It computes the correct value for wherever we
691 * are running at the moment, using position-independent code.
693 * Note: The compiler constructs pointers using offsets from the
694 * TOC in -mcmodel=medium mode. After we relocate to 0 but before
695 * the MMU is on we need our TOC to be a virtual address otherwise
696 * these pointers will be real addresses which may get stored and
697 * accessed later with the MMU on. We use tovirt() at the call
698 * sites to handle this.
700 _GLOBAL(relative_toc)
704 ld r2,(p_toc - 0b)(r11)
710 p_toc: .llong __toc_start + 0x8000 - 0b
713 * This is where the main kernel code starts.
715 _INIT_STATIC(start_here_multiplatform)
720 /* Clear out the BSS. It may have been done in prom_init,
721 * already but that's irrelevant since prom_init will soon
722 * be detached from the kernel completely. Besides, we need
723 * to clear it now for kexec-style entry.
725 LOAD_REG_ADDR(r11,__bss_stop)
726 LOAD_REG_ADDR(r8,__bss_start)
727 sub r11,r11,r8 /* bss size */
728 addi r11,r11,7 /* round up to an even double word */
729 srdi. r11,r11,3 /* shift right by 3 */
733 mtctr r11 /* zero this many doublewords */
738 #ifdef CONFIG_PPC_EARLY_DEBUG_OPAL
739 /* Setup OPAL entry */
740 LOAD_REG_ADDR(r11, opal)
745 #ifndef CONFIG_PPC_BOOK3E
748 mtmsrd r6 /* RI on */
751 #ifdef CONFIG_RELOCATABLE
752 /* Save the physical address we're running at in kernstart_addr */
753 LOAD_REG_ADDR(r4, kernstart_addr)
758 /* The following gets the stack set up with the regs */
759 /* pointing to the real addr of the kernel stack. This is */
760 /* all done to support the C function call below which sets */
761 /* up the htab. This is done because we have relocated the */
762 /* kernel but are still running in real mode. */
764 LOAD_REG_ADDR(r3,init_thread_union)
766 /* set up a stack pointer */
767 addi r1,r3,THREAD_SIZE
769 stdu r0,-STACK_FRAME_OVERHEAD(r1)
771 /* Do very early kernel initializations, including initial hash table,
772 * stab and slb setup before we turn on relocation. */
774 /* Restore parameters passed from prom_init/kexec */
776 bl .early_setup /* also sets r13 and SPRG_PACA */
778 LOAD_REG_ADDR(r3, .start_here_common)
783 b . /* prevent speculative execution */
785 /* This is where all platforms converge execution */
786 _INIT_GLOBAL(start_here_common)
787 /* relocation is on at this point */
788 std r1,PACAKSAVE(r13)
790 /* Load the TOC (virtual address) */
793 /* Do more system initializations in virtual mode */
796 /* Mark interrupts soft and hard disabled (they might be enabled
797 * in the PACA when doing hotplug)
800 stb r0,PACASOFTIRQEN(r13)
801 li r0,PACA_IRQ_HARD_DIS
802 stb r0,PACAIRQHAPPENED(r13)
804 /* Generic kernel entry */
811 * We put a few things here that have to be page-aligned.
812 * This stuff goes at the beginning of the bss, which is page-aligned.
818 .globl empty_zero_page
822 .globl swapper_pg_dir
824 .space PGD_TABLE_SIZE